CN110726917A - 混合同轴结构的半导体测试插座及其制备方法 - Google Patents

混合同轴结构的半导体测试插座及其制备方法 Download PDF

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CN110726917A
CN110726917A CN201910914470.1A CN201910914470A CN110726917A CN 110726917 A CN110726917 A CN 110726917A CN 201910914470 A CN201910914470 A CN 201910914470A CN 110726917 A CN110726917 A CN 110726917A
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施元军
殷岚勇
高宗英
刘凯
杨宗茂
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    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/2856Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
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    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
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    • GPHYSICS
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    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • G01R31/26Testing of individual semiconductor devices
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0416Connectors, terminals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • G01R31/12Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/1227Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
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    • H01R43/00Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
    • H01R43/20Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for assembling or disassembling contact members with insulating base, case or sleeve
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • G01R1/0441Details
    • G01R1/045Sockets or component fixtures for RF or HF testing

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Abstract

本发明涉及一种混合同轴结构的半导体测试插座及其制备方法,测试插座包括测试插座定位板、绝缘测试插座母体、嵌入式导电插座母体、嵌入式导电插座盖板和绝缘测试插座盖板,所述测试插座定位板、绝缘测试插座母体和绝缘测试插座盖板从上到下依次顺序设置,所述绝缘测试插座母体上设置槽口,该槽口内设置嵌入式导电插座母体和嵌入式导电插座盖板。本发明利用导电金属制作的同轴结构可以达到较好的通道之间的隔离度,大大减少了测试插座的制作成本和生产周期,同时高频信号部分可以达到‑1dB/40GHz的插损和‑10dB/40GHz的回损,通道和通道之间的隔离度高过‑40dB/20GHz。

Description

混合同轴结构的半导体测试插座及其制备方法
技术领域
本发明涉及芯片测试插座领域,具体涉及一种混合同轴结构的半导体测试插座及其制备方法。
背景技术
现有技术中,半导体FPGA芯片一般采用同轴结构的测试插座来测试芯片性能,伴随着半导体FPGA芯片的个体越来越大,同时其中高频通讯部分只是很少一部分,半导体FPGA芯片无论是否为高频通讯均使用同轴结构的测试插座将导致芯片测试成本越来越高。
发明内容
本发明的目的在于提供一种混合同轴结构的半导体测试插座及其制备方法,用以解决现有技术中半导体FPGA芯片全部采用同轴结构测试插座测试导致芯片测试成本高的问题。
本发明一方面提供了一种混合同轴结构的半导体测试插座,包括测试插座定位板、绝缘测试插座母体、嵌入式导电插座母体、嵌入式导电插座盖板和绝缘测试插座盖板,所述测试插座定位板、绝缘测试插座母体和绝缘测试插座盖板从上到下依次顺序设置,所述绝缘测试插座母体上设置槽口,该槽口内设置嵌入式导电插座母体和嵌入式导电插座盖板。
进一步的,所述绝缘测试插座母体和绝缘测试插座盖板均通过固定螺丝安装在测试插座定位板上。
本发明另一方面提供一种混合同轴结构的半导体测试插座的制备方法,包括如下步骤:
(1)在绝缘测试插座母体和绝缘测试插座盖板上加工出针孔腔体,其中针孔腔体避让混合同轴空间;
(2)在嵌入式导电插座母体、嵌入式导电插座盖板上加工出信号孔和电源孔;
(3)将聚合物分别塞入嵌入式导电插座母体和嵌入式导电插座盖板的信号孔内;
(4)将塞入聚合物的嵌入式导电插座母体、嵌入式导电插座盖板加热烘烤,聚合物固化在嵌入式导电插座母体、嵌入式导电插座盖板上;
(5)将聚合物固化后的嵌入式导电插座母体、嵌入式导电插座盖板进行表面处理;
(6)在嵌入式导电插座母体、嵌入式导电插座盖板上加工信号孔、电源孔和接地孔;
(7)组装同轴结构探针、同轴结构嵌入式导电插座母体、嵌入式导电插座盖板;
(8)将嵌入式导电插座母体、嵌入式导电插座盖板嵌入到绝缘测试插座母体的槽口内;
(9)将探针安装到绝缘测试插座母体上并盖上绝缘测试插座盖板;
(10)绝缘测试插座母体和绝缘测试插座盖板通过螺丝固定安装在测试插座定位板上。
进一步的,所述步骤(3)具体为在真空环境下,利用辊压的方式将聚合物塞入嵌入式导电插座母体和嵌入式导电插座盖板的信号孔内。
进一步的,所述步骤(4)具体为将塞入聚合物的嵌入式导电插座母体、嵌入式导电插座盖板放入烤箱内在120℃烘烤30min,155℃烘烤30min,在190℃烘烤60min。
采用上述本发明技术方案的有益效果是:
本发明利用导电金属制作的同轴结构可以达到较好的通道之间的隔离度,大大减少了测试插座的制作成本和生产周期,同时高频信号部分可以达到-1dB/40GHz的插损和-10dB/40GHz的回损,通道和通道之间的隔离度高过-40dB/20GHz。
附图说明
图1为本发明测试插座爆炸图;
图2为本发明测试插座俯视图;
附图中,各标号所代表的部件列表如下:
1-测试插座定位板,2-绝缘测试插座母体,3-嵌入式导电插座母体,4-嵌入式导电插座盖板,5-绝缘测试插座盖板,6-芯片。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。
如图1-2所示,本实施例混合同轴结构的半导体测试插座,包括测试插座定位板1、绝缘测试插座母体2、嵌入式导电插座母体3、嵌入式导电插座盖板4和绝缘测试插座盖板5,测试插座定位板1内设置定位槽,用于放置并定位芯片6,所述测试插座定位板1、绝缘测试插座母体2和绝缘测试插座盖板5从上到下依次顺序设置,所述绝缘测试插座母体2和绝缘测试插座盖板5均通过固定螺丝安装在测试插座定位板1上,所述绝缘测试插座母体2上设置槽口,该槽口内设置嵌入式导电插座母体3和嵌入式导电插座盖板4。
该混合同轴结构的半导体测试插座的制备方法,包括如下步骤:
(1)在绝缘测试插座母体2和绝缘测试插座盖板5上加工出针孔腔体,其中针孔腔体避让混合同轴空间;
(2)在嵌入式导电插座母体3、嵌入式导电插座盖板4上加工出信号孔和电源孔;
(3)在真空环境下,利用辊压的方式将聚合物塞入嵌入式导电插座母体和嵌入式导电插座盖板的信号孔内;
(4)将塞入聚合物的嵌入式导电插座母体3、嵌入式导电插座盖板4放入烤箱内在120℃烘烤30min,155℃烘烤30min,在190℃烘烤60min,聚合物固化在嵌入式导电插座母体3、嵌入式导电插座盖板4上;
(5)将聚合物固化后的嵌入式导电插座母体3、嵌入式导电插座盖板4进行表面处理;
(6)在嵌入式导电插座母体3、嵌入式导电插座盖板4上加工信号孔、电源孔和接地孔;
(7)组装同轴结构探针、同轴结构嵌入式导电插座母体3、嵌入式导电插座盖板4;
(8)将嵌入式导电插座母体3、嵌入式导电插座盖板4嵌入到绝缘测试插座母体2的槽口内;
(9)将探针安装到绝缘测试插座母体2上并盖上绝缘测试插座盖板5;
(10)绝缘测试插座母体2和绝缘测试插座盖板5通过螺丝固定安装在测试插座定位板1上。
综上,本发明利用导电金属制作的同轴结构可以达到较好的通道之间的隔离度,大大减少了测试插座的制作成本和生产周期,同时高频信号部分可以达到-1dB/40GHz的插损和-10dB/40GHz的回损,通道和通道之间的隔离度高过-40dB/20GHz。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (5)

1.一种混合同轴结构的半导体测试插座,其特征在于,包括测试插座定位板、绝缘测试插座母体、嵌入式导电插座母体、嵌入式导电插座盖板和绝缘测试插座盖板,所述测试插座定位板、绝缘测试插座母体和绝缘测试插座盖板从上到下依次顺序设置,所述绝缘测试插座母体上设置槽口,该槽口内设置嵌入式导电插座母体和嵌入式导电插座盖板。
2.根据权利要求1所述的混合同轴结构的半导体测试插座,其特征在于,所述绝缘测试插座母体和绝缘测试插座盖板均通过固定螺丝安装在测试插座定位板上。
3.一种混合同轴结构的半导体测试插座的制备方法,其特征在于,包括如下步骤:
(1)在绝缘测试插座母体和绝缘测试插座盖板上加工出针孔腔体,其中针孔腔体避让混合同轴空间;
(2)在嵌入式导电插座母体、嵌入式导电插座盖板上加工出信号孔和电源孔;
(3)将聚合物分别塞入嵌入式导电插座母体和嵌入式导电插座盖板的信号孔内;
(4)将塞入聚合物的嵌入式导电插座母体、嵌入式导电插座盖板加热烘烤,聚合物固化在嵌入式导电插座母体、嵌入式导电插座盖板上;
(5)将聚合物固化后的嵌入式导电插座母体、嵌入式导电插座盖板进行表面处理;
(6)在嵌入式导电插座母体、嵌入式导电插座盖板上加工信号孔、电源孔和接地孔;
(7)组装同轴结构探针、同轴结构嵌入式导电插座母体、嵌入式导电插座盖板;
(8)将嵌入式导电插座母体、嵌入式导电插座盖板嵌入到绝缘测试插座母体的槽口内;
(9)将探针安装到绝缘测试插座母体上并盖上绝缘测试插座盖板;
(10)绝缘测试插座母体和绝缘测试插座盖板通过螺丝固定安装在测试插座定位板上。
4.根据权利要求3所述的混合同轴结构的半导体测试插座的制备方法,其特征在于,所述步骤(3)具体为在真空环境下,利用辊压的方式将聚合物塞入嵌入式导电插座母体和嵌入式导电插座盖板的信号孔内。
5.根据权利要求3所述的混合同轴结构的半导体测试插座的制备方法,其特征在于,所述步骤(4)具体为将塞入聚合物的嵌入式导电插座母体、嵌入式导电插座盖板放入烤箱内在120℃烘烤30min,155℃烘烤30min,在190℃烘烤60min。
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