CN110676264A - 像素电极接触孔设计 - Google Patents

像素电极接触孔设计 Download PDF

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CN110676264A
CN110676264A CN201910845949.4A CN201910845949A CN110676264A CN 110676264 A CN110676264 A CN 110676264A CN 201910845949 A CN201910845949 A CN 201910845949A CN 110676264 A CN110676264 A CN 110676264A
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CN110676264B (zh
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王建刚
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TCL China Star Optoelectronics Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting

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Abstract

一种像素电极接触孔设计,包括多个呈阵列排布的第一电极,每一所述第一电极包括第一侧、第二侧与第一接触孔,所述第一接触孔位于所述第一侧;多个蚀刻药液通道,每一所述蚀刻药液通道位于所述第二侧之间;多个第二电极,位于所述第一侧之间,每一所述第二电极包括第一端、第二端与第二接触孔,所述第一端延伸至所述蚀刻药液通道,所述第二接触孔位于所述第一端。本发明提供的像素电极接触孔设计,可以加快区域蚀刻药液的浸润,分割大块银残留甚至消除银蚀刻残留。

Description

像素电极接触孔设计
技术领域
本发明涉及显示技术领域,尤其涉及一种像素电极接触孔设计。
背景技术
目前,TG(top-gate)TFT(thin film transistor)ITOAgITO(indium tin oxide)像素电极在银蚀刻(Ag etch)过程中,由于药液的浸润性,会出现大面积的银残留,导致出现混色、短路、电流不均等显示异常。
发明内容
本发明提供一种像素电极接触孔设计,以解决现有的像素电极在银蚀刻(Agetch)过程中,由于药液的浸润性,会出现大面积的银残留,导致出现混色、短路、电流不均等显示异常的技术问题。
为解决上述问题,本发明提供的技术方案如下:
本发明提供一种像素电极接触孔设计,包括多个呈阵列排布的第一电极,每一所述第一电极包括第一侧、第二侧与第一接触孔,所述第一侧的长度小于所述第二侧的长度,且所述第一接触孔位于所述第一侧;多个蚀刻药液通道,每一所述蚀刻药液通道位于所述第二侧之间;多个第二电极,位于所述第一侧之间,每一所述第二电极包括第一端、第二端与第二接触孔,所述第一端延伸至所述蚀刻药液通道,所述第二端位于所述第一侧上相邻两所述第一接触孔之间,且所述第二接触孔位于所述第一端。
在本发明的至少一种实施例中,每一所述第二电极还包括第三端与第三接触孔,所述第三端往相反于所述第一端的延伸方向延伸至另一所述蚀刻药液通道,且所述第三接触孔位于所述第三端。
在本发明的至少一种实施例中,所述第二接触孔位于所述蚀刻药液通道。
在本发明的至少一种实施例中,每一所述第一电极还包括突出部,位于所述第一侧,且所述第一接触孔位于所述突出部内。
在本发明的至少一种实施例中,所述第二电极为L形。
在本发明的至少一种实施例中,所述第二电极为T形。
在本发明的至少一种实施例中,所述相邻两第一接触孔所在的所述突出部分别位于对应的所述第一电极上互相远离的所述第二侧。
在本发明的至少一种实施例中,当所述第一端延伸至所述蚀刻药液通道时,相邻于所述蚀刻药液通道远离所述第一端一侧且在所述阵列的对角线方向上相邻于所述相邻两第一接触孔的所述第一电极,其与所述第一电极的第一接触孔远离的所述第一侧位于所述第一端的延伸方向上。
在本发明的至少一种实施例中,所述第一电极为阳极。
在本发明的至少一种实施例中,所述第二电极为阴极。
本发明的有益效果为:本发明提供的像素电极接触孔设计,将阴极接触孔的位置延伸或者采用背靠背孔洞设计,与阳极接触孔形成三岔口排布,引导蚀刻药液的方向性流动,避免单侧孔洞堆积导致药液淤积,加快区域药液的浸润,分割大块银残留甚至消除银蚀刻残留。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明第一实施例的像素电极接触孔设计示意图;
图2为本发明第二实施例的像素电极接触孔设计示意图。
具体实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
本发明针对现有的像素电极在银蚀刻过程中,由于药液的浸润性,会出现大面积的银残留,导致出现混色、短路、电流不均等显示异常的技术问题,本实施例能够解决该缺陷。
图1为本发明第一实施例的像素电极接触孔设计示意图,包括多个呈阵列排布的第一电极10,每一所述第一电极包括第一侧11、第二侧12与第一接触孔13,所述第一侧11的长度小于所述第二侧12的长度,且所述第一接触孔13位于所述第一侧11;多个蚀刻药液通道20,每一所述蚀刻药液通道20位于所述第二侧12之间;多个第二电极30,位于所述第一侧11之间,每一所述第二电极30包括第一端31、第二端32与第二接触孔33,所述第一端31延伸至所述蚀刻药液通道20,所述第二端32位于所述第一侧11上相邻两所述第一接触孔13之间,且所述第二接触孔33位于所述第一端31。所述第二接触孔33位于所述蚀刻药液通道20。所述第二电极30为L形。
每一所述第一电极10还包括突出部14,位于所述第一侧11,且所述第一接触孔13位于所述突出部14内。所述相邻两第一接触孔13所在的所述突出部14分别位于对应的所述第一电极10上互相远离的所述第二侧12。当所述第一端31延伸至所述蚀刻药液通道20时,相邻于所述蚀刻药液通道20远离所述第一端31一侧且在所述阵列的对角线方向上相邻于所述相邻两第一接触孔13的所述第一电极10,其与所述第一电极10的第一接触孔13远离的所述第一侧11位于所述第一端31的延伸方向上。所述第一电极10为阳极。所述第二电极30为阳极。
如图1所示,箭头a代表蚀刻药液的流动方向,箭头a的长短代表倾向性。在银蚀刻的过程中,现有的像素电极阴极接触孔由于与阳极接触孔距离过近,孔洞堆积会使蚀刻药液流动困难,分布不均匀的蚀刻药液造成部份区域出现大面积的银残留。本实施例将阴极接触孔的位置延伸至蚀刻药液通道20,与相邻的阳极接触孔形成三岔口排布,避免单侧孔洞堆积导致药液淤积,从而改善银残留的状况。
图2为本发明第二实施例的像素电极接触孔设计示意图,与第一实施例不同的地方在于,每一所述第二电极30还包括第三端34与第三接触孔35,所述第三端34往相反于所述第一端31的延伸方向延伸至另一所述蚀刻药液通道20,且所述第三接触孔35位于所述第三端34。所述第二电极30为T形。
如图2所示,本实施例的阴极接触孔采用两侧孔洞设计,将两个L形的第二电极30背靠背形成T形的第二电极30,阴极接触孔与相邻的阳极接触孔形成三岔口排布,引导蚀刻药液的方向性流动,分割大块银残留甚至消除银蚀刻残留。
有益效果:本发明提供的像素电极接触孔设计,将阴极接触孔的位置延伸或者采用背靠背孔洞设计,与阳极接触孔形成三岔口排布,引导蚀刻药液的方向性流动,避免单侧孔洞堆积导致药液淤积,加快区域药液的浸润,分割大块银残留甚至消除银蚀刻残留。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种像素电极接触孔设计,其特征在于,包括:
多个呈阵列排布的第一电极,每一所述第一电极包括第一侧、第二侧与第一接触孔,所述第一侧的长度小于所述第二侧的长度,且所述第一接触孔位于所述第一侧;
多个蚀刻药液通道,每一所述蚀刻药液通道位于所述第二侧之间;
多个第二电极,位于所述第一侧之间,每一所述第二电极包括第一端、第二端与第二接触孔,所述第一端延伸至所述蚀刻药液通道,所述第二端位于所述第一侧上相邻两所述第一接触孔之间,且所述第二接触孔位于所述第一端。
2.根据权利要求1所述的像素电极接触孔设计,其特征在于,每一所述第二电极还包括第三端与第三接触孔,所述第三端往相反于所述第一端的延伸方向延伸至另一所述蚀刻药液通道,且所述第三接触孔位于所述第三端。
3.根据权利要求1所述的像素电极接触孔设计,其特征在于,所述第二接触孔位于所述蚀刻药液通道。
4.根据权利要求1所述的像素电极接触孔设计,其特征在于,每一所述第一电极还包括突出部,位于所述第一侧,且所述第一接触孔位于所述突出部内。
5.根据权利要求1所述的像素电极接触孔设计,其特征在于,所述第二电极为L形。
6.根据权利要求2所述的像素电极接触孔设计,其特征在于,所述第二电极为T形。
7.根据权利要求4所述的像素电极接触孔设计,其特征在于,所述相邻两第一接触孔所在的所述突出部分别位于对应的所述第一电极上互相远离的所述第二侧。
8.根据权利要求1所述的像素电极接触孔设计,其特征在于,当所述第一端延伸至所述蚀刻药液通道时,相邻于所述蚀刻药液通道远离所述第一端一侧且在所述阵列的对角线方向上相邻于所述相邻两第一接触孔的所述第一电极,其与所述第一电极的第一接触孔远离的所述第一侧位于所述第一端的延伸方向上。
9.根据权利要求1所述的像素电极接触孔设计,其特征在于,所述第一电极为阳极。
10.根据权利要求1所述的像素电极接触孔设计,其特征在于,所述第二电极为阴极。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020195603A1 (en) * 2001-05-18 2002-12-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN101064323A (zh) * 2006-04-26 2007-10-31 爱普生映像元器件有限公司 电光装置、电子设备、及电光装置的制造方法
CN103053027A (zh) * 2010-08-03 2013-04-17 夏普株式会社 薄膜晶体管基板
CN104122713A (zh) * 2013-05-09 2014-10-29 深超光电(深圳)有限公司 一种液晶显示器阵列基板的制造方法
CN104701250A (zh) * 2015-03-03 2015-06-10 深圳市华星光电技术有限公司 一种阵列基板的制作方法及阵列基板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020195603A1 (en) * 2001-05-18 2002-12-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
CN101064323A (zh) * 2006-04-26 2007-10-31 爱普生映像元器件有限公司 电光装置、电子设备、及电光装置的制造方法
CN103053027A (zh) * 2010-08-03 2013-04-17 夏普株式会社 薄膜晶体管基板
CN104122713A (zh) * 2013-05-09 2014-10-29 深超光电(深圳)有限公司 一种液晶显示器阵列基板的制造方法
CN104701250A (zh) * 2015-03-03 2015-06-10 深圳市华星光电技术有限公司 一种阵列基板的制作方法及阵列基板

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