CN110660369B

CN110660369B - Display driving method, source electrode driving circuit, driving chip and display device

Info

Publication number: CN110660369B
Application number: CN201910840537.1A
Authority: CN
Inventors: 高宗宏; 周文彬
Original assignee: Chipone Technology Beijing Co Ltd
Current assignee: Chipone Technology Beijing Co Ltd
Priority date: 2019-09-06
Filing date: 2019-09-06
Publication date: 2022-05-20
Anticipated expiration: 2039-09-06
Also published as: CN110660369A

Abstract

The invention discloses a display driving method for driving a plurality of sub-pixels, comprising the following steps: obtaining first source electrode driving data according to the first pixel data; driving a first sub-pixel of the plurality of sub-pixels according to first source driving data in a first scanning interval; obtaining a first offset according to a comparison result of the second pixel data and the first source electrode driving data; obtaining second source electrode driving data according to the second pixel data and the first offset; and driving a second sub-pixel in the plurality of sub-pixels according to second source driving data in a second scanning interval, wherein the first sub-pixel and the second sub-pixel are adjacent in position and are driven by the same data line. The invention also discloses a source electrode driving circuit, a driving chip and a display device, so that the pixel liquid crystal can be driven to the expected voltage quickly, the charging speed of the pixel source electrode is accelerated, and certain storage resources can be saved.

Description

Display driving method, source electrode driving circuit, driving chip and display device

Technical Field

The invention relates to the technical field of electronic display, in particular to a display driving method, a source electrode driving circuit, a driving chip and a display device.

Background

In recent years, with the advance of technology, many different Display devices, such as Liquid Crystal Display (LCD) or electroluminescence Display (ELD) Display devices, have been widely used for flat panel displays. Taking the lcd as an example, most of the lcds are backlight lcds, which are composed of an lcd panel and a backlight module (backlight module). The liquid crystal display panel is composed of two transparent substrates and liquid crystal sealed between the substrates.

In a conventional liquid crystal display, pixel data is generally provided through a plurality of pixel electrodes according to image information, and light transmittance of a plurality of pixel cells is controlled to display a desired image. Specifically, each pixel electrode is coupled to a data line and a scan line, respectively, and the scan line is coupled to the pixel electrode through a Thin Film Transistor (TFT). The TFTs are turned on by the scan lines, and the pixel electrodes are charged by the data lines.

On a large-sized panel, the source driving wires of the panel become long, which causes a severe resistance-capacitance load (RC Loading) and charging difficulty. Referring to fig. 1, fig. 1 illustrates a schematic structure of a related art frame-based overdrive method.

As shown in fig. 1, Pxy is a gray scale voltage of a certain pixel point on the display panel in different frame periods. Assume that the driving gray-scale voltage at the subpixel Pxy in the 1 st and 2 nd frame periods is V128 (voltage represented by the 128 th gray scale), and the driving gray-scale voltage in the 3 rd and 4 th frame periods is V64 (voltage represented by the 64 th gray scale), where V128> V64. In the switching process from the 2 nd frame period to the 3 rd frame period, due to the change of the driving voltage, if the original gray scale voltage is used for driving, the response time of the pixel is very slow, and the liquid crystal cannot be driven to the corresponding voltage quickly to realize gray scale switching.

In order to increase the gray scale response speed of the liquid crystal and reduce the response time of the liquid crystal, the prior art adopts the overdrive technology, since the display gray scale is reduced from V128 to V64, the original V64 is not used for driving, but the corrected V56 (voltage represented by 56 th gray scale) is used for driving, and V56< V64, the liquid crystal is driven to the expected voltage quickly, and the response time is increased.

However, when the overdrive technique is adopted, it is necessary to store pixel data (source data) of a previous frame and further adjust pixel data output this time according to the stored pixel data (whether or not the stored pixel data is the same as the current pixel data). The data storage capacity is large, and certain storage resources can be occupied. When a glass panel of a Dual-gate display panel (Dual-gate display panel) is used, the problem of adaptability may also occur when the over-driving technique is used.

On the other hand, the load of the panel is changing over time, and the load is not known and controllable, so that the pixel data stored in advance is probably not suitable for compensating the current source data.

Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.

Disclosure of Invention

In order to solve the above technical problems, the present invention provides a display driving method, a source driving circuit, a driving chip and a display device, which can drive a pixel liquid crystal to a desired voltage quickly, accelerate the charging of a pixel source, and save certain storage resources.

According to the present invention, there is provided a display driving method for driving a plurality of sub-pixels, the display driving method comprising: obtaining first source electrode driving data according to the first pixel data; driving a first sub-pixel of the plurality of sub-pixels according to the first source driving data in a first scanning interval; obtaining a first offset according to a comparison result of second pixel data and the first source electrode driving data; obtaining second source electrode driving data according to the second pixel data and the first offset; and driving a second sub-pixel of the plurality of sub-pixels according to the second source driving data in a second scanning interval, wherein the first sub-pixel is adjacent to the second sub-pixel in position and is driven by the same data line.

Preferably, the method further comprises the following steps: receiving pixel data of a current column and pixel data of first N columns; resetting a sub-pixel sequence according to the received pixel data; and scanning the reset sub-pixel sequence, and sequentially outputting the first pixel data and the second pixel data, wherein N is a natural number.

Preferably, the obtaining of the first offset amount according to the comparison result of the second pixel data and the first source driving data includes: calculating a difference between the second pixel data and the first source driving data; determining the interval of the difference value; and determining the first offset according to the range of the difference value.

Preferably, determining the first offset comprises: when the difference is smaller than a first threshold, the first offset is 0; when the difference value is larger than the first threshold and smaller than a second threshold, the first offset is a first compensation value; when the difference value is larger than the second threshold and smaller than a third threshold, the first offset is a second compensation value; when the difference is larger than the third threshold, the first offset is a third compensation value.

Preferably, the obtaining of the second source driving data further comprises: obtaining a second offset according to the second pixel data; and obtaining second source driving data according to the second pixel data, the first offset and the second offset.

Preferably, obtaining a second offset from the second pixel data comprises: setting a plurality of reference points to regionalize the display panel; determining the area of the target sub-pixel corresponding to the second pixel data; and calculating the second offset according to the corresponding parameters of the region.

Preferably, the area includes one of a first quadrant area, a second quadrant area, a third quadrant area and a fourth quadrant area, wherein each quadrant area includes four reference points, and the first quadrant area, the second quadrant area, the third quadrant area and the fourth quadrant area constitute a pixel area of the display panel.

Preferably, the respective parameters of the regions include: the regions correspond to the length and width of the quadrant regions.

Preferably, the calculation formula of the second offset amount is: (1-s) (1-t) P8+ (1-s) t P5+ s (1-t) P9+ st P6, wherein,

p5, P6, P8 and P9 are reference points corresponding to the quadrant region where the target sub-pixel is located, L is the width of the quadrant region where the target sub-pixel is located, W is the length of the quadrant region where the target sub-pixel is located, M is the horizontal distance between the target sub-pixel and an adjacent reference point, and N is the vertical distance between the target sub-pixel and the adjacent reference point.

Preferably, the method of obtaining the second source driving data includes: and adding the second pixel data and the first offset to obtain second source electrode driving data.

Preferably, the method of obtaining the second source driving data includes: and adding the second pixel data, the first offset and the second offset to obtain second source electrode driving data.

According to the present invention, there is provided a source driving circuit, comprising: a data register receiving and storing pixel data of the display pixels; a latch connected to the data register, latching the pixel data in response to a strobe signal, and outputting the latched pixel data; the pixel data compensation circuit is connected with the latch and used for receiving the latched pixel data, acquiring a first offset and/or a second offset according to the pixel data, and outputting corresponding source electrode driving data after compensating the pixel data according to the first offset and/or the second offset; the level shifter is connected with the pixel data compensation circuit and used for receiving the source electrode driving data, and outputting the source electrode driving data after level shifting; the digital-to-analog converter is connected with the level converter and selects gray scale voltage of corresponding grade to output according to the source electrode driving data; and an output buffer connected to the digital-to-analog converter for driving each data line to a driving voltage corresponding to the gray scale voltage.

Preferably, the pixel data compensation circuit includes: the sub-pixel sequence resetting module is connected with the latch and used for receiving the latched pixel data to reset the sub-pixel sequence, scanning and outputting the pixel data of each reset sub-pixel; and the overdrive compensation module and the sub-pixel sequence resetting module are used for receiving the pixel data of the reset sub-pixel and corresponding source electrode driving data, obtaining a first offset according to the pixel data of the reset sub-pixel and the source electrode driving data, and outputting the corresponding source electrode driving data according to the pixel data of the reset sub-pixel and the first offset.

Preferably, the pixel data compensation circuit further includes: and the position compensation module is respectively connected with the sub-pixel sequence resetting module and the overdrive compensation module and is used for receiving the pixel data of the reset sub-pixel and the first offset, obtaining a second offset according to the pixel data of the reset sub-pixel and outputting corresponding source electrode driving data according to the pixel data of the reset sub-pixel, the first offset and the second offset.

Preferably, the pixel data compensation circuit further includes: and the input end of the buffer is connected with the latch, and the output end of the buffer is connected with the sub-pixel sequence resetting module and is used for buffering pixel data and transmitting the buffered pixel data to the sub-pixel sequence resetting module.

Preferably, the pixel data compensation circuit further includes: the sequence control register is connected with the sub-pixel sequence resetting module and transmits pixel data to the sub-pixel sequence resetting module; and the overdrive offset register is connected with the overdrive compensation module and is used for transmitting corresponding threshold data, compensation value data and source electrode driving data to the overdrive compensation module.

Preferably, the pixel data compensation circuit further includes: and the position offset register is connected with the position compensation module and is used for transmitting corresponding parameter data and reference point compensation value data to the position compensation module.

Preferably, the sequence control register, the overdrive offset register and the position offset register each store data in binary form.

According to the driving chip provided by the invention, the driving chip comprises the source driving circuit, and the source driving circuit provides source driving data.

According to the present invention, there is provided a display device comprising: the display panel comprises a plurality of data lines, a plurality of scanning lines and a plurality of pixels; the grid driving circuit is connected with the plurality of scanning lines of the display panel and used for sequentially driving the plurality of scanning lines of the display panel; the source driving circuit is connected with a plurality of data lines of the display panel and used for providing corresponding source driving data for the display panel according to pixel data; and the time schedule controller is connected with the grid driving circuit and the source driving circuit and is used for providing a starting signal and a plurality of clock signals for the grid driving circuit and providing a plurality of switching signals for the source driving circuit.

Preferably, the display panel includes: a cathode ray tube display panel, a digital light processing display panel, a liquid crystal display panel, a light emitting diode display panel, an organic light emitting diode display panel, a quantum dot display panel, a Mirco-LED display panel, a Mini-LED display panel, a field emission display panel, a plasma display panel, an electrophoresis display panel, or an electrowetting display panel.

The beneficial effects of the invention are: the invention is used for carrying out offset compensation on the source electrode data of the pixel, better data compensation can be carried out on the pixel data of each sub-pixel by calculating the overdrive offset and the position offset of the pixel, and then a plurality of data lines are driven by the compensated pixel data so as to drive the pixel, so that the pixel liquid crystal is driven to the expected voltage quickly, the charging speed and the response time are accelerated, the color cast phenomenon is avoided, and the quality of a display panel is improved.

The pixel is only compensated by source voltage without overdrive, so that the problem of color dragging caused by different voltages corresponding to different pixel colors is well solved. Meanwhile, any previous frame data does not need to be stored, and storage resources are saved.

The invention carries out position compensation on the pixel data of each sub-pixel, solves the problem of serious resistance-capacitance load caused by the lengthening of the source electrode driving wire of the panel, and further accelerates the charging speed and the charging speed of the source electrode data wire.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.

Fig. 1 illustrates a schematic structure of a frame-based overdrive method in the prior art;

fig. 2 is a schematic structural diagram of a display device according to an embodiment of the present invention;

FIG. 3(a) is a schematic diagram of an internal circuit structure of the display panel and the source driver panel shown in FIG. 2;

fig. 3(b) shows a schematic structural view of a part of the pixel array in fig. 3 (a);

fig. 4 is a flowchart illustrating a display driving method according to a first embodiment of the present invention;

fig. 5 is a flowchart illustrating a display driving method according to a second embodiment of the present invention;

fig. 6 is a schematic diagram illustrating a structure of a pixel data compensation circuit according to an embodiment of the present invention;

FIGS. 7(a) and 7(b) are schematic diagrams illustrating a method for pixel data position compensation according to an embodiment of the present invention;

fig. 8 and 9 are diagrams illustrating the effect of the row-based source voltage compensation method according to the embodiment of the present invention.

Detailed Description

To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

The present invention will be described in detail below with reference to the accompanying drawings.

1. Display device

Fig. 2 is a schematic structural diagram of a display device according to an embodiment of the present invention, fig. 3(a) is a schematic structural diagram of internal circuits of the display panel and the source driver panel in fig. 2, and fig. 3(b) is a schematic structural diagram of a portion of the pixel array in fig. 3 (a).

As shown in fig. 2, the display device 100 includes a display panel 1, a timing control circuit 2, a source driving circuit 3, and a gate driving circuit 4.

1.1 display Panel

As shown in fig. 3(a) and 3(b), the display panel 1 includes a plurality of data lines S1 to Sn, a plurality of scan lines G1 to Gm, and a plurality of pixels disposed at positions where the respective data lines and scan lines intersect. Any pixel includes a TFT (thin film transistor), a pixel electrode, and a common electrode having a common voltage Vcom disposed opposite to the pixel electrode. Wherein m and n are both natural numbers.

Further, a plurality of pixels are arranged in a matrix of m rows and n columns. Each pixel includes a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B.

In a preferred embodiment, the display panel 1 is a dual-gate display panel, and a dual-gate pixel structure is adopted, that is, one row of pixel units is driven by two gate lines, and one data line is connected with two columns of sub-pixels. Compared with the lcd adopting the single gate type pixel structure, the lcd adopting the dual gate type pixel structure has the advantages that the number of scan lines (scan lines) is doubled, i.e. the number of gate driving chips is doubled, and the number of data lines (data lines) is halved, i.e. the number of source driving chips is halved. Because the cost and the power consumption of the grid electrode driving chip are lower than those of the source electrode driving chip, the double-gate type pixel structure design can reduce the production cost and the power consumption. Meanwhile, the dual gate pixel architecture is usually driven by column inversion or row inversion to improve the image quality.

Further, the display panel 1 includes, but is not limited to: any one of a cathode ray tube display panel, a digital light processing display panel, a liquid crystal display panel, a light emitting diode display panel, an organic light emitting diode display panel, a quantum dot display panel, a Mirco-LED display panel, a Mini-LED display panel, a field emission display panel, a plasma display panel, an electrophoretic display panel, or an electrowetting display panel.

1.2 sequential control circuit

The timing control circuit 2 is connected to the source driving circuit 3 and the gate driving circuit 4, respectively, for providing a plurality of switching signals SWn to the source driving circuit 3, and a start signal STV and a plurality of clock signals CLKm to the gate driving circuit 4.

1.3 Source driver Circuit

The source driving circuit 3 is connected to the data lines S1 to Sn of the display panel 1 for providing corresponding source driving data to the display panel 1 according to the pixel data.

More specifically, as shown in fig. 3(a), the source drive circuit 3 includes a data register 31, a latch 32, a pixel data compensation circuit 33, a level shifter 34, a digital-to-analog (D/a) converter 35, and an output buffer 36. Wherein, the input end of the latch 32 is connected with the output end of the data register 31; the input terminal of the pixel data compensation circuit 33 is connected to the output terminal of the latch 32; an input terminal of the level shifter 34 is connected to an output terminal of the pixel data compensation circuit 33; an input end of a digital-to-analog (D/a) converter 35 is connected to an output end of the level shifter 34, and an output end of the digital-to-analog (D/a) converter 35 is connected to an input end of an output buffer 36; the output terminal of the output buffer 36 is connected to a plurality of data lines S1 to Sn.

In this embodiment, the data register 31 receives and stores pixel data of the display pixels. The latch 32 latches the pixel data from the data register 31 in response to the strobe signal and outputs the latched pixel data. The level shifter 34 is used for receiving the source driving data, performing level shifting on the source driving data, and outputting the source driving data to the digital-to-analog converter 35. The dac 35 selects a corresponding gradation gray scale voltage according to the source driving data and outputs the selected gradation gray scale voltage. The output buffer 36 is used for driving each data line to a driving voltage corresponding to the gray-scale voltage, thereby completing the charging of the pixel.

Further, the pixel data compensation circuit 33 is configured to receive the pixel data latched by the latch 32, and is configured to receive the latched pixel data, obtain a first offset and/or a second offset according to the pixel data, and output corresponding source driving data to the level shifter 34 after compensating the pixel data according to the first offset and/or the second offset.

1.3.1 Pixel data Compensation Circuit

Fig. 6 is a schematic structural diagram of a pixel data compensation circuit according to an embodiment of the present invention.

As shown in fig. 6, the pixel data compensation circuit 33 includes: sub-pixel sequence reset module 331 and overdrive compensation module 332

The sub-pixel sequence resetting module 331 is connected to the latch 32, and is configured to receive the pixel data latched in the latch 32, reset the sub-pixel sequence according to the pixel data, and scan and output the pixel data of each reset sub-pixel.

Further, the pixel data compensation circuit 33 further includes a buffer 337, an input terminal of the buffer 337 is connected to the latch 32, an output terminal of the buffer 337 is connected to the sub-pixel sequence resetting module 331 for buffering the pixel data and transmitting the buffered pixel data to the sub-pixel sequence resetting module 331, and the sub-pixel sequence resetting module 331 resets the sub-pixel sequence according to the pixel data of the current column received from the latch 32 and the pixel data of the first N columns received from the buffer 337. Wherein N is a natural number.

It should be noted that, the value of N is different according to the panel requirements of different customers/different specifications, and will not be described in detail here.

The overdrive compensation module 332 is connected to the sub-pixel sequence resetting module 331, and is configured to receive the pixel data of the reset sub-pixel and the corresponding source driving data, obtain a first offset according to the pixel data of the reset sub-pixel and the source driving data, and output the corresponding source driving data according to the pixel data of the reset sub-pixel and the first offset.

Further, the overdrive compensation module 332 obtains the source driving data by adding the pixel data of the reset sub-pixel and the corresponding first offset.

In a preferred embodiment, the pixel data compensation circuit 33 further includes: a position compensation module 333.

The position compensation module 333 is respectively connected to the sub-pixel sequence resetting module 331 and the overdrive compensation module 332, and is configured to receive the pixel data and the first offset of the reset sub-pixel, obtain a second offset according to the pixel data of the reset sub-pixel, and output corresponding source driving data according to the pixel data of the reset sub-pixel, the first offset, and the second offset.

Further, the position compensation module 333 adds the pixel data of the reset sub-pixel and the corresponding first offset and second offset to obtain the source driving data.

Further, the output end of the position compensation module 333 is connected to the level shifter 34, and the source driving data output by the position compensation module 333 is output to the level shifter 34, and then output to the corresponding data line of the display panel 1 after level shifting.

Preferably, the pixel data compensation circuit 33 is further provided with a sequence control register 334 and an overdrive offset register 335.

The sequence control register 334 is connected to the sub-pixel sequence resetting module 331, and is configured to transmit pixel data to the sub-pixel sequence resetting module 331. The overdrive offset register 335 is coupled to the overdrive compensation module 332 for transmitting corresponding threshold data, compensation value data and source drive data to the overdrive compensation module 332.

In a preferred embodiment, the pixel data compensation circuit 33 is further provided with a position shift register 336.

The position offset register 336 is coupled to the position compensation module 333 for transmitting corresponding parameter data and reference point compensation value data to the position compensation module 333.

Further, each of the above registers stores data in a binary data format.

1.4 Gate drive Circuit

The gate driving circuit 4 is connected to the plurality of scan lines G1 to Gm of the display panel 1 for sequentially driving the plurality of scan lines G1 to Gm on the display panel 1. When the plurality of data lines S1 to Sn are driven in a state where the scan lines G1 to Gm are activated, gray scale voltages corresponding to pixel data are written in pixels connected to the activated plurality of scan lines G1 to Gm through the plurality of data lines S1 to Sn, and the pixels are thereby driven to be charged.

Some application scenarios of the pixel data compensation of the embodiment are introduced above, and a specific pixel data compensation method is described below.

Example one

Fig. 4 is a flowchart illustrating a display driving method according to a first embodiment of the present invention.

As shown in fig. 4, in the present embodiment, the display driving method is used for driving a plurality of sub-pixels in a dual-gate display panel via a plurality of data lines, and includes steps S01 to S05, which are as follows:

in step S01, first source driving data is obtained according to the first pixel data.

In this embodiment, with reference to fig. 3(a), the pixel data latched by the latch 32 is input into the pixel data compensation circuit 33, and the pixel data compensation circuit 33 receives the pixel data in rows and resets the sub-pixel sequence according to the pixel data of the current column and the first N columns of the received pixel data, so as to adapt to the specific glass structure in the dual-gate display panel of this embodiment.

Further, after obtaining the reset sub-pixel sequence, scanning the reset sub-pixel sequence to sequentially output pixel data corresponding to a plurality of sub-pixels, for example, outputting first pixel data corresponding to a first sub-pixel, outputting second pixel data corresponding to a second sub-pixel, and so on.

After the first pixel data is output, first source driving data for driving the corresponding sub-pixel (target sub-pixel) is obtained according to the first pixel data.

Further, if the first pixel data is pixel data of a first sub-pixel corresponding to the start of the display panel, the first source driving data is the first pixel data or pixel data after the first pixel data undergoes second offset compensation. The content of the second offset compensation will be described below.

If the first pixel data is pixel data corresponding to any other sub-pixel in the display panel, the first source driving data is the pixel data which is finally driven by the sub-pixel and subjected to offset compensation.

In step S02, in the first scan interval, a first sub-pixel of the plurality of sub-pixels is driven according to the first source driving data.

In this embodiment, the first source driving data is the final driving data of the driving target sub-pixel (the first sub-pixel). In a first scanning interval of frame data, when a first sub-pixel needs to be driven, the first source driving data is output to a level conversion circuit, and then a driving voltage corresponding to the first source driving data is applied to a data line connected with the first sub-pixel, so that the first sub-pixel is driven.

In step S03, a first offset is obtained according to the comparison result of the second pixel data and the first source driving data.

In this embodiment, the second pixel data is pixel data corresponding to the second sub-pixel obtained by scanning and resetting the post-sub-pixel sequence. And scanning and outputting the second pixel data after the first sub-pixel is driven.

Further, the first sub-pixel is adjacent to the second sub-pixel in position and is driven through the same data line.

Preferably, each time one sub-pixel data obtained by scanning is received, first, whether the driving grayscale voltage corresponding to the pixel data of the current moment of the target sub-pixel is the same as the driving grayscale voltage corresponding to the pixel data of the previous moment of the target sub-pixel is compared. If the first offset is equal to the second offset, the first offset is 0, that is, the compensation of the first offset on the second pixel data is not needed; if the first pixel data and the second pixel data are different, the first offset is obtained according to the following method, and then the first offset is compensated for the second pixel data.

In this embodiment, the method for obtaining the first offset includes: calculating a difference between the second pixel data and the first source driving data; determining the interval of the difference value; and determining a first offset according to the interval where the difference value is located.

Specifically, when the difference is in the first interval, the second pixel data is not compensated, that is, the first offset is 0; when the difference is in the second interval, adding the first compensation value (offset1) to the second pixel data, i.e. the first offset amount is the first compensation value (offset 1); when the difference is in the third interval, adding the second compensation value (offset2) to the second pixel data, i.e. the first offset amount is the second compensation value (offset 2); when the difference is in the fourth interval, the third compensation value (offset3) is added to the second pixel data, i.e., the first offset amount is the third compensation value (offset 3).

Further, the first interval corresponds to an interval where the difference is smaller than the first threshold TH 1; the second interval corresponds to the interval of the difference value when the difference value is greater than the first threshold value TH1 and less than the second threshold value TH 2; the third interval corresponds to the interval of the difference value when the difference value is greater than the second threshold value TH2 and less than the third threshold value TH 3; the fourth interval corresponds to the interval where the difference is greater than the third threshold TH 3.

Table 1 shows the first threshold TH1, the second threshold TH2, and the third threshold TH3, the data storage format in the register, and the preset values in the present embodiment. The method comprises the following specific steps:

storing data	Storing bits	Preset value
			TH1	[7:0]	30
TH2	[7:0]	128
			TH3	[7:0]	200

The data storage formats of the first threshold TH1, the second threshold TH2 and the third threshold TH3 in the register are binary data formats stored by 8 bits, and the stored bits of 8 bits are data bits.

In this embodiment, the preset value of the first threshold TH1 is 30, the preset value of the second threshold TH2 is 128, and the preset value of the third threshold TH3 is 200. It should be noted that the preset value is only exemplary, and should not be taken as a limitation of the present invention.

Table 2 shows data storage formats and preset values of the first compensation value (offset1), the second compensation value (offset2), and the third compensation value (offset3) in the register in the present embodiment. The method comprises the following specific steps:

storing data	Storing bits	Preset value
			offset1	[7]Sign bit, [6:0 ]]Data bit	xx
offset2	[7]Sign bit, [6:0 ]]Data bit	xx
			offset3	[7]Sign bit, [6:0 ]]Data bit	xx

The data storage formats of the first compensation value (offset1), the second compensation value (offset2) and the third compensation value (offset3) in the register are binary data formats stored in 8 bits, wherein the most significant bit is a sign bit (1 is positive, 0 is negative), and the other bits are data bits.

In this embodiment, the second offset is an overdrive offset for performing overdrive compensation on the pixel data of the sub-pixel.

In this embodiment, the preset value xx indicates that the compensation value should be configured according to parameters such as specific panel attributes and pixel layouts, which is not limited in the present invention.

Second source driving data is obtained according to the second pixel data and the first offset in step S04.

In this embodiment, the second pixel data and the first offset are added to obtain the second source driving data.

Further, the above-mentioned addition operation is, for example, an addition operation of binary data, and the principle of "one-by-one" is adopted, for example, the addition operation of binary data 1110 and 1011 is:

in the above example, "1110" and "1011" are the values of the second pixel data and the first offset, respectively, and "11001" is the value of the second source driving data.

Further, when the storage bit numbers of two binary data are different, a plurality of 0 s are added to the left side of the data bit of the other binary data until the data bit numbers of the two binary data are the same, based on the binary data of multiple bits. When the binary data is stored with a sign bit, a negative value is represented by "1", a positive value is represented by "0", and a plurality of additional 0's are positioned at the right side of the "1" or "0" representing the sign bit.

When the sign bits of the two binary data subjected to the addition operation are the same, the data bits of the two binary data are subjected to the corresponding addition operation by adopting the method, and the sign bits of the binary data in the present table are both '0'.

When the sign bits of two binary data subjected to addition operation are different, the data bits of the two binary data are subjected to subtraction operation by adopting a rule of one having two, and the sign bit of the binary data representing the difference is based on the sign bit of the binary data with a larger data bit in the two binary data. For example:

it should be noted that the following addition embodiments all use the same rule as that used herein, and the description is not repeated.

In step S05, in the second scan interval, a second sub-pixel of the plurality of sub-pixels is driven according to the second source driving data.

In this embodiment, the second source driving data is the final driving data for driving the second sub-pixel. And in a second scanning interval of frame data, when a second sub-pixel needs to be driven, outputting the second source driving data to the level conversion circuit, and further applying a driving voltage corresponding to the second source driving data to a data line connected with the second sub-pixel to complete the driving of the second sub-pixel.

In this embodiment, by using the display driving method, the pixel data of each sub-pixel can be better compensated, so as to quickly drive the pixel liquid crystal to a desired voltage, and accelerate the charging speed and the response time.

Example two

Fig. 5 shows a flowchart of a display driving method according to a second embodiment of the present invention, and fig. 7(a) and 7(b) show schematic diagrams of a method for compensating a pixel data position according to an embodiment of the present invention.

In this embodiment, the display driving method is used for driving a plurality of sub-pixels in a dual-gate display panel via a plurality of data lines, and includes steps S11 to S16, which are as follows:

in step S11, first source driving data is obtained according to the first pixel data.

In step S12, in the first scan interval, a first sub-pixel of the plurality of sub-pixels is driven according to the first source driving data.

In step S13, a first offset is obtained according to the comparison result of the second pixel data and the first source driving data.

In this embodiment, steps S11 to S13 are the same as steps S01 to S03 in the first embodiment, and reference is made to the above description, so that redundant description is not provided herein.

In step S14, a second offset amount is obtained from the second pixel data.

In this embodiment, a bilinear interpolation method is used to perform vertical and horizontal offset compensation on the pixel when the second offset is obtained, and the specific method includes: setting a plurality of reference points to regionalize the display panel; determining the area where the target pixel is located; the second offset is calculated based on the parameters of the region.

As shown in fig. 7(a) and 7(b), in the present embodiment, a plurality of reference points (P1 to P9) are provided on the display panel, and the plurality of reference points (P1 to P9) may divide the display panel into four quadrant regions. For example: it is set that a panel portion between reference points P1, P2, P4, and P5 is a first quadrant region of the display panel, a panel portion between reference points P2, P3, P5, and P6 is a second quadrant region of the display panel, a panel portion between reference points P4, P5, P7, and P8 is a third quadrant region of the display panel, and a panel portion between reference points P5, P6, P8, and P9 is a fourth quadrant region of the display panel.

It should be noted that the bilinear interpolation method is only a preferred embodiment of the present invention, and in other embodiments of the present invention, other interpolation methods such as: any of nearest neighbor interpolation, resampling interpolation using pixel region relations, bicubic interpolation of 4 × 4 pixel neighborhoods, and Lanczos interpolation of 8 × 8 pixel neighborhoods.

Optionally, each quadrant region comprises four reference points.

Furthermore, the first quadrant region, the second quadrant region, the third quadrant region and the fourth quadrant region jointly form a pixel region of the display panel.

The first quadrant region and the second quadrant region are equal in length and width, and the third quadrant region and the fourth quadrant region are equal in length and width. And the first quadrant region and the second quadrant region are close to a driving IC (corresponding to a driving chip in the following description), and the third quadrant region and the fourth quadrant region are far from the driving chip.

Further, in the present embodiment, the driving chip includes a source driving circuit as shown in fig. 3(a) and fig. 6, and the source driving circuit is connected to the display panel for providing source driving data.

In the present embodiment, the distance between the reference points P1 and P4 is set to Y1, the distance between the reference points P4 and P7 is set to Y2, and Y1 and Y2 may be the same or different. Since the connection line between the pixel portion farther from the driver chip and the chip is longer on the display panel, the ratio between Y1 and Y2 can be set reasonably according to practical situations, and is not limited in this embodiment.

After the display panel is regionalized, the area of the target pixel o on the display panel is determined, as shown in fig. 7(a), the target pixel o is located in the fourth quadrant region of the display panel. Then, according to the area where the target pixel o is located, four reference points such as reference points P5, P6, P8 and P9 which are closest to the target pixel o are determined, the small pixel o to be compensated and the four reference points P5, P6, P8 and P9 which are closest to the target pixel o further divide the fourth quadrant area into four small areas, and at this time, the position compensation value of the target sub-pixel is calculated according to the length and width parameters of the four small areas, and the calculation method is as follows: the position compensation value of the target sub-pixel is (1-s) (1-t) P8+ (1-s) t P5+ s (1-t) P9+ st P6,

wherein,

as shown in fig. 7(b), L is the width of the quadrant region where the target pixel is located (i.e. the distance between two adjacent reference points along the vertical direction), W is the length of the quadrant region where the target pixel is located (i.e. the distance between two adjacent reference points along the horizontal direction), M is the horizontal distance between the target pixel and a certain reference point, such as P8, and N is the horizontal distance between the target pixel and a certain reference point, such as P8A vertical distance from a reference point such as P8. In the embodiment, L is equal to Y1 or Y2, and W is equal to one half of the width of the display panel.

Table 3 shows the data storage format and preset values of the reference points in the register in the present embodiment.

The method comprises the following specific steps:

the data storage format of the compensation value of each reference point in the register is a binary data format of 8-bit storage, wherein the most significant bit is a sign bit (1 is positive, 0 is negative), and the other bits are data bits. The data storage format of the distance parameter of Y1 in the register is a binary data format with 10 bits of storage, and the 10 bits of storage are data bits. The data storage format of the distance parameter of Y2 in the register is a binary data format of 11-bit storage, and the 11-bit storage bits are data bits.

In the embodiment, by reasonably setting the values of Y1 and Y2, the influence of the effect on the pixel charging time can be effectively compensated.

In this embodiment, the second offset is a position offset for performing position compensation on the pixel data of the sub-pixel.

In step S15, second source driving data is obtained according to the second pixel data, the first offset and the second offset.

In this embodiment, the second pixel data, the first offset and the second offset are added to obtain the second source driving data.

In step S16, in a second scan interval, a second sub-pixel of the plurality of sub-pixels is driven according to the second source driving data.

In this embodiment, the step S16 is the same as the step S05 in the first embodiment, and reference is made to the above description, which will not be described in detail herein.

Preferably, the scanning of the pixel data of the reset sub-pixels is performed in synchronization with the compensation of the pixel data. That is, each time one sub-pixel data is scanned out, the pixel data of the sub-pixel is compensated.

In the embodiment, position compensation, namely compensation of the second offset, is performed on the pixel data of each sub-pixel, so that the problem of serious resistance-capacitance load caused by the fact that the source electrode driving wiring of the panel is lengthened is solved, and the charging speed of the source electrode data line are further accelerated.

As shown in fig. 8 and 9, when performing source voltage compensation (including overdrive compensation and position compensation) in the present embodiment, no previous frame data is stored in the row pixels, so that the storage resource can be saved.

In the present embodiment, the driving gray scale of the subpixel Pxy depends on the driving gray scale of the previous subpixel from the same data line data as the previous subpixel.

Referring to fig. 8, assuming that the desired gray scale of the subpixel Pxy is V128 in the 1 st and 2 nd frame periods, if the driving gray scale of the previous subpixel is less than V128, in order to drive the liquid crystal to the desired voltage more quickly, the source compensation method is adopted such that the driving gray scale voltage Vyy of the current subpixel Pxy is greater than the desired gray scale V128, so as to accelerate the response time. In the 3 rd and 4 th frame periods, the desired gray scale of the sub-pixel Pxy is V64, and if the driving gray scale of the previous sub-pixel is greater than V64, in order to drive the liquid crystal to the desired voltage more quickly, a source compensation method is adopted so that the driving gray scale voltage Vxx of the current sub-pixel Pxy is smaller than the desired gray scale V64, so as to accelerate the response time.

Referring to fig. 9, assuming that the desired gray scale of the subpixel Pxy in the 1 st and 2 nd frame periods is V128, if the driving gray scale of the previous subpixel is greater than V128, in order to drive the liquid crystal to a desired voltage more quickly, a source compensation method is employed so that the driving gray scale voltage Vyy of the subpixel Pxy in the current frame is less than the desired gray scale V128 to speed up the response time. In the 3 rd and 4 th frame periods, the desired gray scale of the sub-pixel Pxy is V64, and if the driving gray scale of the previous sub-pixel is less than V64, then in order to drive the liquid crystal to the desired voltage more quickly, a source compensation method is adopted to make the driving gray scale voltage Vxx of the sub-pixel Pxy in the current frame greater than the desired gray scale V64, so as to accelerate the response time.

Further, the source voltage (Vyy/Vxx) at the subpixel Pxy is due to the use of the double gate technique to shorten the charging time.

In this embodiment, only the source voltage compensation is performed on the subpixel Pxy without overdrive, so that certain storage resources can be saved.

In summary, the present invention only compensates the source voltage of the pixel without overdriving, and does not need to store any previous frame data, thereby saving the storage resource.

Meanwhile, the source data of the pixels are also subjected to position offset compensation, so that better data compensation can be performed on the pixel data of each sub-pixel. The compensated pixel data drives a plurality of data lines to drive the pixels, so that the pixel liquid crystal is driven to an expected voltage quickly, the charging speed and the response time are accelerated, the color cast phenomenon is avoided, and the quality of the display panel is improved.

The display driving method and the source electrode driving circuit disclosed by the invention can be better suitable for a display device adopting a double-grid display panel.

It should be noted that, in this document, the contained terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications are intended to be within the scope of the present invention.

Claims

1. A display driving method for driving a plurality of sub-pixels, the display driving method comprising:

obtaining first source electrode driving data from an overdrive offset register according to first pixel data, wherein the first source electrode driving data are pixel data subjected to offset compensation;

driving a first sub-pixel of the plurality of sub-pixels according to the first source driving data in a first scanning interval;

obtaining a first offset according to a comparison result of second pixel data and the first source electrode driving data;

obtaining a second offset according to the second pixel data;

obtaining second source electrode driving data according to the second pixel data, the first offset and the second offset; and

driving a second sub-pixel of the plurality of sub-pixels according to the second source driving data in a second scanning interval,

wherein the first sub-pixel and the second sub-pixel are adjacent in position and are driven by the same data line; and obtaining a second offset from the second pixel data comprises:

setting a plurality of reference points to regionalize the display panel;

determining the region of a target sub-pixel corresponding to the second pixel data, and dividing the region into sub-regions according to the target sub-pixel and a reference point corresponding to the region;

and calculating to obtain the second offset according to the pixel data of the reference point corresponding to the region of the target sub-pixel, the length and width parameters of the region and the distance parameters between the target sub-pixel and the adjacent reference point.

2. The display driving method according to claim 1, further comprising:

receiving pixel data of a current column and pixel data of first N columns;

resetting a sub-pixel sequence according to the received pixel data; and

scanning the reset sub-pixel sequence, sequentially outputting the first pixel data and the second pixel data,

wherein N is a natural number.

3. The display driving method of claim 1, wherein obtaining the first offset according to the comparison of the second pixel data and the first source driving data comprises:

calculating a difference between the second pixel data and the first source driving data;

determining the interval of the difference value;

and determining the first offset according to the located interval of the difference value.

4. The display driving method according to claim 3, wherein determining the first offset amount comprises:

when the difference is smaller than a first threshold, the first offset is 0;

when the difference value is larger than the first threshold value and smaller than a second threshold value, the first offset is a first compensation value;

when the difference value is larger than the second threshold and smaller than a third threshold, the first offset is a second compensation value;

when the difference is greater than the third threshold, the first offset is a third compensation value.

5. The display driving method according to claim 1, wherein the region comprises: one of the first quadrant region, the second quadrant region, the third quadrant region and the fourth quadrant region,

wherein each quadrant region comprises four reference points,

the first quadrant region, the second quadrant region, the third quadrant region and the fourth quadrant region constitute a pixel region of the display panel.

6. The display driving method according to claim 5, wherein the second offset amount is calculated by:

，

wherein,

p5, P6, P8 and P9 are respectively pixel data of a reference point corresponding to a quadrant region where the target sub-pixel is located, L is the width of the quadrant region where the target sub-pixel is located, W is the length of the quadrant region where the target sub-pixel is located, M is the horizontal distance between the target sub-pixel and an adjacent reference point, and N is the vertical distance between the target sub-pixel and the adjacent reference point.

7. The display driving method according to claim 1, wherein the method of obtaining the second source driving data comprises:

and adding the second pixel data and the first offset to obtain second source electrode driving data.

8. The display driving method according to claim 1, wherein the method of obtaining the second source driving data comprises:

and adding the second pixel data, the first offset and the second offset to obtain second source electrode driving data.

9. A source driver circuit, comprising:

a data register receiving and storing pixel data of the display pixels;

a latch connected to the data register, latching the pixel data in response to a strobe signal, and outputting the latched pixel data;

the pixel data compensation circuit is connected with the latch and used for receiving source electrode driving data and the latched pixel data, acquiring a first offset and a second offset according to the source electrode driving data and the pixel data, and outputting corresponding source electrode driving data after compensating the pixel data according to the first offset and the second offset;

the level shifter is connected with the pixel data compensation circuit and used for receiving the source electrode driving data, and outputting the source electrode driving data after level shifting;

the digital-to-analog converter is connected with the level converter and selects gray scale voltage of corresponding grade to output according to the source electrode driving data; and

an output buffer connected to the DAC for driving each data line to a driving voltage corresponding to the gray scale voltage,

wherein the pixel data compensation circuit is configured to output the corresponding source driving data in accordance with the display driving method as claimed in any one of claims 1 to 8.

10. The source driver circuit according to claim 9, wherein the pixel data compensation circuit comprises:

the sub-pixel sequence resetting module is connected with the latch and used for receiving the latched pixel data to reset the sub-pixel sequence, scanning and outputting the pixel data of each reset sub-pixel;

and the overdrive compensation module and the sub-pixel sequence resetting module are used for receiving the pixel data of each sub-pixel after resetting and corresponding source electrode driving data, obtaining a first offset according to the pixel data of each sub-pixel after resetting and the source electrode driving data, and outputting the corresponding source electrode driving data according to the pixel data of each sub-pixel after resetting and the first offset.

11. The source driver circuit of claim 10, wherein the pixel data compensation circuit further comprises:

and the position compensation module is respectively connected with the sub-pixel sequence resetting module and the overdrive compensation module and is used for receiving the pixel data of each reset sub-pixel and the first offset so as to obtain a second offset according to the pixel data of each reset sub-pixel and output corresponding source electrode driving data according to the pixel data of each reset sub-pixel, the first offset and the second offset.

12. The source driver circuit of claim 10, wherein the pixel data compensation circuit further comprises:

and the input end of the buffer is connected with the latch, and the output end of the buffer is connected with the sub-pixel sequence resetting module and is used for buffering pixel data and transmitting the buffered pixel data to the sub-pixel sequence resetting module.

13. The source driver circuit of claim 11, wherein the pixel data compensation circuit further comprises:

the sequence control register is connected with the sub-pixel sequence resetting module and transmits pixel data to the sub-pixel sequence resetting module;

and the overdrive offset register is connected with the overdrive compensation module and is used for transmitting corresponding threshold data, compensation value data and source electrode driving data to the overdrive compensation module.

14. The source driver circuit of claim 13, wherein the pixel data compensation circuit further comprises:

and the position offset register is connected with the position compensation module and is used for transmitting corresponding parameter data and reference point compensation value data to the position compensation module.

15. The source driver circuit of claim 14, wherein the sequence control register, the overdrive offset register and the position offset register each store data in binary form.

16. A chip comprising the source driver circuit of any of claims 9 to 15 thereon, the source driver circuit providing source driving data.

17. A display device, comprising:

the display panel comprises a plurality of data lines, a plurality of scanning lines and a plurality of pixels;

the grid driving circuit is connected with the plurality of scanning lines of the display panel and used for sequentially driving the plurality of scanning lines of the display panel; and

the source driving circuit as claimed in any one of claims 9 to 15, connected to a plurality of data lines of the display panel for providing corresponding source driving data to the display panel according to pixel data; and

and the time schedule controller is connected with the grid driving circuit and the source driving circuit and is used for providing a starting signal and a plurality of clock signals for the grid driving circuit and providing a plurality of switch signals for the source driving circuit.

18. The display device according to claim 17, wherein the display panel comprises: a cathode ray tube display panel, a digital light processing display panel, a liquid crystal display panel, a light emitting diode display panel, an organic light emitting diode display panel, a quantum dot display panel, a Mirco-LED display panel, a Mini-LED display panel, a field emission display panel, a plasma display panel, an electrophoresis display panel, or an electrowetting display panel.