CN110571229A - Embedded light sensing module and manufacturing method thereof - Google Patents

Embedded light sensing module and manufacturing method thereof Download PDF

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Publication number
CN110571229A
CN110571229A CN201810570296.9A CN201810570296A CN110571229A CN 110571229 A CN110571229 A CN 110571229A CN 201810570296 A CN201810570296 A CN 201810570296A CN 110571229 A CN110571229 A CN 110571229A
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China
Prior art keywords
light sensing
substrate
layer
insulating layer
sensing chip
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CN201810570296.9A
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Chinese (zh)
Inventor
黄立湘
王泽东
缪桦
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Shennan Circuit Co Ltd
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Shennan Circuit Co Ltd
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Priority to CN201810570296.9A priority Critical patent/CN110571229A/en
Publication of CN110571229A publication Critical patent/CN110571229A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14618Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/1469Assemblies, i.e. hybrid integration

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The application provides an embedded photo sensor module and a method for manufacturing the same. The manufacturing method comprises the following steps: providing a substrate with a through groove; arranging an adhesive piece on the first side of the substrate, wherein the adhesive piece covers the through groove; providing a light sensing chip, wherein the light sensing chip comprises a light sensing surface and a bottom surface which are oppositely arranged, and the light sensing chip is provided with a leading-out terminal; placing the light sensing chip in the through groove, and adhering the light sensing surface to the adhering piece; arranging an insulating layer in the through groove in which the light sensing chip is placed, and fixing the light sensing chip by pressing the insulating layer; the leading-out terminal of the light sensing chip is electrically connected with the peripheral circuit. Through burying the chip in leading to the groove, greatly reduced the thickness of whole chip module. In addition, the pasting piece and the insulating layer are arranged oppositely, on one hand, the chip can be fixed through the pasting piece, and on the other hand, the follow-up pasting piece is convenient to remove.

Description

Embedded light sensing module and manufacturing method thereof
Technical Field
The present disclosure relates to the field of chip embedding technologies, and more particularly, to an embedded photo sensor module and a method for manufacturing the same.
Background
in general, a chip is disposed on a substrate, and then a lead terminal of the chip is electrically connected to an external circuit through a metal wire by wire bonding. The wire is typically bent over a certain arc. The thickness of the chip product obtained in the prior art is the sum of the thickness of the base material, the thickness of the chip and the bending height of the metal wire, so that the thickness of the chip product is thicker.
disclosure of Invention
the embodiment of the application adopts a technical scheme that: a method for manufacturing an embedded photo sensor module is provided, the method comprising:
Providing a substrate with a through groove, wherein the substrate is provided with a first side and a second side which are oppositely arranged;
arranging an adhesive piece on the first side of the substrate, wherein the adhesive piece covers the through groove;
providing a light sensing chip, wherein the light sensing chip comprises a light sensing surface and a bottom surface which are oppositely arranged, and the light sensing chip is provided with a leading-out terminal;
Placing the light sensing chip in the through groove, and adhering the light sensing surface to the adhering piece;
Arranging an insulating layer in the through groove for preventing the light sensing chip from being placed, and fixing the light sensing chip by pressing the insulating layer;
And the leading-out terminal of the light sensing chip is electrically connected with the peripheral circuit.
Another technical scheme adopted by the embodiment of the application is as follows: providing an embedded photo sensor module, the embedded photo sensor module being formed by the above manufacturing method, the embedded photo sensor module comprising:
the substrate is provided with a through groove and comprises a first side and a second side which are oppositely arranged;
the light sensing chip is arranged in the through groove and comprises a light sensing surface and a bottom surface which are oppositely arranged, the light sensing surface is exposed relative to the substrate, and the light sensing chip is provided with a leading-out terminal;
the insulating layer is filled in the through groove provided with the light sensing chip and used for relatively fixing the light sensing chip and the substrate;
and the peripheral circuit is electrically connected with the leading-out terminal of the light sensing chip.
This application sets up the piece of pasting that covers logical groove through the first side at the base plate that has logical groove, then places the light sense chip in logical groove to paste with pasting the piece. And then an insulating layer is arranged in the through groove, and the light sensing chip is fixed by pressing the insulating layer. Therefore, the thickness of the whole light sensing module product is greatly reduced by embedding the chip into the through groove.
In addition, the pasting piece and the insulating layer are arranged oppositely, on one hand, the chip can be fixed through the pasting piece, and on the other hand, the subsequent pasting piece can be removed conveniently.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts. Wherein:
Fig. 1 is a schematic structural diagram of an embedded photo sensor module according to an embodiment of the present disclosure;
FIG. 2 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure;
FIG. 3 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure;
FIG. 4 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure;
FIG. 5 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure;
FIG. 6 is a schematic flow chart illustrating a method for fabricating an embedded photo sensor module according to an embodiment of the present disclosure;
FIG. 7 is a flowchart illustrating another method for fabricating an embedded photo sensor module according to an embodiment of the present disclosure;
FIGS. 8-14 are process flow diagrams corresponding to the method of manufacture shown in FIG. 7;
FIG. 15 is a flowchart illustrating a method for fabricating an embedded photo sensor module according to an embodiment of the present disclosure;
fig. 16-20 are process flow diagrams corresponding to the method of manufacture shown in fig. 15.
Detailed Description
the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures related to the present application are shown in the drawings, not all of the structures. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first", "second", etc. in this application are used to distinguish between different objects and not to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those skilled in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embedded photo sensor module according to an embodiment of the present disclosure. As shown in fig. 1, the embedded photo sensor module 10 includes a substrate 11, a photo sensor chip 12, an insulating layer 13 and a peripheral circuit 14.
The substrate 11 includes a first side 111 and a second side 112 disposed opposite to each other. The substrate 11 may be a hard substrate. The rigid substrate may be a PCB (Printed Circuit Board) substrate, a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, or the like. The present embodiment will be described in detail by taking the substrate as a PCB substrate.
In other embodiments, the substrate may also be a flexible substrate.
the substrate 11 is provided with a through groove 110, the through groove 110 penetrates through the substrate 11, and the size of the through groove 110 may be larger than that of the photo chip 12.
Specifically, the size of the through-groove 110 in the thickness direction of the substrate 11 may be larger than that of the photo chip 12, so that the substrate 11 may protect the photo chip 12 during lamination, and reduce the pressure on the photo chip 12 during lamination. The size of the through-groove 110 in the direction perpendicular to the thickness direction of the substrate 11 may be larger than the size of the light sensing chip 12, facilitating the light sensing chip 12 to be embedded in the through-groove 110 without damage and with precision.
in other embodiments, the size of the through groove 110 in the thickness direction of the substrate 11 may be equal to or smaller than the size of the photo chip 12. The size of the through-groove 110 in a direction perpendicular to the thickness direction of the substrate 11 may be equal to the size of the photo chip 12.
the light sensing chip 12 may include a camera chip for photographing and may also include a fingerprint chip for light sensing fingerprint identification.
it should be understood that any chip that operates by light sensing is within the scope of the embodiments of the present application.
In this embodiment, the photo sensor chip 12 includes a photo sensing surface 125 and a bottom surface 126 disposed opposite to each other. The photosensitive surface 125 is disposed on the first side 111 of the substrate 11, and the bottom surface 126 is disposed on the second side 112 of the substrate 11.
the photo sensor chip 12 has lead terminals 121. As shown in fig. 1, the number of the lead terminals 121 of the photo sensor chip 12 is two, and the two lead terminals are respectively disposed at two ends of the photo sensor chip 12. Here, the lead-out terminal 121 may be disposed on the photo sensor chip 12, and may be electrically connected to an external circuit through a conductive medium. For example, may be an I/O (input/output) terminal, including an input terminal and an output terminal, typically in the form of a pad or copper pillar.
In other embodiments, the number and positions of the leading terminals 121 of the photo-sensing chip 12 may also be set according to practical situations.
The photo sensor chip 12 is disposed in the through groove 110. And the photo chip 12 is spaced apart from the side wall of the through-groove 110 with a gap therebetween in the range of (10, 150) μm.
The light sensing surface 125 of the light sensing chip 12 is exposed with respect to the substrate 11, and the lead terminals 121 are disposed on the exposed light sensing surface 125 in a direction toward the first side 111 of the substrate 11. That is, the photosensitive surface 125 of the photo chip 12 is not covered by the substrate 11.
the light sensing surface 125 of the light sensing chip 12 is almost flush with the surface of the substrate 11 on the first side 111. The height difference between the two can be (-60, +60) micrometer, and also can be (-30, +30) micrometer.
The insulating layer 13 fills the through-groove 110 in which the photo chip 12 is disposed. For fixing the light sensing chip 12 and the substrate 11 relatively.
The insulating layer 13 is made of a material that is insulating and adhesive under certain conditions (e.g., high temperature and high pressure). For example, epoxy resin series materials, polyimide series materials. The insulating and adhesive material fills the through-slots 110. Thus, the four side surfaces of the photo chip 12 spaced from the through-groove 110 and the bottom surface 126 on the second side 112 are all encapsulated by the insulating layer 13.
Further, the insulating layer 13 may also cover the surface of the substrate 11 on the second side 112.
The peripheral circuit 14 may be made of copper, aluminum, silver, or other metal materials and alloys thereof.
the peripheral wiring 14 is electrically connected to the lead-out terminal 121 of the photo sensor chip 12. The peripheral wiring 14 includes wiring layers 141, 142 provided on the substrate 11 and a wiring layer 143 provided on the insulating layer 13.
specifically, the wiring layers 141 and 142 are disposed on the surfaces of the substrate 11 on the first side 111 and the second side 112, respectively.
The through-trench 110 is opened in a region of the substrate 11 located outside the wiring layers 141 and 142.
The lead terminals 121 of the photo sensor chip 12 disposed in the through-groove 110 are electrically connected to the circuit layer 141 after being bridged in the air by the metal connecting wires 122. And a plastic sealant 123 is plastic-encapsulated on the metal connecting wire 122. This application adopts metal connecting wire 122 to realize the mode of cross-over connection between leading-out terminal 121 and the circuit layer 141, compares in the mode that adopts attached wire on light sense chip 12 to realize the electric connection between leading-out terminal 121 and the circuit layer 141, and this application is less to the influence that the electrical property of light sense chip 12 caused. This is because the PAD (PAD) of the photo chip 12 is surrounded by an insulating region having a smooth surface to which the wire needs to be adhered by high temperature, which affects the electrical performance of the photo chip 12, and the wire is easily broken even if the wire is adhered by high temperature.
The embedded photo sensor module further includes a transparent cover 124 disposed on a photo-sensing surface 125 of the photo sensor chip 12, i.e. a surface exposed relative to the substrate 11, for covering the photo sensor chip 12. As can be seen from fig. 1, the transparent cover 124 has an area smaller than that of the photo chip 12, and is disposed in the middle of the lead terminals 121 located on opposite sides of the photo chip 12 (specifically, opposite sides in a direction perpendicular to the thickness direction of the substrate 11). The transparent cover 124 cannot cover the terminals 121, which easily results in that the signals of the optical sensor chip 12 cannot be led out.
the transparent cover 124 may be made of glass, plastic, etc. The area of the light sensing chip 12 corresponding to the transparent cover plate 124 is a sensing area for receiving light signals.
The wiring layer 143 is disposed on a surface of the insulating layer 13 remote from the substrate 11.
The outer surface of the peripheral circuit 14 may be provided with an insulating layer for insulation protection. For example, the surface of the wiring layer 141 away from the substrate 11 may be further provided with an insulating layer 17 for insulation protection. The surface of the wiring layer 142 away from the substrate 11 is provided with an insulating layer 13 for insulation protection. The surface of the wiring layer 143 remote from the insulating layer 13 may be further provided with an insulating layer 18 for insulation protection.
As described above, the insulating layer 13 may be made of an insulating and adhesive material, such as an epoxy resin material and a polyimide material.
And the insulating layers 17 and 18 may be made of a material having only an insulating function, for example, an ink material may be used.
The insulating layer may be disposed only on the corresponding circuit layer, or may further cover a region other than the circuit layer.
The wiring layers 141, 142, 143 are electrically connected.
Specifically, the wiring layers 141 and 142 are electrically connected through the conductive via 113 penetrating the substrate 11. The conductive hole 113 may be a laser hole (the cross section is trapezoidal, the diameter is gradually reduced along the length direction, and is generally solid), or a mechanical hole (the cross section is rectangular, and the diameter is not changed along the length direction); in general, the dielectric thickness of the substrate 11 is large in order to accommodate the photo chip 12, and therefore, the conductive hole 113 needs to be formed by a mechanical drilling method.
The wiring layers 142 and 143 are electrically connected through conductive holes 131 penetrating the insulating layer 13. The conductive vias 131 are typically laser drilled (mainly because mechanical drilling is costly and the via depth is not easily controlled).
The conductive via 113 and the conductive via 131 need to be electrically connected through a metal layer. As shown in fig. 1, the conductive via 113 and the conductive via 131 are electrically connected through the wiring layer 142.
The circuit layer 142 includes at least one conductive line, and typically a plurality of conductive lines. The conductive lines of the circuit layer 142 electrically connected to the circuit layer 141 and the circuit layer 143 are the same conductive line. That is, one of the conductive lines of the circuit layer 142 is electrically connected to the circuit layer 141 through the conductive via 113, and the conductive line is also electrically connected to the circuit layer 143 through the conductive via 131. So that the line layers 141 and 143 can be electrically connected through the one conductive line of the line layer 142.
Depending on the location, the conductive via 113 may be a through hole, which is disposed directly through the substrate 11 when the substrate 11 is provided. The conductive vias 131 may be blind vias, which are disposed after the insulating layer 13 is formed, only penetrate the insulating layer 13, and leak out of the circuit layer 142. The detailed arrangement will be described later in the manufacturing method.
The walls of the conductive holes 113 and 131, which can realize the electrical connection of the signal transmission layer, are both provided with a metal conductive material, such as copper, and the middle of the conductive hole can be filled with an insulating material such as resin. Thus, an annular metal structure is formed in which a metal layer surrounds an insulating material such as resin at the surface of the conductive via, and the annular metal structure is electrically connected to the wiring layer as a pad. Further, both sides of the substrate are plated with metal to cover the surface of the filled resin.
It is understood that the conductive vias 113 and 131 may also be entirely filled with a conductive material. That is, the walls of the conductive vias 113 and 131 may be plated with a metal material, and the middle of the conductive vias 113 and 131 may be filled with a metal paste such as copper paste or silver paste.
The conductive holes 113 and 131 are matched to ensure the electrical connection between the circuit layers 141, 142 and 143, and to fix the position of the light sensing chip 12, an adhesive member may be disposed on the circuit layer 141, so as to avoid the damage of the light sensing chip 12 caused by the manufacturing process (such as drilling and electroplating) of the light sensing chip 12, the adhesive member should be peeled off at last, however, when the adhesive member is disposed, the peeling of the adhesive member, the residual glue (affecting the electrical performance) in the through hole, and the diffusion plating of the electroplating solution (i.e. the plating solution permeates between the adhesive member and the conductive layer 141, affecting the electrical connection relationship) are likely to occur during the processing of the through hole. Thus, the conductive holes 113 may be pre-machined before the adhesive is applied to cover the surface of the first side 111 of the substrate 11. The conductive hole 131 is further provided after the insulating layer 13 is provided. The conductive vias 113 and 131 correspond in location and may be electrically connected through the conductive layer 142. The conductive holes 113 and 131 penetrating only one functional layer are matched with each other, so that compared with the conductive holes penetrating multiple layers, the process difficulty is greatly reduced, and the reliability of the embedded type light sensing module and the product yield of the embedded type light sensing module are finally improved. The specific process will be described later in the manufacturing method.
The peripheral circuit 14 may also be provided with a plurality of other circuit layers according to practical situations, which may be arranged on the side of the circuit layer 143 away from the insulating layer 13. For a multilayer board, for example, in order to implement connections between other signal layers except the signal layer 141, blind vias are required to be punched, and usually, the blind vias are stacked to implement cross-layer electrical connection between two signal layers (at least one signal layer is separated between the two signal layers).
in addition, in order to reduce the area of the whole embedded type photosensitive module, the positions of the stacked blind holes are kept consistent in the vertical direction as much as possible.
As shown in fig. 2, wiring layers 144 and 145 are further provided on the side of the wiring layer 143 remote from the insulating layer 13. And blind vias 146 are provided in insulating layer 18 between wiring layers 143 and 144 and blind vias 147 are provided in insulating layer 19 between wiring layers 144 and 145. The blind vias 131, 146, and 147 enable electrical connection between the signal layers 142, 143, 144, and 145 in a stacked manner.
The stacked blind holes 131, 146, and 147 are uniformly positioned in the vertical direction.
referring to fig. 1, the embedded photo sensor module 10 further includes a peripheral device 15.
The peripheral component 15 is provided on the substrate 11, and is electrically connected to the wiring layer 141 on the substrate 11 by means of soldering.
It should be understood that the peripheral element 15 may also be electrically connected to other wiring layers.
the peripheral elements 15 include, but are not limited to, resistors, capacitors, inductors, and other processing chips (typically a microprocessor chip MCU). The resistor, the capacitor, the inductor, and the like may be defined as passive peripheral devices, and the processing chip may be defined as active peripheral devices. The processing chip is used for processing the optical signal collected by the light sensing chip 12 to form an instruction corresponding to the optical signal.
referring to fig. 3, fig. 3 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure. As shown in fig. 3, the embedded photo module 20 of the present embodiment is different from the embedded photo module 10 shown in fig. 1 in that: the peripheral circuit 24 of the embedded photo module 20 shown in FIG. 3 only includes a circuit layer 241 disposed on the surface of the substrate 21 on the first side 211. That is, all functional devices of the embedded photo module 20, such as the photo chip 22, the peripheral device 25, etc., are electrically connected on the circuit layer 241. Is suitable for the design of the embedded type light sensing module with simple structure.
It should be understood that, in other embodiments, the peripheral circuit of the embedded photo sensor module may include other numbers and positions of circuit layers.
Referring to fig. 4, fig. 4 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure. As shown in fig. 4, the embedded photo sensor module includes a substrate 31, a photo sensor chip 32, an insulating layer 33 and a peripheral circuit 34.
The substrate 31 includes a first side 311 and a second side 312 disposed opposite to each other. The substrate 31 is provided with a through groove 310, and the through groove 310 penetrates through the substrate 31.
the material of the substrate 31 and the relationship between the through-groove 310 and the substrate 31 are as described above, and will not be described herein.
the light sensing chip 32 may have the same functions and structures as those of the light sensing chip described above.
The photo chip 32 is disposed in the through groove 310. The photosensitive surface 325 of the photo sensor chip 32 is exposed with respect to the substrate 31. That is, the light sensing surface 325 of the light sensing chip 32 is not covered by the substrate 31.
The light sensing surface 325 of the light sensing chip 32 is almost flush with the outer surface of the substrate 31 on the first side 311. The height difference between the two can be (-60, +60) micrometer, and also can be (-30, +30) micrometer.
The lead terminals 321 of the photo chip 32 are provided on the bottom surface 326. That is, the lead terminals 321 are not provided on the exposed photosensitive surface 325 of the photo sensor chip 32.
The light sensing surface 325 of the light sensing chip 32 is further provided with a transparent cover 323, and the area of the transparent cover 323 is equal to the area of the light sensing surface 325 of the light sensing chip 32. The principle of the transparent cover 323 is as described above and will not be described herein.
The insulating layer 33 is disposed in the through groove 310, and may further cover the surface of the second side 312 of the substrate 31 for fixing the photo chip 32. The structure of the insulating layer 33 is the insulating layer 13 described above, and will not be described herein.
The peripheral circuit 34 is electrically connected to the lead terminal 321 of the photo sensor chip 32. The peripheral wiring 34 includes wiring layers 341 and 342 provided on the substrate 31 and a wiring layer 343 provided on the insulating layer 33.
Specifically, the wiring layers 341 and 342 are disposed on the surfaces of the substrate 31 on the first side 311 and the second side 312, respectively. The through-trench 310 opens at a region of the substrate 31 located outside the wiring layers 341 and 342.
the wiring layer 343 is provided on the outer surface of the insulating layer 33 away from the substrate 31.
the outer surface of the circuit layer can be provided with an insulating layer for insulation protection. For example, the insulating layer 37 is provided on the surface of the wiring layer 341 facing away from the substrate, the insulating layer 33 is provided on the surface of the wiring layer 342 facing away from the substrate 31, and the insulating layer 38 is provided on the surface of the wiring layer 343 facing away from the substrate 31. The insulating layer 33 is the insulating layer 13, the insulating layers 37 and 38 are the insulating layers 17 and 18, and they are not described herein again.
The wiring layers 341, 342, 343 are electrically connected. Specifically, the circuit layers 341 and 342 are electrically connected through the conductive hole 313 penetrating the substrate 31. The wiring layers 342 and 343 are electrically connected through the conductive holes 331 penetrating the insulating layer 33. The circuit layer 342 and the conductive vias 313 and 331 are the same as the circuit layer 142 and the conductive vias 113 and 131, respectively, and will not be described herein.
Further, the wiring layer 343 is electrically connected to the lead terminal 321 of the photo chip 32 through a conductive hole 332 (typically, a copper pillar) penetrating the insulating layer 33.
the peripheral circuit 34 may also be provided with a plurality of other circuit layers according to practical situations, and the other circuit layers may be arranged on the side of the circuit layer 343 far away from the insulating layer 33.
similarly, the embedded photo sensor module 20 further includes a peripheral device 35. Peripheral components 35 include, but are not limited to, resistors, capacitors, inductors, and other processing chips.
The resistors, capacitors, and inductors may be passive peripheral devices 351, and the processing chip (e.g., MCU) may be active peripheral devices 352.
the passive peripheral device 351 may be disposed on the substrate 31. Specifically, the passive peripheral device 351 may be adhered to the surface of the substrate 31 on the second side 312, and electrically connected to the circuit layer 343 through the conductive via 333 penetrating through the insulating layer 33.
It should be understood that the passive peripheral component 351 can also be electrically connected to other circuit layers.
In addition, the active peripheral element 352 (i.e., the MCU) may be electrically connected to the circuit layer farthest from the photo sensor chip 32, and the PAD of the active peripheral element 352 is disposed corresponding to the PAD of the photo sensor chip 32, so as to be directly connected to each other, thereby shortening the signal transmission path, increasing the transmission speed, and reducing the signal loss.
as shown in fig. 4, the circuit layer 343 is the circuit layer farthest from the photo sensor chip 32. The active peripheral element 352 is disposed (typically soldered) on the insulating layer 38 of the protection circuit layer 343 and on an outer surface of the insulating layer 38 on a side facing away from the optical sensor chip 32. The lead terminal of the active peripheral element 352 is disposed corresponding to the lead terminal of the optical sensor chip 32, and is electrically connected to the circuit layer 343 through the conductive post 353 penetrating through the insulating layer 38, so as to achieve the purpose of electrically connecting to the optical sensor chip 32 through the bridging effect of the circuit layer 343. Of course, the passive peripheral device 351 can be disposed as the active peripheral device 352.
as mentioned previously, fig. 4 illustrates a case where the peripheral circuit 34 includes a plurality of circuit layers similar to those shown in fig. 1. In practical applications, more circuit layers may be added as needed, similar to fig. 2. Alternatively, if the structure of the embedded photo sensor module is relatively simple, only one circuit layer 343 may be disposed similarly to fig. 3.
referring to fig. 5, fig. 5 is a schematic structural diagram of another embedded photo sensor module according to an embodiment of the present disclosure. As shown in fig. 5, the embedded photo module 40 of the present embodiment is different from the embedded photo module 30 shown in fig. 3 in that: the passive peripheral element 451 of the peripheral element of the embedded photo sensor module 40 shown in fig. 5 is disposed on the surface of the substrate 41 on the second side 412, and is electrically connected to the circuit layer 442 on the surface by soldering.
similarly, in practical applications, if the structure of the embedded photo sensor module is relatively simple, just two circuit layers, i.e. the circuit layers 442 and 443, can be provided as in fig. 3.
The structure of the embedded photo sensor module is described above, and the method for manufacturing the embedded photo sensor module is described below.
referring to fig. 6, fig. 6 is a schematic flow chart illustrating a method for manufacturing an embedded photo sensor module according to an embodiment of the present disclosure. As shown in fig. 6, the manufacturing method of the present embodiment includes the steps of:
Step 101: a substrate with a through groove is provided, and the substrate is provided with a first side and a second side opposite to the first side. The material of the substrate can be as described above, and is not described herein again.
Further, a wiring layer may be disposed on the substrate. The way of arranging the circuit layer on the substrate comprises the following two ways:
the first circuit layer setting mode is as follows:
And arranging a first metal layer on the second side of the substrate, and patterning the first metal layer to form a first circuit layer.
Specifically, first, a first metal layer is provided on the second side of the substrate by plating, sputtering, or the like. Further, the first metal layer is patterned to form a first circuit layer.
the patterning process may be performed by masking, etching, patterned plating, semi-additive, full-additive, sputtering, physical vapor deposition, or chemical vapor deposition.
The first metal layer can be made of copper, aluminum, silver or other metal materials and alloys thereof.
Further, a first insulating layer may be disposed on the first line layer. The first insulating layer herein may be made of a material having only an insulating function, and for example, an ink material may be used. The first insulating layer may also cover the first circuit layer and a region of the surface of the substrate at the second side where the first circuit layer is not disposed.
The second insulating layer is subsequently disposed on the surface of the second side of the substrate by pressing for embedding the packaged chip. Therefore, the first insulating layer can be omitted when considering the cost. The second insulating layer may be made of an insulating and adhesive material, such as an epoxy resin material or a polyimide material.
And finally, opening a through groove in the area outside the first circuit layer. The through groove can be formed in a laser drilling or mechanical drilling mode.
In the above first circuit layer arrangement manner, the circuit layer is formed on only one surface of the substrate, and the circuit layer may also be formed on both surfaces of the substrate, that is, the following second circuit layer arrangement manner is introduced:
first, a second conductive hole is formed in the substrate by laser drilling or mechanical drilling. The second conductive via here may be a through-hole penetrating the substrate. Such as the conductive vias 113, 313 described previously.
furthermore, a third metal layer and a first metal layer are respectively arranged on the first side and the second side of the substrate. And at the position of the second conductive hole, the first metal layer and the third metal layer are attached to the inner wall of the second conductive hole.
further, the first metal layer and the third metal layer are patterned to form a first wiring layer and a third wiring layer, respectively, which are electrically connected to each other.
The arrangement of the first metal layer and the third metal layer and the formation of the first circuit layer and the third circuit layer may be the same as those described in the first circuit layer arrangement manner, and are not described herein again.
If the first metal layer and the third metal layer are disposed in an electroplating manner, the metal layer may be formed on an inner wall of the second conductive hole penetrating through the substrate when the first metal layer and/or the third metal layer are electroplated. After the first metal layer and the third metal layer are provided, the second conductive via may be filled with an insulating material such as resin, so that an annular metal structure in which the insulating material such as resin is surrounded by the metal layer may be formed at the position of the conductive via, and the annular metal structure may be electrically connected to another element as a pad. Further, both sides of the substrate are plated with metal to cover the surface of the filled resin.
It is to be understood that the second conductive via may also be entirely filled with a conductive material. As mentioned above, the details are not repeated herein.
The materials used for the first metal layer and the third metal layer can be the same or different.
Similarly, a first insulating layer and a third insulating layer may be further provided on the first wiring layer and the third wiring layer, respectively. The material used for the third insulating layer is the same as that used for the first insulating layer described above.
The second insulating layer is subsequently disposed on the surface of the second side of the substrate by pressing for embedding the packaged chip. Therefore, when considering the cost problem, the first insulating layer on the first circuit layer can be omitted.
Furthermore, through grooves are formed in the areas outside the first circuit layer and the third circuit layer.
The size of the through-slots can be determined according to the size of the chip to be embedded. Typically, the through-slots are sized larger than the chip. As described in detail above.
In addition, in the case of a substrate having circuit layers on both sides, there is a design step: firstly, a substrate with a double-sided metal layer is provided, then a second conductive hole is arranged on the substrate, and then the metal layer is patterned into a circuit layer.
Step 102: an adhesive member is disposed on the first side of the substrate and covers the through slot.
As the Adhesive member, an Adhesive member such as OCA (optical Clear Adhesive) optical tape, DAF (Die Attach Film) Film, or the like can be used.
the method for arranging the sticking piece in the step comprises the following two methods:
The first mode is as follows: and an adhesive piece is arranged on the third circuit layer on the first side.
This way it is possible to provide that the area of the adhesive element is equal to the area of the surface of the substrate at the first side. The large-area pasting piece can enhance the pasting force, so that the fixing performance of the chip is improved.
The second mode is as follows: and adhesive members are arranged outside the third circuit layer on the first side, on the through grooves and the peripheral area thereof.
Specifically, the adhesive member of the second embodiment does not have the third wiring layer and the insulating layer attached thereto. It is ensured that at the through slot the surface of the adhesive attachment near the through slot is almost flush with the surface of the first side of the substrate. The height difference between the two can be (-60, +60) micrometer, and also can be (-30, +30) micrometer. It is more favorable that the surface of the chip formed subsequently is substantially flush with the surface of the first side. The reason why the surfaces of the chips are substantially flush with the surface of the first side is that the chips manufactured at the same time are located at the same height in batch production, so that the chips and the electrical connection structures (metal wires or holes) corresponding to the signal layers can be conveniently processed, the consistency is improved, and the product yield is improved.
Step 103: the light sensing chip comprises a light sensing surface and a bottom surface which are oppositely arranged, and the light sensing chip is provided with a leading-out terminal. The light sensing surface is arranged on the first side of the substrate, and the bottom surface is arranged on the second side of the substrate.
In this step, the light sense chip can be including the chip of making a video recording that is used for shooing, also can be including the fingerprint chip that is used for light sense fingerprint identification.
It should be understood that any chip that operates by light sensing is within the scope of the embodiments of the present application.
step 104: and placing the light sensing chip in the through groove and pasting the light sensing chip with the pasting piece.
As can be seen from the foregoing, the size of the through-trench is generally larger than the size of the embedded chip.
In the step, the light sensing chip and the side wall of the through groove can be arranged at intervals, the light sensing chip can be further placed at the center of the through groove, and the width range of a gap between the through groove and the light sensing chip can be 10-150 micrometers. Further, the light sensing surface of the light sensing chip is substantially flush with the surface of the substrate on the first side. The height difference between the two can be (-60, +60) micrometer, and also can be (-30, +30) micrometer.
Step 105: an insulating layer is arranged in the through groove in which the light sensing chip is placed, and the light sensing chip is fixed by pressing the insulating layer.
Further, the insulating layer may further cover a surface of the substrate on the second side.
The insulating layer is the second insulating layer described above, and an insulating and adhesive material, such as an epoxy resin material and a polyimide material, may be used.
This step may include providing the second insulating layer in two ways:
the first mode is as follows: the second insulating layer is provided twice. Specifically, the through groove is filled with the second insulation for the first time, and the second insulation layer filled for the first time is pressed. And then carrying out second setting, namely covering the surface of the second side of the substrate with a second insulating layer for the second time, and laminating the second insulating layer filled for the first time and the second insulating layer filled for the second time.
The mode of setting the second insulating layer in a plurality of times can lead the second insulating layer in the through groove to be pressed twice, and the first pressing is only carried out aiming at the second insulating layer in the through groove, thereby greatly improving the stability of the chip arranged in the through groove.
The second mode is as follows: and filling the second insulating layer into the through groove at one time and covering the surface of the substrate far away from the pasting piece, and laminating the second insulating layer.
After the second insulating layer is arranged, the four surfaces and the bottom surface of the light sensing chip, which are arranged at intervals with the through groove, are all surrounded by the second insulating layer.
Step 106: the leading-out terminal of the light sensing chip is electrically connected with the peripheral circuit.
The peripheral lines may include the aforementioned first line and third line.
Further, other peripheral circuits are also arranged as required.
For example, a second metal layer is disposed on a side of the second insulating layer away from the substrate, and the second metal layer is patterned to form a second circuit layer.
For another example, N fourth metal layers are disposed on a side of the second metal layer away from the second insulating layer, and each fourth metal layer is patterned to form a fourth circuit layer. N is an integer greater than zero. It is worth noting that a fourth insulating layer is disposed between two adjacent metal layers. The fourth insulating layer is made of the same material as the first and third insulating layers.
The peripheral lines further include a second line layer and a fourth line layer.
Specifically, the process of forming the second circuit layer on the side of the second insulating layer away from the substrate specifically includes:
First, a first conductive hole penetrating through the second insulating layer and leaking out of the first circuit layer is formed on one side of the second insulating layer far away from the substrate in a punching mode. And then arranging a second metal layer on one side of the second insulating layer far away from the substrate, and patterning the second metal layer.
The first conductive vias provided herein may be blind vias, such as the conductive vias 131, 331 described above. After the second metal layer is arranged, the area corresponding to the first conductive hole can be used as a bonding pad to be electrically connected with other elements. Wherein the formation of the pads may be the same as previously described.
The arrangement and patterning of the second metal layer may be the same as those of the first metal layer and the third metal layer.
The first circuit layer includes at least one conductive line, and typically includes a plurality of conductive lines. In this embodiment, one of the conducting wires of the first circuit layer is further electrically connected to the second circuit layer and the third circuit layer, respectively, so that the second circuit layer and the third circuit layer are electrically connected through the conducting wire of the first circuit layer. As described above, the details are not repeated herein.
It should be noted that the setting steps of the other peripheral circuits listed above may be before step 106, or after step 106, and the present embodiment does not limit the setting order of the other peripheral circuits.
Further, a peripheral element is provided, the peripheral element being electrically connected to the peripheral wiring.
Peripheral components include, but are not limited to, resistors, capacitors, inductors, other processing chips, and the like.
Further, the adhesive piece is removed, so that the light sensing surface of the light sensing chip is exposed. The exposed surface serves as a sensing area for extracting sensing information. For example, when the light sensing chip is a fingerprint identification chip, the light sensing chip is used for extracting fingerprint information of a user.
The step of removing the adhesive element may follow step 106.
further, after the adhesive member is removed, a transparent cover plate is disposed on the light sensing surface, i.e., the exposed surface, of the light sensing chip to cover the light sensing chip.
Wherein, the transparent cover plate comprises a transparent glass cover plate, a transparent plastic cover plate and the like.
Therefore, in the present embodiment, the photo sensor chip can be embedded in the substrate, so as to reduce the size of the photo sensor module.
in addition, the second conductive holes which are sequentially arranged for conducting the first circuit layer and the third circuit layer and the first conductive holes which are sequentially arranged for conducting the second circuit layer and the third circuit layer ensure the electric connection among the first circuit layer, the second circuit layer and the third circuit layer on the one hand, and on the other hand, the first circuit layer is provided with the pasting piece which needs to be finally stripped in order to avoid the damage of the manufacturing process (such as drilling and electroplating) of the light-sensitive chip to the light-sensitive chip, however, the conditions that the pasting piece is stripped off, the through hole is easily subjected to the processing of the through hole under the condition of the pasting piece, the through hole is internally provided with residual glue (influencing the electric performance) and the electroplating liquid are permeated and plated (namely permeating into the space between the pasting piece and the first circuit layer and influencing the electric connection relation). Thus, the second conductive holes may be provided in advance before the adhesive member is applied to the surface of the first side of the substrate. The first conductive hole is further provided after the second insulating layer is provided. The first conductive hole and the second conductive hole correspond in position and can be electrically connected through the third circuit layer. The first conductive holes and the second conductive holes penetrating through only one functional layer are matched with each other, so that compared with the case of penetrating through multiple layers of conductive holes, the process difficulty is greatly reduced, and the reliability of the embedded type photosensitive module and the product yield of the embedded type photosensitive module are finally improved. The method for manufacturing the embedded photo sensor module is generally described above. The following description will describe the manufacturing method of each structure of the embedded photo sensor module. First, the method of fabricating the embedded photo sensor module shown in FIG. 1 is described.
referring to fig. 7-14, fig. 7 is a flowchart illustrating another method for manufacturing an embedded photo-sensor module according to an embodiment of the present disclosure, and fig. 8-14 and fig. 1 are process flowcharts corresponding to the manufacturing method illustrated in fig. 6. The manufacturing method of the present embodiment includes the steps of:
Step 201: a substrate 11 is provided, a circuit layer is disposed on two sides of the substrate 11, and a through groove 110 is opened on the substrate 11.
as shown in fig. 8, the substrate 11 includes a first side 111 and a second side 112 disposed opposite to each other.
the wiring layers 141 and 142 are respectively disposed on the surface of the substrate 11 on the first side 111 and the surface on the second side 112, and are electrically connected through the conductive via 113. It should be understood that the circuit layer 141 disposed on the first side 111 is the first circuit layer described above, and the circuit layer 142 disposed on the second side 112 is the third circuit layer described above.
The arrangement of the wiring layers 141 and 142 and the through-trench 110 is the same as that described above, and thus, a detailed description thereof is omitted.
After the wiring layers 141 and 142 are formed, an insulating layer 17 may be further provided on the surface of the wiring layer 141 remote from the substrate 11. The insulating layer 17 is the first insulating layer, and can be made of ink.
In this step, the wiring layers 141 and 142 are electrically connected through the conductive via 113, so that a subsequent punching operation can be avoided and it is also suitable to provide an adhesive member on the surface of the substrate.
Step 202: the adhesive member 19 is disposed on the first side 111 of the substrate 11, and the adhesive member 19 covers the through-groove 110.
as shown in fig. 9, the area of the adhesive member 19 may be equal to the area of the surface of the substrate 11 on the first side 111, i.e. the adhesive member 19 covers the wiring layer 141, the surface of the substrate 11 on the first side 111 and the through slots 110.
It is understood that the adhesive member 19 may be disposed only outside the circuit layer 141 and surround the through-groove 110 and the periphery thereof. The details can be as described above, and are not described herein.
step 203: a photo sensor chip 12 is provided, the photo sensor chip 12 includes a photo sensing surface 125 and a bottom surface 126 disposed opposite to each other, and the photo sensor chip 12 has a lead-out terminal 121. The lead terminals 121 are provided on the light-sensing surface 125.
As shown in fig. 10, the photo sensor chip 12 has two lead terminals 121 respectively located at two sides of the photo sensor chip 12. In practical applications, different leading terminals can be arranged according to the type of the light sensing chip. The photo sensor chip 12 may be the photo sensor chip described above, and will not be described herein.
Step 204: the photo chip 12 is placed in the through groove 110, and the photo surface 125 of the photo chip 12 is adhered to the adhesive member 19.
As shown in fig. 11, the photo chip 12 is spaced apart from the sidewall of the through groove 110, and the photo chip 12 can be further disposed at the center of the through groove 110, and the width of the gap between the through groove 110 and the photo chip 12 can be 10-150 μm.
Further, the photosensitive surface 125 of the photosensitive chip 12 is disposed substantially flush with the surface of the first side 111 of the substrate 11. The height difference between the two can be (-60, +60) micrometer, and also can be (-30, +30) micrometer.
Step 205: as shown in fig. 12, the insulating layer 13 is provided in the through groove 110, and the photo chip 12 is fixed by laminating the insulating layer 13.
An insulating layer 13 may further be provided on the surface of the second side 112 of the substrate 11.
The insulating layer 13 is the second insulating layer mentioned above, and may be made of insulating and adhesive materials, such as epoxy resin series materials and polyimide series materials.
the specific manner of disposing the insulating layer 13 is as described above, and is not described herein again.
Further, as shown in fig. 13, a wiring layer 143 is provided on the side of the insulating layer 13 away from the substrate 11, and the wiring layer 143 and the wiring layer 142 are electrically connected through the conductive hole 131 penetrating through the insulating layer 13. The circuit layer 143 is the second circuit layer described above, and is specifically configured as described above.
The conductive vias 131 only penetrate through one insulating layer 13, so that damage to the chip 12 when the conductive vias 131 are disposed can be reduced.
further, an insulating layer 18 may be further provided on a side of the wiring layer 143 away from the insulating layer 13. The insulating layer 18 is the fourth insulating layer described above, and can be made of ink.
Step 206: as shown in fig. 14, the adhesive member 19 is removed, and the metal connection line 122 bridged in midair is provided between the terminal 121 of the optical sensor chip 12 and the first-side wiring layer 141 for electrical connection. That is, the metal connection line 122 is disposed between the lead terminal 121 and the circuit layer 141 by wire bonding.
Further, the metal connection line 122 is plastic-encapsulated by a molding compound 123.
Further, a transparent cover 124 is disposed between the two molding compounds 123 to cover the light-sensing surface 125 of the light-sensing chip 12.
Further, a peripheral element 15 is provided. As shown in fig. 1, the peripheral element 15 may be disposed on a first side of the substrate 11. And is electrically connected to the wiring layer 141 by means of soldering.
The step of disposing the peripheral element 15 on the surface signal layer may be performed after disposing the transparent cover 124.
In other embodiments, the peripheral element 15 may be disposed on the second side of the substrate 11 and electrically connected to at least one of the circuit layers 142, 143 by soldering, or electrically connected to at least one of the circuit layers 142, 143 by attaching (e.g., plugging).
The above description of the present embodiment is directed to the method for manufacturing the embedded chip module shown in fig. 1.
Furthermore, when considering that the peripheral circuit of the embedded chip module has a more complicated structure, a plurality of circuit layers can be further manufactured as the peripheral circuit. For example, N layers of wiring layers may be further provided on the side of the insulating layer 18 away from the wiring layer 143. N is an integer greater than zero. The structure shown in fig. 2 above is thus obtained.
In other embodiments, according to practical applications, the number of circuit layers can be reduced when manufacturing the embedded chip module with a relatively simple peripheral circuit structure.
For example, in step 201, the wiring layer 141 may be provided only on the surface of the first side 111 of the substrate 11. No further wiring layers are provided on the second side 112 of the substrate 11. The other steps are the same as those of the present embodiment. Thus, the structure of the embedded photo sensor module shown in FIG. 3 can be formed.
The method of fabricating the embedded photo sensor module shown in FIG. 4 will be described.
Referring to fig. 15-20, fig. 15 is a flowchart illustrating a method for fabricating an embedded photo sensor module according to another embodiment of the present disclosure, and fig. 16-20 and fig. 4 are process flow diagrams corresponding to the method illustrated in fig. 15. The manufacturing method of the present embodiment includes the steps of:
Step 301: a substrate 31 is provided, circuit layers 341 and 342 are disposed on two sides of the substrate 31, and a through groove 310 is opened on the substrate 31.
the step is the same as the step 201, and the corresponding process flow diagram may refer to the process flow diagram of the step 201, which is not described herein again.
Step 302: the adhesive member 39 is provided on the first side 311 of the substrate 31, and the adhesive member 39 covers the through-groove 110.
The step is the same as the step 202, and the corresponding process flow diagram may refer to the process flow diagram of the step 202, which is not described herein again.
Step 303: a light sensing chip 32 is provided, the light sensing chip 32 includes a light sensing surface 325 and a bottom surface 326 which are oppositely arranged, and the light sensing chip 32 has a lead-out terminal 321. The photosensitive surface 325 is located on the first side of the substrate 31, and the bottom surface 326 is located on the second side 312 of the substrate 31. The lead terminal 321 is provided on the bottom surface 326.
the step is the same as the step 203, and the corresponding process flow diagram may refer to the process flow diagram of the step 203, which is not described herein again.
Step 304: as shown in fig. 16, the light-sensing chip 32 is placed in the through groove 310, and the light-sensing surface 325 of the light-sensing chip 32 is adhered to the adhesive member 39.
Further, a passive peripheral element 351 of the peripheral element 35 is disposed on the surface of the second side 312 of the substrate 31, specifically, by means of pasting or the like, as shown in fig. 17.
In other embodiments, the passive peripheral element 351 may be disposed on the surface of the second side 312 of the substrate 31 by soldering, and electrically connected to the circuit layer 342.
Step 305: as shown in fig. 18, an insulating layer 33 is provided in the through groove 310, and the photo chip 32 is fixed by laminating the insulating layer 33.
Further, an insulating layer 33 may be further provided on the surface of the second side 312 of the substrate 31.
The insulating layer 33 is the second insulating layer described above, and the specific configuration thereof can be referred to above, and is not described herein again.
step 306: a circuit layer 343 is disposed on a side of the insulating layer 33 away from the substrate 31, and a conductive hole 332 (which may be solid or hollow) is disposed to electrically connect the circuit layer 343 and the terminals 321 of the optical sensor chip 32. And is electrically connected with the circuit layer 342 through the conductive hole 331. And is electrically connected to the passive peripheral element 351 through the conductive via 333.
Further, an insulating layer 38 is disposed on a side of the line layer 343 away from the insulating layer 33. The insulating layer 38 here is the fourth insulating layer described above.
Further, a plurality of circuit layers stacked in sequence may be further disposed on the side of the insulating layer 38 away from the circuit layer 343, and the specific configuration is as described above and will not be described herein again.
step 307: as shown in fig. 20, the adhesive member 39 is removed.
Further, a transparent cover 323 is disposed on the light sensing surface 325 of the light sensing chip 32, and the area of the transparent cover 323 may be equal to the area of the light sensing chip 32.
further, as shown in fig. 4, an active peripheral element 352 is disposed (typically soldered) on the insulating layer 38 of the outermost signal layer 343 away from the substrate 31. The lead terminal of the active peripheral element 352 is disposed corresponding to the lead terminal of the optical sensor chip 32, and is electrically connected to the circuit layer 343 through the conductive post 353 penetrating through the insulating layer 38, so as to achieve the purpose of electrically connecting to the optical sensor chip 32 through the bridging effect of the circuit layer 343.
All the circuit layers described above in this embodiment can be used as peripheral circuits of the photo sensor chip. The present embodiment is described above with reference to a method for manufacturing a multilayer signal transmission line as a peripheral circuit in consideration of most of peripheral circuits of an embedded chip module having a complex structure. In other embodiments, according to practical applications, the number of circuit layers can be reduced when manufacturing the embedded chip module with a relatively simple peripheral circuit structure.
For example, in step 301, a substrate 31 may be provided, and no circuit layer is disposed on the other two surfaces. The wiring layer is provided only on the surface of the insulating layer 33. The other steps are the same as those of the present embodiment. The structure shown in fig. 5 is thus obtained.
The above description is only an embodiment of the present application, and not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the specification and the drawings of the present application, or which are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims (30)

1. A method for manufacturing an embedded photo sensor module, the method comprising:
providing a substrate with a through groove, wherein the substrate is provided with a first side and a second side which are oppositely arranged;
Arranging an adhesive piece on the first side of the substrate, wherein the adhesive piece covers the through groove;
Providing a light sensing chip, wherein the light sensing chip comprises a light sensing surface and a bottom surface which are oppositely arranged, and the light sensing chip is provided with a leading-out terminal;
Placing the light sensing chip in the through groove, and adhering the light sensing surface to the adhering piece;
arranging an insulating layer in the through groove in which the light sensing chip is placed, and fixing the light sensing chip by pressing the insulating layer;
And the leading-out terminal of the light sensing chip is electrically connected with the peripheral circuit.
2. The manufacturing method according to claim 1, wherein the through-groove has a size larger than that of the photo sensor chip;
the step of placing the light sensing chip in the through groove comprises the following steps:
And arranging the light sensing chip and the side wall of the through groove at intervals.
3. The manufacturing method according to claim 2, wherein the step of providing an insulating layer in the through groove in which the photo sensor chip is placed comprises:
And further covering the surface of the substrate on the second side with the insulating layer.
4. The manufacturing method according to claim 3, wherein the step of covering the surface of the substrate on the second side with the insulating layer comprises:
Filling the insulating layer into the through grooves and covering the surface of the substrate on the second side in a grading manner, and pressing the insulating layer once after the insulating layer is filled into the through grooves and the insulating layer is covered on the surface of the substrate; or
and filling the insulating layer into the through groove at one time, covering the surface of the substrate on the second side, and laminating the insulating layer.
5. the manufacturing method according to claim 4, wherein the peripheral wiring includes a first wiring layer;
The step of providing a substrate with a through slot comprises:
Arranging a first metal layer on the second side of the substrate, and patterning the first metal layer to form the first circuit layer;
And the through groove is formed in the area of the substrate, which is positioned outside the first circuit layer.
6. the manufacturing method according to claim 5, wherein the peripheral wiring includes a second wiring layer;
The step of electrically connecting the leading-out terminal of the light sensing chip and the peripheral circuit includes:
forming a first conductive hole penetrating through the insulating layer and exposing the first circuit layer;
arranging a second metal layer on one side of the insulating layer far away from the substrate, wherein the second metal layer is further electrically connected with the first circuit layer through the first conductive hole;
And patterning the second metal layer to form a second circuit layer electrically connected with the first circuit layer.
7. The manufacturing method according to claim 6, wherein the peripheral wiring includes a third wiring layer;
The step of providing a substrate having a through-slot further comprises:
A second conductive hole penetrating through the substrate is further formed in the substrate;
Arranging a third metal layer on the first side of the substrate, wherein the first metal layer and the third metal layer are attached to the inner wall of the second conductive hole;
Patterning the third metal layer to form the third line layer electrically connected with the first line layer.
8. The method of manufacturing of claim 7, wherein the first circuit layer comprises at least one conductive line;
The manufacturing method further includes:
One of the wires of the first circuit layer is electrically connected with the second circuit layer and the third circuit layer respectively, so that the second circuit layer and the third circuit layer are electrically connected through the first circuit layer.
9. The method of manufacturing of claim 7, wherein the step of providing an adhesive member on the first side of the substrate comprises:
Arranging the adhesive member on the third circuit layer; or
And the pasting piece is arranged outside the third circuit layer on the first side and in the peripheral area of the through groove.
10. The manufacturing method according to any one of claims 6 to 8, wherein the lead-out terminal is provided on the bottom surface;
The step of forming a first conductive via through the insulating layer and exposing the first circuit layer further comprises:
a third conductive hole which penetrates through the insulating layer and exposes the leading-out terminal of the light sensing chip is formed;
the step of patterning the second metal layer further comprises:
and a second circuit layer electrically connected with the leading-out terminal of the light sensing chip through the third conductive hole is further formed.
11. The manufacturing method according to claim 7 or 8, wherein the lead-out terminal is provided on the photosensitive surface;
The step of electrically connecting the leading-out terminal of the light sensing chip and the peripheral circuit further includes:
And a metal connecting wire in suspension cross connection is arranged between the leading-out terminal of the light sensing chip and the third circuit layer for electric connection.
12. The manufacturing method according to any one of claims 6 to 8, wherein the peripheral wiring comprises N fourth wiring layers disposed on a side of the second wiring layer away from the insulating layer, where N is an integer greater than zero.
13. the method of manufacturing of claim 12, further comprising:
Providing a peripheral element, wherein the peripheral element is electrically connected with the peripheral circuit.
14. the method of manufacturing of claim 13, wherein the step of electrically connecting the peripheral component to the peripheral circuitry further comprises:
The peripheral element is electrically connected with a peripheral circuit farthest from the light sensing chip, and the leading-out terminal of the peripheral element is arranged corresponding to the leading-out terminal of the light sensing chip.
15. The method of manufacturing of claim 1, further comprising:
Removing the adhesive member;
And arranging a transparent cover plate on the light sensing surface of the light sensing chip to cover the light sensing chip.
16. An embedded photo module formed by the method of any one of claims 1-15, the embedded photo module comprising:
The substrate is provided with a through groove and comprises a first side and a second side which are oppositely arranged;
The light sensing chip is arranged in the through groove and comprises a light sensing surface and a bottom surface which are oppositely arranged, the light sensing surface is exposed relative to the substrate, and the light sensing chip is provided with a leading-out terminal;
the insulating layer is filled in the through groove provided with the light sensing chip and used for relatively fixing the light sensing chip and the substrate;
and the peripheral circuit is electrically connected with the leading-out terminal of the light sensing chip.
17. The embedded photo sensor module as claimed in claim 16, wherein a height difference between the photo-sensing surface of the photo-sensing chip and the surface of the substrate on the first side is in a range of (-60, +60) μm.
18. The embedded photo sensor module as claimed in claim 16, wherein a height difference between the photo-sensing surface of the photo-sensing chip and the surface of the substrate on the first side is in a range of (-30, +30) μm.
19. The embedded photo module as claimed in claim 16, wherein the through-slots have a size larger than that of the photo dies;
The light sensing chips and the side walls of the through grooves are arranged at intervals, and the range of gaps between the light sensing chips and the side walls is 10-150 micrometers.
20. The embedded photo sensor module as claimed in claim 16,
the insulating layer further covers the surface of the substrate on the second side.
21. The embedded photo sensor module as claimed in claim 20, wherein the peripheral circuit comprises a first circuit layer disposed on the surface of the substrate at the second side and covered by the insulating layer, and the through-trench is opened in a region of the substrate outside the first circuit layer.
22. The embedded photo sensor module as claimed in claim 21,
The insulating layer is provided with a first conductive hole which penetrates through the insulating layer and exposes the first circuit layer;
The peripheral circuit comprises a second circuit layer, the second circuit layer is arranged on one side, far away from the substrate, of the insulating layer, and is electrically connected with the first circuit layer through the first conductive hole.
23. The embedded photo sensor module as claimed in claim 22, wherein the substrate is formed with a second conductive via penetrating therethrough;
The peripheral circuit comprises a third circuit layer, the third circuit layer is arranged on the surface of the first side of the substrate and is electrically connected with the first circuit layer through the second conductive hole.
24. the embedded photo sensor of claim 23, wherein the first circuit layer comprises at least one conductive line;
The wires of the second circuit layer, which are respectively electrically connected with the second circuit layer and the third circuit layer, are the same wires, so that the second circuit layer and the third circuit layer are electrically connected through the first circuit layer.
25. The embedded photo module as claimed in any one of claims 22-24, wherein the lead terminals of the photo die are disposed on the bottom surface;
A third conductive hole which penetrates through the insulating layer and exposes the leading-out terminal of the light sensing chip is further formed in the insulating layer;
The second circuit layer is further electrically connected with the leading-out terminal of the light sensing chip through the third conductive hole.
26. The embedded photo sensor module as claimed in claim 23 or 24, wherein the terminals of the photo sensor chip are disposed on the photo sensing surface;
The leading-out terminal of the light sensing chip is electrically connected with the third circuit layer in a suspended bridging mode through a metal connecting wire.
27. the embedded photo sensor module as claimed in claim 24, wherein the peripheral circuit comprises N fourth circuit layers disposed on a side of the second circuit layer away from the insulating layer, wherein N is an integer greater than zero.
28. The embedded photo module as claimed in claim 16 or 27, further comprising:
The peripheral element is electrically connected with the peripheral circuit.
29. The embedded photo sensor module as claimed in claim 28,
the peripheral element is electrically connected with a peripheral circuit farthest from the light sensing chip, and the leading-out terminal of the peripheral element is arranged corresponding to the leading-out terminal of the light sensing chip.
30. The embedded photo module as claimed in claim 16, further comprising:
And the transparent cover plate is arranged on the light sensing surface of the light sensing chip and is used for covering the light sensing chip.
CN201810570296.9A 2018-06-05 2018-06-05 Embedded light sensing module and manufacturing method thereof Pending CN110571229A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810570296.9A CN110571229A (en) 2018-06-05 2018-06-05 Embedded light sensing module and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810570296.9A CN110571229A (en) 2018-06-05 2018-06-05 Embedded light sensing module and manufacturing method thereof

Publications (1)

Publication Number Publication Date
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CN113053325A (en) * 2021-03-15 2021-06-29 京东方科技集团股份有限公司 Light sense module and display device
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