CN112020222A - Embedded circuit board and manufacturing method thereof - Google Patents
Embedded circuit board and manufacturing method thereof Download PDFInfo
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- CN112020222A CN112020222A CN201910460566.5A CN201910460566A CN112020222A CN 112020222 A CN112020222 A CN 112020222A CN 201910460566 A CN201910460566 A CN 201910460566A CN 112020222 A CN112020222 A CN 112020222A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
- H01L21/4889—Connection or disconnection of other leads to or from wire-like parts, e.g. wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Abstract
An embedded circuit board comprises a film substrate, a first circuit substrate, a second circuit substrate, a semiconductor device and a sealing colloid, wherein the first circuit substrate and the second circuit substrate are pressed on the two back surfaces of the film substrate; the film base plate comprises an adhesive layer, an accommodating groove penetrating through the adhesive layer and a through groove arranged around the accommodating groove, wherein a first conductive paste is formed in the through groove; the second circuit substrate comprises a first substrate layer and a first conductive circuit layer formed on the first substrate layer, and the first conductive circuit layer comprises at least one first shielding circuit; two ends of the first conductive paste are respectively and electrically connected with the first circuit substrate and the second shielding circuit; the semiconductor device is accommodated in the accommodating groove and welded on the first circuit substrate, the sealing colloid is positioned in the accommodating groove and covers the semiconductor device, and the first conductive paste and the first shielding circuit form a shielding structure of the embedded circuit board. The invention also provides a manufacturing method of the embedded circuit board.
Description
Technical Field
The present invention relates to a multilayer printed circuit board technology, and more particularly, to an embedded circuit board and a method for manufacturing the same.
Background
With the development of 5G technology, almost real-time communication between all external information and sensing systems and the control system is required, which requires extremely high signal transmission between semiconductor devices, and thus the signal transmission loss must be reduced. In the industry, a semiconductor device is usually placed on a circuit board, and a metal sheet is covered on an outer layer of the circuit board to achieve an electromagnetic shielding effect. However, the circuit board and the semiconductor device designed in this way are large in size, which is not favorable for the development of thin type.
Disclosure of Invention
In view of the above, the present invention provides a thin embedded circuit board with good shielding effect.
It is also necessary to provide a method for manufacturing a thinned embedded circuit board with a good shielding effect.
An embedded circuit board comprises a film substrate, a first circuit substrate, a second circuit substrate, a semiconductor device and a sealing colloid, wherein the first circuit substrate and the second circuit substrate are pressed on the two opposite surfaces of the film substrate; the film substrate comprises an adhesive layer, an accommodating groove penetrating through the adhesive layer and a through groove surrounding the accommodating groove, wherein a first conductive paste is formed in the through groove; the second circuit substrate comprises a first substrate layer and a first conductive circuit layer formed on the first substrate layer, and the first conductive circuit layer comprises at least one first shielding circuit; two ends of the first conductive paste are respectively and electrically connected with the first circuit substrate and the first shielding circuit; the semiconductor device is contained in the containing groove and welded on the first circuit substrate, the sealing colloid is located in the containing groove and coats the semiconductor device, and the first conductive paste and the first shielding circuit form a shielding structure of the embedded circuit board.
Further, first circuit substrate includes the second substrate layer and forms second conducting wire layer on the second substrate layer, second conducting wire layer includes many second shielding circuit, second shielding circuit encircles semiconductor device, the one end electricity of first conductive paste is connected second shielding circuit, first conductive paste and first shielding circuit constitute the shielding structure of embedded circuit board.
Furthermore, the first circuit substrate further comprises a third conductive circuit layer which is formed on the surface of the second base material layer and is opposite to the second conductive circuit layer; the semiconductor device is characterized in that a plurality of first blind holes penetrating through the second base material layer are formed in the second base material layer, first electroplated copper with one end electrically contacted with the third conductive circuit layer is formed in the first blind holes, the surface of the third conductive circuit layer, far away from the first electroplated copper, is lower than the surface of the third conductive circuit layer, far away from the second base material layer, a welding block is further formed on the first electroplated copper, the welding block is located in the through groove, and the semiconductor device is electrically connected with the first electroplated copper through the welding block.
Furthermore, the projection of the accommodating groove on the first circuit substrate falls in a space surrounded by the plurality of second shielding lines, so that a gap is formed between the second shielding lines and the semiconductor device, and the gap is used as an anti-glue overflow space to accommodate glue overflow generated by the glue sealing body and/or the glue layer in the pressing process.
A manufacturing method of an embedded circuit board comprises the following steps: providing a film substrate, wherein the film substrate comprises an adhesive layer, an accommodating groove penetrating through the adhesive layer and a through groove surrounding the accommodating groove, and a first conductive paste is formed in the through groove; providing a first circuit substrate and a second circuit substrate, wherein the second circuit substrate comprises a first base material layer and a first conductive circuit layer formed on the first base material layer, and the first conductive circuit layer comprises at least one first shielding circuit; providing a semiconductor device, and welding the semiconductor device on the first circuit substrate; the film substrate is bonded on the first circuit substrate in a false mode, and plastic package colloid is injected into the accommodating groove; the first conductive paste is electrically connected with the first circuit substrate, the semiconductor device is accommodated in the accommodating groove, and the semiconductor device is coated by the sealing colloid; the second circuit substrate is arranged on the film substrate and pressed, the first conductive paste is electrically connected with the first shielding circuit, and the first shielding circuit is opposite to the sealing colloid; the first conductive paste and the first shielding circuit form a shielding structure of the embedded circuit board.
Further, the first circuit substrate comprises a second substrate layer and a second conductive circuit layer formed on the second substrate layer, and the second conductive circuit layer comprises a plurality of second shielding circuits; the second shielding circuit surrounds the semiconductor device, the first conductive paste is electrically connected with the first shielding circuit and the second shielding circuit, and the first shielding circuit, the first conductive paste and the second shielding circuit form a shielding structure of the embedded circuit board.
Furthermore, the projection of the accommodating groove on the first circuit substrate falls in a space surrounded by the plurality of second shielding lines, a gap is formed between the second shielding lines and the semiconductor device, and the gap is used as an anti-glue overflow space to accommodate glue overflow generated by the glue sealing body and/or the glue layer in the pressing process.
Further, the manufacturing method of the film substrate comprises the following steps: providing a film, wherein the film comprises the adhesive layer and a first protective film layer and a second protective film layer which are formed on two opposite surfaces of the adhesive layer; a plurality of through grooves penetrating through the film are formed in the film, adjacent through grooves are bonded together through a part of the film, a space is defined by the through grooves, and a first conductive paste is filled in the through grooves; punching to remove part of the film in the space surrounded by the through groove so as to form the accommodating groove; removing the first protective film layer and the second protective film layer to obtain the film substrate; two ends of the first conductive paste protrude out of the adhesive layer.
Further, the semiconductor device is soldered on the first circuit substrate by a solder bump; the manufacturing method of the first circuit substrate comprises the following steps: providing a first copper-clad substrate, wherein the first copper-clad substrate comprises a second substrate layer and a first copper foil layer formed on the second substrate layer; forming a plurality of first blind holes penetrating through the second base material layer on the first copper-clad substrate; electroplating to form first electroplated copper in the first blind hole and electroplating to form a second copper foil layer on the surface of the second substrate layer far away from the first copper foil layer; manufacturing the second copper foil layer to form a second conductive circuit layer through an image transfer process, manufacturing the first copper foil layer to form a third conductive circuit layer, wherein the surface of the first electroplated copper, far away from the third conductive circuit layer, is lower than the surface of the second substrate, far away from the third conductive circuit layer; the welding block is accommodated in the first blind hole and welded on the first electroplated copper.
Further, the method for manufacturing the second circuit substrate includes: providing a second copper-clad substrate, wherein the second copper-clad substrate comprises a first base material layer and a third copper foil layer; and manufacturing the third copper foil layer to form a first conductive circuit layer through an image transfer process.
The invention provides an embedded circuit board and a manufacturing method thereof, 1) a semiconductor device is embedded in a viscose layer, first conductive paste surrounding the semiconductor device is formed on the periphery of the semiconductor device, a second shielding circuit is arranged right above each semiconductor device and electrically connected with the conductive paste, and the first conductive paste and the second shielding circuit form a shielding structure, so that the embedded circuit board can be thinned and has a good shielding effect; 2) the accommodating groove is filled with a sealing colloid, and the semiconductor device is coated by the sealing colloid, so that the semiconductor device can be better protected and the connection strength between the semiconductor device and the embedded circuit board can be enhanced; 3) an anti-glue overflow space is arranged between the first shielding circuit and the semiconductor device and used for accommodating glue overflow generated by the sealing glue body and/or the adhesive layer in the pressing process.
Drawings
Fig. 1 is a cross-sectional view of an embedded circuit board according to a preferred embodiment of the invention.
Fig. 2 is a cross-sectional view of a sticker of the present invention.
Fig. 3 is a cross-sectional view of the adhesive sheet shown in fig. 2 after at least one blind hole and a plurality of through grooves are formed therein.
Fig. 4 is a cross-sectional view of the blind via and the through-hole shown in fig. 3 filled with a conductive paste.
Fig. 5 is a cross-sectional view of the prepreg shown in fig. 4 after forming a housing groove by punching.
Fig. 6 is a cross-sectional view of the adhesive sheet shown in fig. 5 with the first protective film layer and the second protective film layer removed to form an adhesive sheet substrate.
Fig. 7 is a top view of the film substrate shown in fig. 6.
Fig. 8 is a top view of a film substrate of another construction than that shown in fig. 7.
Fig. 9 is a cross-sectional view of a first copper-clad substrate according to the present invention.
Fig. 10 is a cross-sectional view of the first copper-clad substrate shown in fig. 9 after forming a first blind via and a second blind via.
Fig. 11 is a cross-sectional view of the first blind via and the second blind via shown in fig. 10 after forming copper plating by electroplating and forming a second copper foil layer on the surface of the first base material layer.
Fig. 12 is a cross-sectional view of the first circuit substrate formed by etching away a portion of the electroplated copper in the first blind via, and forming a third conductive trace layer and a second conductive trace layer formed by fabricating the first and second copper foil layers shown in fig. 11 through an image transfer process.
Fig. 13 is a cross-sectional view of a second copper-clad substrate according to the present invention.
Fig. 14 is a cross-sectional view of the copper foil layer of the second copper-clad substrate shown in fig. 13 after a first conductive circuit layer is formed by an image transfer process.
Fig. 15 is a cross-sectional view of at least one semiconductor device being bump bonded onto the electroplated copper within the first blind via shown in fig. 12.
Fig. 16 is a schematic view showing the film substrate shown in fig. 6 being temporarily bonded to the first circuit substrate shown in fig. 15, the accommodating grooves being filled with the sealing compound, and a second circuit substrate being provided.
Description of the main elements
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
To further illustrate the technical means and effects of the present invention for achieving the predetermined objects, the following detailed description will be made on the embodiments, structures, features and effects of the embedded circuit board and the manufacturing method thereof according to the present invention with reference to fig. 1 to 16 and preferred embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1 and fig. 7 to 8, the present invention provides an embedded circuit board 100, wherein the embedded circuit board 100 includes a film substrate 110, a first circuit substrate 120 and a second circuit substrate 130 laminated on two opposite surfaces of the film substrate 110, at least one semiconductor device 140, and at least one molding compound 150. The semiconductor device 140 and the sealing compound 150 are embedded in the film substrate 110, the semiconductor device 140 is welded on the first circuit substrate 120, and the sealing compound 150 covers the semiconductor device 140.
The film substrate 110 includes an adhesive layer 11, a receiving groove 16 penetrating through the adhesive layer 11, and a through groove 141 (see fig. 3) surrounding the receiving groove 16, a first conductive paste 151 is formed in the through groove 141, the first conductive paste 151 is electrically connected to the first circuit substrate 120 and the second circuit substrate 130, and the semiconductor device 140 and the sealing compound 150 are both received in the receiving groove 16.
The film substrate 110 further includes a plurality of second conductive pastes 152, and the second conductive pastes 152 are electrically connected to the first circuit substrate 120 and a second circuit substrate 130.
The first circuit board 120 includes a second substrate layer 21, and a second conductive trace layer 26 and a third conductive trace layer 27 formed on two opposite surfaces of the second substrate layer 21. The second substrate layer includes a first surface 211 far from the third conductive circuit layer 27, and the second conductive circuit layer 26 is formed on the first surface 211.
The second conductive trace layer 26 includes at least one second shielding trace 261 and a plurality of second signal traces 262, the second shielding trace 261 surrounds the semiconductor device 140, one end of the first conductive paste 151 is electrically connected to the second shielding trace 261, and one end of the second conductive paste 152 is electrically connected to the second signal traces 262.
The projection of the accommodating groove 16 on the first circuit substrate 120 falls into a space surrounded by the plurality of second shielding lines 261, so that a gap is formed between the second shielding lines 261 and the semiconductor device 140, and the gap can be used as an anti-glue-overflow space 50 to accommodate glue overflow generated by the glue sealing body 150 and/or the glue layer 11 during the pressing process.
The first circuit board 120 further includes a plurality of first blind holes 231 and second blind holes 232 penetrating through the second substrate layer. A first copper plating 241 is formed in the first blind via 231, and one end of the first copper plating 241 is electrically connected to the third conductive trace layer 27. The surface of the first electroplated copper 241 away from the third conductive trace layer 27 is lower than the first surface 211. The second blind via 232 is formed by electroplating to form a second electroplated copper 242, and the second signal trace 262 and the third conductive trace layer 27 are electrically connected by a plurality of second electroplated copper 242.
Wherein the semiconductor device 140 is electrically connected to the first electroplated copper 241 through at least one solder bump 40, and thereby electrically connected to the third electrically conductive trace layer 27. The solder bumps 40 are received in the first blind holes 231, so that the thickness of the entire embedded circuit board 100 can be reduced.
The second circuit board 130 includes a first base material layer 31 and a first conductive trace layer 33 formed on the first base material layer 31. The first conductive trace layer 33 includes at least a first shielding trace 331 and a first signal trace 332. The first conductive circuit layer 33 is attached to the adhesive layer 11, and the first shielding circuit 331 and the first signal circuit 332 are embedded in the adhesive layer 11. The first shielding circuit 331 directly faces the first conductive paste 151 and the encapsulant 150. The first conductive paste 151 electrically connects the second shield line 261 and the first shield line 331, and the second conductive paste 152 electrically connects the second signal line 262 and the first signal line 332. The molding compound 150 is attached to the first shielding circuit 331. The first conductive paste 151, the second shielding line 261, and the first shielding line 331 constitute a shielding structure of the embedded circuit board 100.
Referring to fig. 1 to 16, the present invention further provides a method for manufacturing an embedded circuit board 100, including the following steps:
first, referring to fig. 6 to 8, a film substrate 110 is provided, where the film substrate 110 includes an adhesive layer 11, a receiving groove 16 penetrating through the adhesive layer 11, and a through groove 141 surrounding the receiving groove 16, a first conductive paste 151 is formed in the through groove 141, and two ends of the first conductive paste 151 protrude from the adhesive layer 11.
Specifically, referring to fig. 2-8, the method for manufacturing the film substrate 110 includes the following steps:
first, referring to fig. 2, a film 10 is provided, wherein the film 10 includes an adhesive layer 11, and a first protective film 12 and a second protective film 13 formed on opposite surfaces of the adhesive layer 11. In the present embodiment, the film 10 is a peelable adhesive. In other embodiments, the film 10 may be other than peelable adhesive.
Next, referring to fig. 3 and 7 to 8, the film 10 is formed with a plurality of through grooves 141 and through holes 142 penetrating the film 10. In this embodiment, four through grooves 141 are formed in the film 10, the four through grooves 141 are arranged in a rectangular shape, and the adjacent through grooves 141 are bonded to each other by a portion of the film 10.
Referring to fig. 4, the through groove 141 and the through hole 142 are filled with a first conductive paste 151 and a second conductive paste 152.
Referring to fig. 5, a portion of the film 10 in the space surrounded by the through-slot 141 is punched and removed to form a receiving slot 16. The accommodating groove 16 penetrates the adhesive layer 11, the first protective film layer 12, and the second protective film layer 13.
Finally, referring to fig. 6-8, the first protective film layer 12 and the second protective film layer 13 are removed to obtain the film substrate 110.
In a second step, referring to fig. 12, a first circuit substrate 120 is provided.
The first circuit board 120 includes a second substrate layer 21, and a second conductive trace layer 26 and a third conductive trace layer 27 formed on two opposite surfaces of the second substrate layer 21. The second substrate layer 21 includes a first surface 211 far from the third conductive circuit layer 27, and the second conductive circuit layer 26 is formed on the first surface 211. The second conductive trace layer 26 includes at least one second shielding trace 261 and a plurality of second signal traces 262. The second shield lines 261 are connected end to end. The first circuit board 120 further includes a plurality of first blind holes 231 and second blind holes 232 penetrating through the second substrate layer. A first copper plating 241 is formed in the first blind via 231, and one end of the first copper plating 241 is electrically connected to the third conductive trace layer 27. The surface of the first electroplated copper 241 away from the third conductive trace layer 27 is lower than the first surface 211. The second blind via 232 is formed by electroplating to form a second electroplated copper 242, and the second signal trace 262 and the third conductive trace layer 27 are electrically connected by a plurality of second electroplated copper 242.
Specifically, referring to fig. 9-12, the method for manufacturing the first circuit substrate 120 includes the following steps:
first, referring to fig. 9, a first copper clad substrate 20 is provided, where the first copper clad substrate 20 includes a second substrate layer 21 and a first copper foil layer 22 formed on the second substrate layer 21, the second substrate layer includes a first surface 211, and the first surface 211 is far from the first copper foil layer 22.
Next, referring to fig. 10, a plurality of first blind holes 231 and second blind holes 232 penetrating through the second base material layer 21 are formed on the first copper-clad substrate 20.
Referring to fig. 11, a first plated copper 241 is formed in the first via hole 231, a second plated copper 242 is formed in the second via hole 232, and a second copper foil layer 25 is formed on the first surface 211.
Finally, referring to fig. 11-12, the second copper foil layer 25 is formed to form a second conductive trace layer 26 by an image transfer process, and the first copper foil layer 22 is formed to form a third conductive trace layer 27 to obtain the first circuit substrate 120.
Third, referring to fig. 14, a second circuit board 130 is provided, wherein the second circuit board 130 includes a first substrate layer 31 and a first conductive trace layer 33 formed on the first substrate layer 31. The first conductive trace layer 33 includes at least a first shielding trace 331 and a first signal trace 332. The first shielding line 331 is a wide line having a size slightly larger than that of a space surrounded by the first conductive paste 151.
Specifically, referring to fig. 13-14, the method for manufacturing the second circuit substrate 130 includes the following steps:
first, referring to fig. 13, a second copper clad substrate 30 is provided, which includes a first substrate layer 31 and a third copper foil layer 32.
Next, referring to fig. 14, the third copper foil layer 32 is processed by an image transfer process to form a first conductive circuit layer 33.
Fourth, referring to fig. 15, a semiconductor device 140 is provided and the semiconductor device 140 is soldered to the first electroplated copper 241 in the first blind via 231 by at least one solder bump 40.
Wherein the semiconductor device 140 is electrically connected to the first electroplated copper 241 through the solder bump 40, and thus to the third electrically conductive line layer 27. The solder bumps 40 are received in the first blind holes 231, so that the thickness of the entire embedded circuit board 100 can be reduced.
Referring to fig. 16, the film substrate 110 is temporarily attached to the first circuit substrate 120, and a molding compound 150 is injected into the accommodating groove 16. The first conductive paste 151 is electrically connected to the second shielding line 261, the second conductive paste 152 is electrically connected to the second signal line 262, the semiconductor device 140 is accommodated in the accommodating groove 16, and the encapsulant 150 encapsulates the semiconductor device 140. The projection of the accommodating groove 16 on the first circuit substrate 120 falls in a space surrounded by the plurality of second shielding lines 261, a gap is formed between the second shielding lines 261 and the semiconductor device 140, and the gap serves as an anti-glue-overflow space 50 to accommodate glue overflow generated by the sealing glue 150 and/or the adhesive layer 11 during the pressing process.
In a sixth step, referring to fig. 1, the second circuit substrate 130 is disposed on the film substrate 110 and pressed. First electrically conductive cream 151 electricity is connected first shielding circuit 331, second electrically conductive cream 152 electricity is connected first signal circuit 332, first shielding circuit 331 just right first electrically conductive cream 151 reaches seal colloid 150, seal colloid 150 with first shielding circuit 331 pastes mutually, first shielding circuit 331 reaches first signal circuit 332 is embedded in the viscose layer 11. The first conductive paste 151, the second shielding line 261, and the first shielding line 331 constitute a shielding structure of the embedded circuit board 100.
The invention provides an embedded circuit board and a manufacturing method thereof, 1) a semiconductor device is embedded in a viscose layer, first conductive paste surrounding the semiconductor device is formed on the periphery of the semiconductor device, a second shielding circuit is arranged right above each semiconductor device and electrically connected with the conductive paste, and the first conductive paste and the second shielding circuit form a shielding structure, so that the embedded circuit board can be thinned and has a good shielding effect; 2) the accommodating groove is filled with a sealing colloid, and the semiconductor device is coated by the sealing colloid, so that the semiconductor device can be better protected and the connection strength between the semiconductor device and the embedded circuit board can be enhanced; 3) an anti-glue overflow space is arranged between the first shielding circuit and the semiconductor device and used for accommodating glue overflow generated by the sealing glue body and/or the adhesive layer in the pressing process.
Although the present invention has been described with reference to the above preferred embodiments, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. An embedded circuit board comprises a film substrate, a first circuit substrate, a second circuit substrate, a semiconductor device and a sealing colloid, wherein the first circuit substrate and the second circuit substrate are pressed on two opposite surfaces of the film substrate; the adhesive film substrate is characterized by comprising an adhesive layer, an accommodating groove penetrating through the adhesive layer and a through groove surrounding the accommodating groove, wherein a first conductive paste is formed in the through groove; the second circuit substrate comprises a first substrate layer and a first conductive circuit layer formed on the first substrate layer, and the first conductive circuit layer comprises at least one first shielding circuit; two ends of the first conductive paste are respectively and electrically connected with the first circuit substrate and the first shielding circuit; the semiconductor device is contained in the containing groove and welded on the first circuit substrate, the sealing colloid is located in the containing groove and coats the semiconductor device, and the first conductive paste and the first shielding circuit form a shielding structure of the embedded circuit board.
2. The embedded circuit board of claim 1, wherein the first circuit substrate comprises a second substrate layer and a second conductive trace layer formed on the second substrate layer, the second conductive trace layer comprises a plurality of second shielding traces, the second shielding traces surround the semiconductor device, one end of the first conductive paste is electrically connected to the second shielding traces, and the second shielding traces, the first conductive paste and the first shielding traces form a shielding structure of the embedded circuit board.
3. The embedded circuit board of claim 2, wherein the first circuit substrate further comprises a third conductive trace layer formed on a surface of the second substrate layer opposite the second conductive trace layer; the semiconductor device is characterized in that a plurality of first blind holes penetrating through the second base material layer are formed in the second base material layer, first electroplated copper with one end electrically contacted with the third conductive circuit layer is formed in the first blind holes, the surface of the third conductive circuit layer, far away from the first electroplated copper, is lower than the surface of the third conductive circuit layer, far away from the second base material layer, a welding block is further formed on the first electroplated copper, the welding block is located in the through groove, and the semiconductor device is electrically connected with the first electroplated copper through the welding block.
4. The embedded circuit board of claim 2, wherein a projection of the receiving groove on the first circuit substrate falls within a space defined by the plurality of second shielding lines, so that a gap is formed between the second shielding lines and the semiconductor device, and the gap serves as an anti-glue-overflow space to receive glue overflow generated by the sealing glue and/or the adhesive layer during the pressing process.
5. A manufacturing method of an embedded circuit board comprises the following steps:
providing a film substrate, wherein the film substrate comprises an adhesive layer, an accommodating groove penetrating through the adhesive layer and a through groove surrounding the accommodating groove, and a first conductive paste is formed in the through groove;
providing a first circuit substrate and a second circuit substrate, wherein the second circuit substrate comprises a first base material layer and a first conductive circuit layer formed on the first base material layer, and the first conductive circuit layer comprises at least one first shielding circuit;
providing a semiconductor device, and welding the semiconductor device on the first circuit substrate;
the film substrate is bonded on the first circuit substrate in a false mode, and plastic package colloid is injected into the accommodating groove; the first conductive paste is electrically connected with the first circuit substrate, the semiconductor device is accommodated in the accommodating groove, and the semiconductor device is coated by the sealing colloid; and
placing the second circuit substrate on the film substrate and pressing, wherein the first conductive paste is electrically connected with the first shielding circuit, and the first shielding circuit is opposite to the sealing colloid; the first conductive paste and the first shielding circuit form a shielding structure of the embedded circuit board.
6. The method for manufacturing an embedded circuit board according to claim 5, wherein the first circuit substrate comprises a second substrate layer and a second conductive trace layer formed on the second substrate layer, the second conductive trace layer comprising a plurality of second shielding traces; the second shielding circuit surrounds the semiconductor device, the first conductive paste is electrically connected with the first shielding circuit and the second shielding circuit, and the first shielding circuit, the first conductive paste and the second shielding circuit form a shielding structure of the embedded circuit board.
7. The method of claim 6, wherein a projection of the receiving cavity on the first circuit substrate falls within a space defined by the plurality of second shielding lines, a gap is formed between the second shielding lines and the semiconductor device, and the gap serves as an anti-glue-overflow space to receive glue overflow generated by the glue sealing body and/or the glue layer during the pressing process.
8. The method for manufacturing an embedded circuit board according to claim 5, wherein the method for manufacturing the film substrate comprises the steps of:
providing a film, wherein the film comprises the adhesive layer and a first protective film layer and a second protective film layer which are formed on two opposite surfaces of the adhesive layer;
a plurality of through grooves penetrating through the film are formed in the film, adjacent through grooves are bonded together through a part of the film, a space is defined by the through grooves, and a first conductive paste is filled in the through grooves;
punching to remove part of the film in the space surrounded by the through groove so as to form the accommodating groove; and
removing the first protective film layer and the second protective film layer to obtain the film substrate; two ends of the first conductive paste protrude out of the adhesive layer.
9. The method of manufacturing an embedded circuit board according to claim 5, wherein the semiconductor device is soldered on the first circuit substrate by a solder bump; the manufacturing method of the first circuit substrate comprises the following steps:
providing a first copper-clad substrate, wherein the first copper-clad substrate comprises a second substrate layer and a first copper foil layer formed on the second substrate layer;
forming a plurality of first blind holes penetrating through the second base material layer on the first copper-clad substrate;
electroplating to form first electroplated copper in the first blind hole and electroplating to form a second copper foil layer on the surface of the second substrate layer far away from the first copper foil layer; and
manufacturing the second copper foil layer to form a second conductive circuit layer through an image transfer process, manufacturing the first copper foil layer to form a third conductive circuit layer, wherein the surface of the first electroplated copper, which is far away from the third conductive circuit layer, is lower than the surface of the second substrate, which is far away from the third conductive circuit layer; the welding block is accommodated in the first blind hole and welded on the first electroplated copper.
10. The method for manufacturing an embedded circuit board according to claim 5, wherein the method for manufacturing the second circuit substrate comprises the steps of:
providing a second copper-clad substrate, wherein the second copper-clad substrate comprises a first base material layer and a third copper foil layer; and
and manufacturing the third copper foil layer to form a first conductive circuit layer through an image transfer process.
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| CN201910460566.5A CN112020222A (en) | 2019-05-30 | 2019-05-30 | Embedded circuit board and manufacturing method thereof |
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| CN201910460566.5A CN112020222A (en) | 2019-05-30 | 2019-05-30 | Embedded circuit board and manufacturing method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI837681B (en) | 2022-05-20 | 2024-04-01 | 大陸商慶鼎精密電子（淮安）有限公司 | Circuit board assembly and method of manufacturing thereof |
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Application publication date: 20201201 |