CN113784529B

CN113784529B - Circuit board and manufacturing method thereof

Info

Publication number: CN113784529B
Application number: CN202010526499.5A
Authority: CN
Inventors: 李成佳; 杨梅
Original assignee: Hongqisheng Precision Electronics Qinhuangdao Co Ltd; Avary Holding Shenzhen Co Ltd
Current assignee: Hongqisheng Precision Electronics Qinhuangdao Co Ltd; Avary Holding Shenzhen Co Ltd
Priority date: 2020-06-09
Filing date: 2020-06-09
Publication date: 2023-01-17
Anticipated expiration: 2040-06-09
Also published as: CN113784529A

Abstract

A manufacturing method of a circuit board comprises the following steps: respectively thinning a first copper layer and a second copper layer which are opposite to each other on a substrate to form a part beating area and a heat dissipation area, wherein the preset area of the heat dissipation area is not thinned; respectively etching the first copper layer and the second copper layer to form a first conductive circuit layer and a second conductive circuit layer, forming a first welding pad, a second welding pad, a third welding pad and a fourth welding pad on the component beating area, and forming a first heat dissipation pad, a second heat dissipation pad, a third heat dissipation pad and a fourth heat dissipation pad which are opposite to each other on the heat dissipation area, wherein the first heat dissipation pad and the third heat dissipation pad formed in a preset area of the heat dissipation area are thicker than the second heat dissipation pad and the fourth heat dissipation pad; respectively welding and mounting a first element, a second element and a third element on the first welding pad, the second welding pad and the third welding pad; mounting a fourth element on the third element; and mounting a fifth element on the fourth bonding pad and the first bonding pad, wherein the fifth element covers the first element, the second element, the third element and the fourth element. The invention also provides a circuit board.

Description

Circuit board and manufacturing method thereof

Technical Field

The invention relates to a circuit board and a manufacturing method thereof.

Background

In recent years, electronic products are widely used in daily work and life, and the demand for miniaturization, multi-functionalization, and high performance is increasing. In order to meet the requirement, the circuit board inside the circuit board also needs to be matched with various parts correspondingly, high-density parts are punched, and the problem of heat dissipation exists, however, the space in the high-density circuit board is reduced, the distance between the wiring lines and the thickness of the wiring lines are reduced and thinned, and the heat dissipation needs a thicker copper layer, so that the function of rapid heat dissipation is not achieved in the wiring mode.

Disclosure of Invention

Accordingly, there is a need for a method of fabricating a circuit board that solves the above problems.

The circuit board manufactured by the manufacturing method is also provided.

The embodiment of the application provides a manufacturing method of a circuit board, which comprises the following steps:

respectively thinning a first copper layer and a second copper layer which are opposite to each other on a substrate to form a part beating area and a heat dissipation area, wherein the preset area of the heat dissipation area is not thinned;

respectively etching the first copper layer and the second copper layer to form a first conductive circuit layer and a second conductive circuit layer, forming a first welding pad, a second welding pad, a third welding pad and a fourth welding pad on the component-beating area, and forming a first heat dissipation pad, a second heat dissipation pad, a third heat dissipation pad and a fourth heat dissipation pad which are opposite to each other on the heat dissipation area, wherein the first heat dissipation pad and the third heat dissipation pad formed in a preset area of the heat dissipation area are thicker than the second heat dissipation pad and the fourth heat dissipation pad;

respectively welding and mounting a first element, a second element and a third element on the first welding pad, the second welding pad and the third welding pad;

mounting a fourth element on the third element;

and mounting a fifth element on the fourth welding pad and the first welding pad, wherein the fifth element covers the first element, the second element, the third element and the fourth element.

Further, in some embodiments of this application, still include before the step of the district and the radiating area are beaten in the formation attenuate respectively on first copper layer and second copper layer, it is right the base plate carries out trompil and copper-plating's step, the base plate include the basic unit and formed at two relative surfaces of basic unit first copper layer reaches the second copper layer set up the holding hole on the first copper layer, the holding hole runs through first copper layer reaches the basic unit exposes the second copper layer copper-plating forms in the holding hole and connects first copper layer reaches the electroplating hole on second copper layer, the first copper layer of electroplating hole department forms after the etching first bonding pad.

Further, in some embodiments of the present application, the step of etching the first copper layer and the second copper layer to form the first conductive trace layer and the second conductive trace layer respectively further includes a step of laminating a protective layer on surfaces of the first conductive trace layer and the second conductive trace layer through an adhesive layer, where the protective layer covers the first conductive trace layer and the second conductive trace layer and exposes the component-making area of the first conductive trace layer.

Further, in some embodiments of the present application, before the step of welding and mounting the first element, the second element, and the third element on the first pad, the second pad, and the third pad, respectively, the step of performing surface treatment on the first pad, the second pad, the third pad, and the fourth pad in the component mounting area to form a metal layer thereon is further included.

Further, in some embodiments of the present application, the step of mounting a fifth element on the fourth pad and the first pad further includes a step of filling glue in the part bonding region to form a fixing layer.

Embodiments of the present application further provide a circuit board, including:

the base plate comprises a base layer, a first conductive circuit layer and a second conductive circuit layer, wherein the first conductive circuit layer and the second conductive circuit layer are formed on two opposite surfaces of the base layer and are electrically connected with each other;

the first element is arranged on the first welding pad;

the second element is arranged on the second welding pad;

the third element is arranged on the third bonding pad;

a fourth element provided on the third element; and

and the fifth element is arranged on the fourth welding pad and the first welding pad, and covers the first element, the second element, the third element and the fourth element.

Further, in some embodiments of the present application, a plating hole is formed in the first conductive trace layer, the plating hole penetrates through the first conductive trace layer and the base layer and exposes the second conductive trace layer to connect the first conductive trace layer and the second conductive trace layer, and the first conductive trace layer at the plating hole forms the first pad.

Further, in some embodiments of the present application, the package substrate further includes a protective layer adhered to the surface of the substrate by a glue layer, where the protective layer covers the first conductive trace layer and the second conductive trace layer and exposes the component-making area of the first conductive trace layer.

Further, in some embodiments of the present application, the first pad, the second pad, the third pad and the fourth pad in the play area have a metal layer thereon.

Further, in some embodiments of the present application, a fixing layer is further included to fill the knockout region.

The circuit board provided by the invention adopts two processes of copper reduction and etching to manufacture a first heat dissipation pad and a third heat dissipation pad which are thicker, and a second heat dissipation pad and a fourth heat dissipation pad which are thinner. The first element, the second element, the third element and the fourth element (passive element) can be arranged below the fifth element (active element), the first element and the fifth element can be connected in series to share the first welding pad and the first heat dissipation pad, and the third element and the fourth element can be connected in series and stacked to share the third welding pad and the third heat dissipation pad, so that the heat dissipation requirement of different electronic assembly components can be met, the integration level is high, and the heat dissipation performance of the circuit board is improved.

Drawings

Fig. 1 is a schematic cross-sectional view of a substrate according to an embodiment of the present invention.

Fig. 2 is a schematic cross-sectional view of the substrate shown in fig. 1 being perforated.

FIG. 3 is a schematic view of selective copper plating of the substrate shown in FIG. 2.

Fig. 4 is a schematic view of copper reduction of the substrate shown in fig. 3.

Fig. 5 is a schematic view of stripping the substrate shown in fig. 4.

FIG. 6 is a schematic cross-sectional view of the substrate shown in FIG. 5 being subjected to lamination, exposure, development, etching, and stripping.

Fig. 7 is a schematic cross-sectional view of laminating a protective layer on the substrate shown in fig. 6.

Fig. 8 is a schematic cross-sectional view of the surface treatment of the first conductive trace layer shown in fig. 7.

Fig. 9 is a schematic cross-sectional view of the substrate of fig. 8 on which a first element, a second element, and a third element are provided.

Fig. 10 is a schematic cross-sectional view of a fourth element disposed on the substrate shown in fig. 9.

Fig. 11 is a schematic cross-sectional view of a fifth device and a underfill on the substrate shown in fig. 10.

Description of the main elements

Circuit board 100

Substrate 10

Base layer 11

First copper layer 12

Accommodation hole 121

Electroplated hole 1211

The knockout region 122

First conductive trace layer 123

First bonding pad 124

Second bonding pad 125

Third bonding pad 126

Fourth bonding pad 128

Second copper layer 13

Heat dissipation area 131

Second conductive trace layer 132

First heat dissipation pad 134

Second heat dissipation pad 135

Third thermal pad 136

Fourth heat sink pad 138

Protective film 14

Metal layer 15

Solder layers 16, 17

Protective layer 20

Adhesive layer 30

First element 40

Second element 50

Third element 60

Pin 61

Fourth element 70

Fifth element 80

Fixed layer 90

The following detailed description will further illustrate the invention in conjunction with the above-described figures.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.

mounting a fourth element on the third element;

and mounting a fifth element on the fourth bonding pad and the first bonding pad, wherein the fifth element covers the first element, the second element, the third element and the fourth element.

the first element is arranged on the first welding pad;

the second element is arranged on the second welding pad;

the third element is arranged on the third bonding pad;

a fourth element provided on the third element; and

The circuit board is manufactured into a first heat dissipation pad, a third heat dissipation pad, a second heat dissipation pad and a fourth heat dissipation pad which are thicker, and thinner by adopting two processes of copper reduction and etching. The first element, the second element, the third element and the fourth element (passive element) can be arranged below the fifth element (active element), the first element and the fifth element can be connected in series to share the first welding pad and the first heat dissipation pad, and the third element and the fourth element can be connected in series and stacked to share the third welding pad and the third heat dissipation pad, so that the heat dissipation requirements of different electronic assembly components can be met, the integration level is high, and the heat dissipation performance of the circuit board is improved.

Embodiments of the present application will be further described with reference to the accompanying drawings.

Referring to fig. 1 to 11, a method for manufacturing a circuit board 100 according to an embodiment of the invention includes the following steps:

in step S101, please refer to fig. 1, a substrate 10 is provided. The substrate 10 includes an insulating base layer 11, and a first copper layer 12 and a second copper layer 13 formed on two opposite surfaces of the base layer 11.

The material of the base layer 11 may be selected from one of Polyimide (PI), liquid Crystal Polymer (LCP), polyethylene Terephthalate (PET), and Polyethylene Naphthalate (PEN).

Step S102, referring to fig. 2, a hole opening process is performed on the substrate 10, and a plurality of accommodating holes 121 are formed in the first copper layer 12 along the stacking direction of the first copper layer 12, the base layer 11 and the second copper layer 13. The receiving hole 121 is a blind hole that penetrates the first copper layer 12 and the base layer 11 and exposes the second copper layer 13.

In the present embodiment, the housing hole 121 is formed by laser. In other embodiments, the receiving hole 121 may be formed by other means, such as mechanical drilling, stamping, etc.

In step S103, please refer to fig. 3, copper plating is selected. And selectively attaching a protective film 14 to the surfaces of the first copper layer 12 and the second copper layer 13, and performing an electroplating process to plate a layer of copper on the surfaces of the first copper layer 12 and the second copper layer 13 and in the accommodating hole 121 respectively.

In this embodiment, the protective film 14 is attached to the surface of the second copper layer 13 opposite to the accommodating hole 121, and the protective film 14 is attached to the surface of the predetermined high heat dissipation area of the second copper layer 13, so as to form a heat dissipation pad with high heat dissipation after the circuit board 100 is manufactured.

The material of the protective film 14 (cover layer) may be selected from one of Polyimide (PI), liquid Crystal Polymer (LCP), polyethylene Terephthalate (PET), and Polyethylene Naphthalate (PEN).

In step S104, please refer to fig. 4, the copper is reduced. Selectively thinning the copper layers on the surfaces of the first copper layer 12 and the second copper layer 13, which are not adhered with the protective film 14, to form a component beating region 122 and an opposite heat dissipation region 131 on the first copper layer 12 and the second copper layer 13, respectively.

The receiving hole 121 plated with copper forms a plating hole 1211 by reducing copper.

In step S105, please refer to fig. 5, the film is removed. And stripping the protective film 14 covering the surfaces of the first copper layer 12 and the second copper layer 13.

In step S106, referring to fig. 6, a film pressing process, an exposing process, a developing process, an Etching process, and a film removing process (DES) are performed on the substrate 10, so that the first copper layer 12 and the second copper layer 13 on the substrate 10 are etched to form a first conductive circuit layer 123 and a second conductive circuit layer 132, respectively, and the first conductive circuit layer 123 and the second conductive circuit layer 132 are electrically connected to each other through the plating hole 1211. A first bonding pad 124, a second bonding pad 125, a third bonding pad 126 and a fourth bonding pad 128 are formed on the component mounting region 122, and a first heat dissipation pad 134, a second heat dissipation pad 135, a third heat dissipation pad 136 and a fourth heat dissipation pad 138 are formed on the heat dissipation region 131.

The first conductive trace layer 123 at the plated hole 1211 forms a first pad 124. Third bonding pads 126 are formed on the first conductive trace layer 123 opposite the pre-topped high heat dissipation area.

In this embodiment, the first bonding pad 124 and the third bonding pad 126 are used for connecting the stacked devices in series, and the other bonding pads are independently connected to the devices. Therefore, the first and

third pads

134, 136 have a relatively large thickness and have a relatively high heat dissipation capability, and the second and

fourth pads

135, 138 have a relatively small thickness.

Step S107, referring to fig. 7, providing a protective layer 20, and pressing the protective layer 20 on the surfaces of the first conductive trace layer 123 and the second conductive trace layer 132 through an adhesive layer 30. The protective layer 20 covers the first conductive trace layer 123 and the second conductive trace layer 132 and exposes the component mounting region 122 of the first conductive trace layer 123.

In the present embodiment, the protection layer 20 may be a solder mask (solder mask) or a cover layer (CVL) commonly used in the art.

In the present embodiment, the material of the adhesive layer 30 is a viscous resin, and more specifically, the resin may be at least one selected from polypropylene, epoxy resin, polyurethane, phenol resin, urea resin, melamine-formaldehyde resin, polyimide, and the like.

In step S108, please refer to fig. 8, a surface treatment is performed on the first conductive trace layer 123.

Specifically, the metal layer 15 is formed on the first bonding pad 124, the second bonding pad 125, the third bonding pad 126, and the fourth bonding pad 128 in the component area 122 of the first conductive trace layer 123 by performing surface treatment.

In which, the first bonding pad 124, the second bonding pad 125, the third bonding pad 126 and the fourth bonding pad 128 are surface-treated to prevent the surface of the bonding pads from being oxidized, thereby affecting the electrical characteristics. The surface treatment may be performed by forming the metal layer 15 by electroless gold plating, electrogold plating, electroless tin plating, electrotin plating, or the like, or by forming an organic solderable metal layer 15 (OSP, not shown) on the pad.

In step S109, referring to fig. 9, a first element 40, a second element 50 and a third element 60 are respectively mounted on the first pad 124, the second pad 125 and the third pad 126.

Specifically, the first element 40, the second element 50 and the third element 60 are respectively disposed on the first bonding pad 124, the second bonding pad 125 and the third bonding pad 126 by Surface Mount Technology (SMT), so that the first element 40, the second element 50 and the third element 60 are electrically connected to the first conductive trace layer 123.

In some embodiments, the first, second and

third elements

40, 50, 60 are passive components.

The first element 40 is disposed on a portion of the first pad 124.

The surface of the third component 60 away from the third pad 126 is provided with a pin 61.

In step S110, referring to fig. 10, a fourth element 70 is mounted on the third element 60.

Specifically, solder paste is printed on the leads 61, a fourth element 70 is provided on the solder paste by Surface Mount Technology (SMT), and the fourth element 70 is stacked in series with the third element 60 by a solder layer 16 formed of the solder paste.

The material of the soldering paste can be one of soldering materials such as tin paste (Sn 42-Bi 58), silver paste, copper paste and the like.

In some embodiments, the fourth element 70 is a passive component.

In step S111, referring to fig. 11, a fifth element 80 is mounted on the fourth bonding pad 128 and the first bonding pad 124, and the molding region 122 is filled with glue to form a fixing layer 90.

Specifically, solder paste is printed on the fourth pads 128, the plated holes 1211 and the remaining first pads 124, a fifth component 80 is disposed on the solder paste by Surface Mount Technology (SMT), the fifth component 80 is electrically connected to the first conductive trace layer 123 by a solder layer 17 formed by the solder paste, and is stacked in series with the first component 40, such that the fifth component 80 covers the first component 40, the second component 50, the third component 60 and the fourth component 70. And glue is filled in the opening of the component mounting area 122 to form a fixing layer 90, so as to fix the bottom of the fifth component 80, the first component 40, the second component 50, the third component 60 and the fourth component 70 of the component mounting area 122, the side wall and the top wall of the first component 40, the second component 50, the third component 60 and the fourth component 70, and the side wall of the welding layer 16 and the welding layer 17, and to isolate the welding layer 16 and the welding layer 17 and the welding pads.

In some embodiments, the fifth element 80 is an active part.

In some embodiments, the fixing layer 90 is a heat-dissipating insulating adhesive.

Referring to fig. 11, an embodiment of the invention further provides a circuit board 100, which includes a substrate 10, a protective layer 20 adhered to a surface of the substrate 10 by an adhesive layer 30, a first element 40, a second element 50, a third element 60 and a fifth element 80 soldered on the substrate 10 by bonding pads, a fourth element 70 soldered on the third element 60 by a soldering layer 16, and a fixing layer 90 for fixing the first element 40, the second element 50, the third element 60, the fourth element 70 and the fifth element 80.

The substrate 10 includes an insulating base layer 11, and a first conductive trace layer 123 and a second conductive trace layer 132 formed on two opposite surfaces of the base layer 11 and electrically connected to each other.

The first conductive trace layer 123 includes a bonding pad 122 for bonding components.

The part area 122 includes a first pad 124, a second pad 125, a third pad 126, and a fourth pad 128. The first bonding pad 124, the second bonding pad 125, the third bonding pad 126 and the fourth bonding pad 128 are respectively used for being connected with the first element 40, the second element 50, the third element 60 and the fifth element 80 by welding. The surface of the third component 60 away from the third pad 126 is provided with a pin 61. The lead 61 is connected to the fourth element 70 by the solder layer 16 provided thereon.

The second conductive trace layer 132 is provided with a heat dissipation area 131 opposite to the component mounting area 122. The heat dissipation region 131 is provided with a first heat dissipation pad 134, a second heat dissipation pad 135, a third heat dissipation pad 136 and a fourth heat dissipation pad 138 opposite to the first bonding pad 124, the second bonding pad 125, the third bonding pad 126 and the fourth bonding pad 128.

The first element 40 and the fifth element 80 are stacked in series at the first pad 124, and the second element 50 is soldered on the second pad 125. The third element 60 and the fourth element 70 are stacked in series at the third pad 126. The fifth element 80 is soldered to the fourth solder pad 128. Accordingly, the first and

third pads

fourth pads

135, 138 have a relatively small thickness.

The fifth member 80 covers the first member 40, the second member 50, the third member 60, and the fourth member 70.

The protection layer 20 covers the first conductive trace layer 123 and the second conductive trace layer 132 and exposes the component mounting region 122 of the first conductive trace layer 123.

The securing layer 90 fills the knockout region 122 to secure the first, second, third, fourth, and

fifth elements

40, 50, 60, 70, and 80.

The circuit board 100 of the present invention is manufactured by using two etching processes of copper reduction and DES to form a thicker first heat dissipation pad 134 and a thicker third heat dissipation pad 136, and a thinner second heat dissipation pad 135 and a thinner fourth heat dissipation pad 138. The first element 40, the second element 50, the third element 60, and the fourth element 70 (passive elements) can be disposed under the fifth element 80 (active element), and the first element 40 and the fifth element 80 can be connected in series to share the first bonding pad 124 and the first heat dissipation pad 134, and the third element 60 and the fourth element 70 can be connected in series and stacked to share the third bonding pad 126 and the third heat dissipation pad 136, so that the heat dissipation requirements of different electronic component assemblies can be met, the integration level is high, and the heat dissipation performance of the circuit board 100 is improved.

Although the present invention has been described with reference to the above preferred embodiments, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A manufacturing method of a circuit board comprises the following steps:

respectively thinning a first copper layer and a second copper layer which are opposite to each other on a substrate to form a part hitting area and a heat dissipation area, wherein a preset area of the heat dissipation area is not thinned;

respectively etching the first copper layer and the second copper layer to form a first conductive circuit layer and a second conductive circuit layer, forming a first welding pad, a second welding pad, a third welding pad and a fourth welding pad on the part beating area, and forming a first heat dissipation pad, a second heat dissipation pad, a third heat dissipation pad and a fourth heat dissipation pad which are opposite to each other on the heat dissipation area, wherein the first heat dissipation pad and the third heat dissipation pad formed in a preset area of the heat dissipation area are thicker than the second heat dissipation pad and the fourth heat dissipation pad;

mounting a fourth element on the third element;

2. The method of claim 1, further comprising a step of opening a hole and plating copper on the substrate before the step of forming the pad area and the heat dissipation area by thinning the first copper layer and the second copper layer, wherein the substrate comprises a base layer and the first copper layer and the second copper layer formed on two opposite surfaces of the base layer, the first copper layer is provided with a receiving hole, the receiving hole penetrates through the first copper layer and the base layer and exposes the second copper layer, the receiving hole is plated with copper to form a plating hole connecting the first copper layer and the second copper layer, and the first copper layer at the plating hole forms the first pad after etching.

3. The method of claim 1, wherein the step of etching the first copper layer and the second copper layer to form a first conductive trace layer and a second conductive trace layer, respectively, further comprises a step of laminating a protective layer on surfaces of the first conductive trace layer and the second conductive trace layer by a glue layer, wherein the protective layer covers the first conductive trace layer and the second conductive trace layer and exposes the component-making region of the first conductive trace layer.

4. The method for manufacturing a circuit board according to claim 1, wherein a step of forming a metal layer on the first pad, the second pad, the third pad, and the fourth pad in the component mounting region by performing surface treatment is further included before the step of solder-mounting the first element, the second element, and the third element on the first pad, the second pad, and the third pad, respectively.

5. The method for manufacturing a circuit board according to claim 1, further comprising a step of filling glue in the component mounting region to form a fixing layer after the step of mounting a fifth component on the fourth bonding pad and the first bonding pad.

6. A circuit board, comprising:

the first element is arranged on the first welding pad;

the second element is arranged on the second welding pad;

the third element is arranged on the third bonding pad;

a fourth element provided on the third element; and

7. The circuit board of claim 6, wherein the first conductive trace layer is formed with a plated hole that extends through the first conductive trace layer and the base layer and exposes the second conductive trace layer to connect the first conductive trace layer and the second conductive trace layer, the first conductive trace layer at the plated hole forming the first bonding pad.

8. The circuit board of claim 6, further comprising a protective layer adhered to the surface of the substrate by a glue layer, the protective layer covering the first and second conductive trace layers and exposing the knockout region of the first conductive trace layer.

9. The circuit board of claim 6, wherein the first pad, the second pad, the third pad, and the fourth pad in the play area have a metal layer thereon.

10. The circuit board of claim 6, further comprising a securing layer filling the knockout region.