JP2008270532A - Substrate with built-in inductor and manufacturing method thereof - Google Patents

Substrate with built-in inductor and manufacturing method thereof Download PDF

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Publication number
JP2008270532A
JP2008270532A JP2007111643A JP2007111643A JP2008270532A JP 2008270532 A JP2008270532 A JP 2008270532A JP 2007111643 A JP2007111643 A JP 2007111643A JP 2007111643 A JP2007111643 A JP 2007111643A JP 2008270532 A JP2008270532 A JP 2008270532A
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Prior art keywords
inductor
substrate
wiring layer
connection portion
formed
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JP2007111643A
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Japanese (ja)
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Manabu Nakamura
学 中村
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Shinko Electric Ind Co Ltd
新光電気工業株式会社
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Priority to JP2007111643A priority Critical patent/JP2008270532A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate with a built-in inductor which is easy in thickening the film, and has low resistance. <P>SOLUTION: The substrate with a built-in inductor comprises a substrate 30, an inductor 12 bonded on the substrate 30, and wiring layers 40-44 connected electrically to a first connection part A on one end side of the inductor 12 and to a second connection part B on the other end side, respectively. The thickness of the inductor 12 is set to be thicker than those of the wiring layers 40-44. The inductor 12 is formed by bonding an inductor member 12a obtained by press-working with a metal plate 10 to the substrate 30 using an adhesive layer 14. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an inductor-embedded substrate and a manufacturing method thereof, and more particularly to an inductor-embedded substrate applicable to a wiring substrate on which electronic components are mounted and a manufacturing method thereof.

  In recent years, with the progress of electronic devices, there is a demand for miniaturization and high functionality of a wiring board on which electronic components are mounted. For example, in a wiring board for an RF module used in a wireless communication device such as a mobile phone, a passive element built-in board with a built-in capacitor, inductor, resistor, and the like is used. Inductors are used for noise suppression, rectification, and smoothing in power supply circuits, and are used as filters for high-frequency circuits.

  In Patent Document 1, a coil pattern, a capacitor electrode, and a wiring pattern are formed on a dielectric layer, and a magnetic material is disposed in the vicinity of the coil pattern, so that a high L-value inductor and a large-capacity capacitor are common. It is described that a circuit component built-in substrate having a structure formed on a dielectric layer is obtained.

  Patent Document 2 describes that a metal sheet is machined by pressing or the like to form a spiral planar coil, and the planar coil is adhered to a reinforcing element, thereby strengthening the planar coil. ing.

Further, Patent Document 3 describes that a circuit board in which a circuit conductor is embedded is manufactured by inserting a circuit conductor into a punching groove provided in the insulating board and providing prepreg sheets on both sides of the insulating board. ing.
JP 2002-344106 A JP-A-6-310324 Japanese Patent Application Laid-Open No. 2004-7010

  As a method of incorporating an inductor in a wiring board, a method of obtaining an inductor by forming a spiral metal pattern layer on a substrate based on a plating method as in the wiring layer forming step is employed. Therefore, when the inductor is simultaneously formed in the wiring layer forming step, the thickness of the inductor is set to be the same as the thickness of the wiring layer (for example, about 30 μm).

  In recent years, inductors with low resistance have been demanded with the reduction in power consumption of electronic devices and the reduction in voltage of semiconductor chips (LSIs). This is because if the resistance of the inductor is high, an increase in transmission loss is caused, or a loss of power consumption due to heat generation of the inductor occurs. Since the resistance of an inductor greatly depends on its cross-sectional area, it is required to increase the thickness of the inductor.

  However, in the method of forming an inductor by the plating method as described above, there is a limit in increasing the film thickness, and there is a problem that it becomes difficult to meet the demand for lowering the resistance of the inductor.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an inductor-embedded substrate in which an inductor having a low resistance can be easily formed and a method for manufacturing the same.

  In order to solve the above-described problems, the present invention relates to a substrate with a built-in inductor, a substrate, an inductor bonded onto the substrate, a first connection portion on one end side of the inductor, and a second connection portion on the other end side. And a wiring layer electrically connected to each other, wherein the thickness of the inductor is larger than the thickness of the wiring layer.

  The inductor of the substrate with a built-in inductor according to the present invention is formed by plating or the like because an inductor member obtained by pressing a thick metal plate (for example, 100 to 300 μm) is bonded onto the substrate. It can be set considerably thicker than the thickness of the wiring layer (about 30 μm). As a result, the resistance of the inductor built in the substrate can be sufficiently lowered, so that it is possible to prevent a transmission loss or a loss of power consumption in the high-frequency circuit.

  In a preferred aspect of the present invention, an insulating layer is provided on the inductor, and through-holes penetrating the first connecting portion and the second connecting portion of the inductor respectively extend from the upper surface of the insulating layer to the lower surface side of the substrate. It is formed to penetrate. A through wiring portion connected to the wiring layer is formed in the through hole, and the first and second connection portions of the inductor are respectively connected to the wiring layer through the through wiring portion.

  In another preferred aspect of the present invention, an insulating layer is provided on the inductor, and via holes reaching the first connection portion and the second connection portion of the inductor are formed in the insulating layer. The first and second connection portions of the inductor are connected to the wiring layer through via holes, respectively.

  In order to solve the above problems, the present invention relates to a method of manufacturing a substrate with a built-in inductor, a step of forming an inductor by bonding an inductor member obtained by pressing a metal plate on a substrate, Forming a wiring layer electrically connected to the first connection portion on one end side of the inductor and the second connection portion on the other end side, and the thickness of the inductor is thicker than the thickness of the wiring layer It is characterized by doing things.

  By using the manufacturing method of the present invention, the above-described inductor-embedded substrate can be easily manufactured. In the present invention, an inductor member obtained by pressing a metal plate is used, so that even a thick film inductor that is difficult to form by plating can be easily built into the substrate.

  As described above, according to the present invention, an inductor having a low resistance can be easily built in the substrate, so that a substrate with a built-in inductor with low loss can be configured.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

(First embodiment)
1 to 5 are cross-sectional views showing a method of manufacturing an inductor-embedded substrate according to the first embodiment of the present invention, FIG. 6 is a cross-sectional view showing the inductor-embedded substrate, and FIG. It is sectional drawing which shows the semiconductor device comprised by mounting a chip | tip.

  In the method for manufacturing a substrate with a built-in inductor according to the first embodiment, first, a copper plate 10 having a thickness of 100 to 300 μm is prepared as shown in FIG. Next, as shown in FIG. 1B, a mold 20 composed of a lower mold 22 and an upper mold 24 is prepared. The mold 20 is for forming a spiral (spiral) inductor member by pressing the copper plate 10, and the lower mold 22 is provided with a spiral opening 22a. The upper mold 24 includes a spiral protrusion corresponding to the opening 22 a of the lower mold 22.

  Subsequently, as shown in FIGS. 1B and 1C, the copper plate 10 is disposed on the lower die 22, and the upper die 24 is moved downward to press the copper plate 10, thereby lowering the lower die 22. A portion of the copper plate 10 on the opening 22a is punched out. Thereby, as shown in FIG. 2, the copper plate 10 is stamped and the spiral inductor member 12a is obtained.

  In this embodiment, since the inductor member 12a is obtained by pressing the thick copper plate 10, the inductor member 12a can be made much thicker than a method using a plating method. Thereby, the inductor member 12a having a low resistance can be easily obtained. As shown in FIG. 2, a first connection portion A is defined on one end side inside the spiral inductor member 12a, and a second connection portion B is defined on the other end side outside. In the present embodiment, an example in which the inductor member 12a is obtained by pressing the copper plate 10 is illustrated, but a metal plate made of another metal material that can constitute the inductor may be used. Moreover, you may use metal foil, such as copper foil, as a metal plate.

  Next, as shown in FIG. 3A, first wiring layers 40 are formed on both sides of the core substrate 30 made of an insulating material such as resin. The structure shown in FIG. 3A can be formed by various methods. For example, a copper-clad laminate having a copper foil attached to both sides of a resin substrate is prepared, and the copper foil is easily patterned. Can be formed. An inductor placement region R in which the inductor member 12 a is placed is defined on the upper surface side of the core substrate 30.

  Subsequently, as illustrated in FIG. 3B, the above-described inductor member 12 a is bonded to the inductor arrangement region R of the core substrate 30 through the adhesive layer 14. As the adhesive layer 14, a semi-cured resin film may be cured by heat treatment, or a liquid adhesive may be used. As a result, as shown in FIG. 3C, the spiral inductor 12 is formed on the upper surface of the core substrate 30. 3B and 3C, the vicinity of the first and second connection portions A and B in the inductor member 12a of FIG. 2 is schematically illustrated.

  In this way, the inductor member 12 a obtained by press working is bonded onto the core substrate 30, whereby the thick film (preferably 100 μm to 300 μm) inductor 12 is easily formed on the core substrate 30. be able to. The line: space of the inductor 12 is set to 100 μm: 100 μm, for example.

  When an inductor is formed by a method of patterning a copper foil of a copper clad laminate or a plating method, considering that the thickness is about 30 μm at a practical level, the present embodiment uses a considerably thick inductor 12. It is understood that it can be formed.

  Next, as shown in FIG. 4A, a first interlayer insulating layer 50 that covers the first wiring layer 40 and the inductor 12 is formed on the upper surface side of the core substrate 30. Further, a first interlayer insulating layer 50 that covers the first wiring layer 40 is also formed on the lower surface side of the core substrate 30. The first interlayer insulating layer 50 is formed by adhering a resin film such as an epoxy resin, for example. In the present embodiment, even the inductor 12 having a thickness of 300 μm or more can be easily formed. However, a step may occur in the first interlayer insulating layer 50. In this case, the first interlayer insulating layer 50 The surface of is polished and flattened.

  Subsequently, as shown in FIG. 4B, in the structure of FIG. 4A, the upper side of the core substrate 30 is passed through the first connection portion A and the second connection portion B of the inductor 12, respectively. The first through hole TH1 and the second through hole TH2 are formed by drilling from the upper surface of the first interlayer insulating layer 50 to the lower surface of the lower first interlayer insulating layer 50 with a drill.

  The first through hole TH1 includes the upper first interlayer insulating layer 50, the first connection portion A inside the inductor 12, the adhesive layer 14, the core substrate 30, the lower first wiring layer 40, and the first It is formed through the interlayer insulating layer 50. In addition, the second through hole TH2 includes the upper first interlayer insulating layer 50, the second connecting portion B outside the inductor 12, the adhesive layer 14, the core substrate 30, and the lower first interlayer insulating layer 50. And is formed through.

  The first connection hole A of the inductor 12 and the inside of the lower first wiring layer 40 are exposed in the first through hole TH1, and the second connection hole B of the inductor 12 is exposed in the second through hole TH2. The inside is exposed.

  Further, as shown in FIG. 4C, the first interlayer insulating layer 50 on the lower surface side of the core substrate 30 is processed with a laser, thereby reaching the first wiring layer 40 on the lower surface side of the core substrate 30. A via hole VH1 is formed. The first via hole VH1 formed in the first interlayer insulating layer 50 may be formed as necessary and may be omitted.

  Next, as shown in FIG. 5A, electroless plating is performed on the first interlayer insulating layer 50 on both sides of the core substrate 30, and in the first and second through holes TH1 and TH2, and in the first via hole VH1. To form a seed layer (not shown) made of copper or the like. Furthermore, a metal plating layer (not shown) made of copper or the like is formed on the seed layer by electrolytic plating using the seed layer as a plating power supply path, thereby forming a metal layer 41a composed of the seed layer and the metal plating layer. obtain. At this time, the first and second through holes TH1 and TH2 are filled with the metal plating layer to form the through wiring portion 41b connected to the metal layer 41a.

  Subsequently, as shown in FIG. 5B, the metal layers 41a on both sides of the core substrate 30 are patterned by photolithography and etching, so that the first interlayer insulating layer 50 on both sides of the core substrate 30 is formed. A second wiring layer 42 is formed. The second wiring layers 42 on both sides of the core substrate 30 are formed to be interconnected through the through wiring portions 41b in the first and second through holes TH1 and TH2. The second wiring layer 42 on the lower surface side of the core substrate 30 is electrically connected to the first wiring layer 40 through the first via hole VH1.

  As a result, the first connection portion A of the inductor 12 is electrically connected to the second wiring layer 42 via the through wiring portion 41b in the first through hole TH1. Similarly, the second connection portion B of the inductor 12 is electrically connected to the second wiring layer 42 through the through wiring portion 41b in the second through hole TH2.

  Note that through-hole plating layers may be formed on the side surfaces of the first and second through-holes TH1 and TH2, and the internal holes may be filled with resin. In this case, the second wiring layers 42 on both sides of the core substrate 30 are interconnected via the through-hole plating layer.

  In this way, the first connection portion A and the second connection portion B of the inductor 12 are connected to the second wiring layer 42, whereby the inductor 12 is connected between the lines of the second wiring layer 42. In addition to the method described above, various wiring forming methods such as a semi-additive method can be used as a method for forming the second wiring layer 42 and the through wiring portion 41b.

  Next, as shown in FIG. 5C, the second interlayer insulating layer 52 that covers the second wiring layer 42 is formed on both sides of the core substrate 30. Furthermore, the second via holes VH2 reaching the second wiring layer 42 are formed by processing the second interlayer insulating layers 52 on both sides of the core substrate 30 with a laser. Thereafter, the third wiring layers 44 connected to the second wiring layer 42 through the second via holes VH2 are formed on the second interlayer insulating layers 52 on both sides of the core substrate 30 by a semi-additive method or the like. .

  Next, as illustrated in FIG. 6, solder resists 55 each having an opening 55 a on the connection portion of the third wiring layer 44 are formed on both surfaces of the core substrate 30. Further, a Ni layer and an Au layer are formed in order from the bottom on the third wiring layer 44 in the opening 55a of the solder resist 55 to form a contact layer (not shown). Thereby, the substrate 1 with a built-in inductor according to the first embodiment is obtained.

  In the present embodiment, three wiring layers (first to third wiring layers 40, 42, 44) are formed on both sides of the core substrate 30, but the number of wiring layers stacked can be arbitrarily set. it can. In this embodiment, the inductor 12 is directly formed on the core substrate 30. However, the inductor 12 may be formed on the first or second interlayer insulating layers 50 and 52 as a substrate. That is, the inductor 12 can be formed on various insulators that function as a substrate.

  As shown in FIG. 7, the bumps 62 of the semiconductor chip 60 (LSI chip) are flip-chip connected to the connection portions of the third wiring layer 44 on the upper surface side of the core substrate 30. Further, an underfill resin 64 is filled in the gap below the semiconductor chip 60. The external connection terminals 70 are provided by mounting solder balls on the connection portions of the third wiring layer 44 on the lower surface side of the core substrate 30. In this way, the semiconductor device 2 configured by mounting the semiconductor chip 60 on the inductor-embedded substrate 1 of the present embodiment is obtained.

  As shown in FIG. 6, in the inductor substrate 1 of the first embodiment, the copper plate 10 is pressed into the inductor placement region R (FIG. 3A) of the core substrate 30 provided with the first wiring layer 40 on both sides. The inductor 12 obtained in this way is formed by being adhered by an adhesive layer 14. A first interlayer insulating layer 50 that covers the inductor 12 and the first wiring layer 40 is formed on the upper surface side of the core substrate 30. A first interlayer insulating layer 50 that covers the first wiring layer 40 is also formed on the lower surface side of the core substrate 30.

  Further, a first through hole TH1 penetrating from the upper surface of the upper first interlayer insulating layer 50 to the lower surface of the lower first interlayer insulating layer 50 in a state of penetrating the first connection portion A inside the inductor 12 is formed. Has been. Similarly, the second through hole TH2 penetrating from the upper surface of the upper first interlayer insulating layer 50 to the lower surface of the lower first interlayer insulating layer 50 in a state of penetrating the second connection portion B outside the inductor 12. Is formed.

  Then, on the first interlayer insulating layer 50 on both sides of the core substrate 30, the second wiring layer 42 interconnected through the through wiring portion 41b filled in the first and second through holes TH1 and TH2 is provided. Each is formed. Thus, the first connection portion A inside the inductor 12 is electrically connected to the second wiring layer 42 through the through wiring portion 41b. Further, the second connection portion B outside the inductor 12 is electrically connected to the second wiring layer 42 through the through wiring portion 41b. The inductor 12 connected between the lines of the second wiring layer 42 is used for noise suppression, rectification, and smoothing in a power supply circuit, or used as a filter in a high-frequency circuit that transmits an electric signal.

  The first interlayer insulating layer 50 on the lower surface side of the core substrate 30 is provided with a first via hole VH1 reaching the first wiring layer 40, and the second wiring layer 42 is first through the first via hole VH1. Connected to the wiring layer 40.

  A second interlayer insulating layer 52 is formed on each of the second wiring layers 42 on both sides of the core substrate 30, and a second via hole VH 2 reaching the second wiring layer 42 is formed in the second interlayer insulating layer 52. Each is formed. Further, third wiring layers 44 connected to the second wiring layer 42 through the second via holes VH2 are respectively formed on the second interlayer insulating layers 52 on both sides of the core substrate 30. Further, solder resists 55 each having an opening 55 a on the connection portion of the third wiring layer 44 are formed on the second interlayer insulating layer 52 on both sides of the core substrate 30.

  As described above, in the inductor-embedded substrate 1 according to the present embodiment, the inductor 12 obtained by press working is bonded onto the core substrate 30. Therefore, the thickness is much larger than when the inductor is formed by plating. Can be set thick. As a result, the resistance of the inductor 12 can be sufficiently lowered, so that it is possible to prevent a transmission loss or a loss of power consumption from occurring in the high-frequency circuit.

  Further, as a method of connecting the inductor 12 and the wiring layer, first and second through holes TH1 and TH2 penetrating the first and second connection portions A and B of the inductor 12, the core substrate 30, and the like are formed, The inductor 12 and the wiring layer are connected to each other through the through wiring portion 41b filled in the wiring. As a result, routing of the wiring layer can be minimized, so that the inductor-embedded substrate can be miniaturized and used as a high-performance semiconductor chip mounting substrate.

(Second Embodiment)
8 and 9 are cross-sectional views illustrating a method for manufacturing an inductor-embedded substrate according to a second embodiment of the present invention, FIG. 10 is a cross-sectional view illustrating the inductor-embedded substrate, and FIG. It is sectional drawing which shows the semiconductor device comprised by mounting a chip | tip.

  Since the second embodiment is different from the first embodiment in the connection method between the inductor and the wiring layer, in the second embodiment, detailed description of the same steps and the same elements as those in the first embodiment is omitted.

  In the method of manufacturing a substrate with a built-in inductor according to the second embodiment, first, as shown in FIG. 8A, a through hole TH is formed in the core substrate 30, and the mutual through the through wiring portion 41b filled therein. A structure in which the connected first wiring layers 40 are formed on both sides of the core substrate 30 is prepared. Similar to the first embodiment, an inductor arrangement region R is defined on the upper surface of the core substrate 30.

  The method of obtaining the structure of FIG. 8A is to form a through hole TH in the core substrate 30 (resin substrate or copper-clad laminate) and fill the through hole TH in the through hole TH by plating. After the metal layers to be connected are formed on both sides of the core substrate 30, the metal layers are patterned. Note that a through-hole plating layer may be formed on the side surface of the through-hole TH, and an internal hole may be filled with resin.

  Next, as shown in FIG. 8B, similarly to the first embodiment, the inductor member 12 a obtained by pressing the copper plate 10 is bonded to the inductor arrangement region R on the upper surface of the core substrate 30 by the adhesive layer 14. As a result, the inductor 12 is formed on the core substrate 30.

  Subsequently, as shown in FIG. 8C, a first interlayer insulating layer 50 that covers the inductor 12 and the first wiring layer 40 is formed on the upper surface side of the core substrate 30. Further, a first interlayer insulating layer 50 that covers the first wiring layer 40 is formed on the lower surface side of the core substrate 30.

  Next, as shown in FIG. 8D, the first interlayer insulating layer 50 on the upper surface side of the core substrate 30 is processed by laser to reach the first and second connection portions A and B of the inductor 12, respectively. A first via hole VH1 and a second via hole VH2 reaching the first wiring layer 40 are formed. Furthermore, the second via hole VH2 reaching the first wiring layer 40 is formed by processing the first interlayer insulating layer 50 on the lower surface side of the core substrate 30 with a laser.

  Subsequently, as shown in FIG. 9A, a seed layer (not shown) is formed by electroless plating on the first via hole VH1 and the second via hole VH2 and on the first interlayer insulating layer 50 on both sides of the core substrate 30. ) Respectively. Thereafter, a metal plating layer (not shown) is formed by electrolytic plating using the seed layer as a plating power feeding path, thereby obtaining metal layers 41a each composed of the seed layer and the metal plating layer.

  Further, as shown in FIG. 9B, the second wiring layer 42 is formed on the first interlayer insulating layer 50 by patterning the metal layers 41 a on both sides of the core substrate 30. On the upper surface side of the core substrate 30, the second wiring layer 42 is connected to the first connection portion A and the second connection portion B of the inductor 12 via the first via hole VH <b> 1, and via the second via hole VH <b> 2. Connected to the first wiring layer 40. On the lower surface side of the core substrate 30, the second wiring layer 42 is connected to the first wiring layer 40 through the second via hole VH 2.

  Thus, the inductor 12 is connected between the lines of the second wiring layer 42 by connecting the second wiring layer 42 to the first connection part A and the second connection part B of the inductor 12.

  In addition to the method described above, various wiring forming methods such as a semi-additive method can be used as the method for forming the second wiring layer 42.

  Subsequently, as shown in FIG. 9C, as in the first embodiment, the second interlayer insulating layer in which the third via hole VH3 is provided on the second wiring layer 42 on both sides of the core substrate 30. 52 are formed. Thereafter, the third wiring layers 44 connected to the second wiring layer 42 through the third via holes VH3 are respectively formed on the second interlayer insulating layers 52 on both sides of the core substrate 30.

  Further, as shown in FIG. 10, solder resists 55 each having an opening 55 a on the connection portion of the third wiring layer 44 are formed on both sides of the core substrate 30. Thereafter, as in the first embodiment, a contact layer (not shown) is formed on the third wiring layer 44 in the opening 55a of the solder resist 55. Thereby, the substrate with built-in inductor 1a of the second embodiment is obtained.

  As shown in FIG. 11, as in the first embodiment, the bumps 62 of the semiconductor chip 60 are flip-chip connected to the connection portions of the third wiring layer 44 on the upper surface side of the core substrate 30. Further, an underfill resin 64 is filled in the gap below the semiconductor chip 60. In addition, external connection terminals 70 are provided at the connection portions of the third wiring layer 44 on the lower surface side of the core substrate 30. In this way, the semiconductor device 2a configured by mounting the semiconductor chip 60 on the inductor-embedded substrate 1a of the second embodiment is obtained.

  As shown in FIG. 10, in the inductor-embedded substrate 1a of the second embodiment, the inductor member 12a obtained by pressing the copper plate 10 is bonded to the inductor arrangement region R (FIG. 8A) of the core substrate 30. The inductor 12 is formed by being bonded by the layer 14. A through hole TH is provided in the lateral direction of the inductor arrangement region R of the core substrate 30, and the through wiring portion 41b is filled therein. A first wiring layer 40 connected to the through wiring portion 41b and interconnected is formed on both surfaces of the core substrate.

  A first interlayer insulating layer 50 that covers the inductor 12 and the first wiring layer 40 is formed on the upper surface side of the core substrate 30. The first interlayer insulating layer 50 is provided with a first via hole VH1 reaching the inductor 12 and a second via hole VH2 reaching the first wiring layer 40. Further, a second wiring layer 42 is formed on the first interlayer insulating layer 50. The second wiring layer 42 is connected to the first connection portion A of the inductor 12 through the first via hole VH1, and is connected to the first wiring layer 40 through the second via hole VH2. The other second wiring layer 42 is connected to the second connection portion B of the inductor 12 through the first via hole VH1 and is connected to the first wiring layer 40 through the second via hole VH2.

  As described above, in the second embodiment, through holes are not formed in the first and second connection portions A and B of the inductor 12, and the first via hole VH <b> 1 provided in the first interlayer insulating layer 50 covering the inductor 12. The first and second connection portions A and B are connected to the second wiring layer 42 through the first and second wiring layers 42, respectively. In this way, the inductor 12 is connected between the lines of the second wiring layer 42.

  A first interlayer insulating layer 50 that covers the first wiring layer 40 is formed on the lower surface side of the core substrate 30, and a second via hole VH 2 that reaches the first wiring layer 40 is formed in the first interlayer insulating layer 50. Is provided. Further, a second wiring layer 42 connected to the first wiring layer 40 via the second via hole VH2 is formed on the first interlayer insulating layer 50.

  Further, on the second wiring layer 42 on both sides of the core substrate 30, a second interlayer insulating layer 52 provided with a third via hole VH3 reaching to the second wiring layer 42 is formed. A third wiring layer 44 connected to the second wiring layer 42 through the third via hole VH3 is formed respectively. Furthermore, solder resists 55 each having an opening 55 a are formed on the connection portion of the third wiring layer 44 on both sides of the core substrate 30.

  In the second embodiment, the first and second connection portions A and B of the inductor 12 are connected to the second wiring layer 42 via the first via hole VH1 provided in the first interlayer insulating layer 50 thereon. Therefore, the inductor 12 can be easily built in the wiring board by connecting it to the wiring layer by a general build-up wiring forming method.

  In the second embodiment, the through hole TH of the core substrate 30 may be omitted, and a wiring layer connected to the inductor 12 may be formed only on the upper surface side of the core substrate 30. In this case, an external connection terminal is provided in the lateral direction of the semiconductor chip 60 in FIG.

  Also in the second embodiment, since the inductor 12 is formed by bonding the inductor member 12a obtained by pressing the copper plate 10 on the core substrate 30, the same effects as those of the first embodiment are obtained.

  In the first and second embodiments described above, the inductor 12 may have a shape other than the spiral shape, or may include a passive element such as a capacitor or a resistor.

1A to 1C are cross-sectional views (No. 1) showing a method for manufacturing a substrate with a built-in inductor according to a first embodiment of the present invention. FIG. 2 is a sectional view (No. 2) showing the method for manufacturing the inductor-embedded substrate according to the first embodiment of the present invention. 3A to 3C are cross-sectional views (part 3) illustrating the method for manufacturing the inductor-embedded substrate according to the first embodiment of the present invention. 4A to 4C are cross-sectional views (part 4) showing the method for manufacturing the substrate with a built-in inductor according to the first embodiment of the present invention. 5A to 5C are sectional views (No. 5) showing the method for manufacturing the inductor-embedded substrate according to the first embodiment of the invention. FIG. 6 is a sectional view showing the inductor-embedded substrate according to the first embodiment of the present invention. FIG. 7 is a cross-sectional view showing a semiconductor device configured by mounting a semiconductor chip on the inductor-embedded substrate according to the first embodiment of the present invention. 8A to 8D are cross-sectional views (part 1) showing the method for manufacturing the inductor-embedded substrate according to the second embodiment of the present invention. 9A to 9C are cross-sectional views (part 2) showing the method for manufacturing the inductor-embedded substrate according to the second embodiment of the present invention. FIG. 10 is a cross-sectional view showing a substrate with a built-in inductor according to a second embodiment of the present invention. FIG. 11 is a cross-sectional view showing a semiconductor device configured by mounting a semiconductor chip on a substrate with a built-in inductor according to a second embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,1a ... Inductor built-in board | substrate, 2, 2a ... Semiconductor device, 10 ... Copper plate, 12a ... Inductor member, 12 ... Inductor, 14 ... Adhesive layer, 20 ... Mold, 22 ... Lower mold | type, 22a, 55a ... Opening part, 24 ... upper mold, 30 ... core substrate, 40 ... first wiring layer, 41a ... metal layer, 41b ... through wiring portion, 42 ... second wiring layer, 44 ... third wiring layer, 50 ... first interlayer insulating layer, 52 ... second interlayer insulating layer, 55 ... solder resist, A ... first connection part, B ... second connection part, R ... inductor arrangement region, TH ... through hole, VH1 ... first via hole, VH2 ... second via hole.

Claims (10)

  1. A substrate,
    An inductor bonded onto the substrate;
    A wiring layer electrically connected to each of the first connection portion on one end side and the second connection portion on the other end side of the inductor;
    The inductor-embedded substrate, wherein the inductor is thicker than the wiring layer.
  2.   2. The inductor built-in substrate according to claim 1, wherein an inductor member obtained by pressing a metal plate is bonded to the substrate by an adhesive layer.
  3. An insulating layer is provided on the inductor;
    A through hole penetrating each of the first connection portion and the second connection portion of the inductor is formed to penetrate from the upper surface of the insulating layer to the lower surface side of the substrate, and the wiring layer is formed in the through hole. A through wiring portion connected to each other is formed, and the first connection portion and the second connection portion are respectively connected to the wiring layer through the through wiring portion. The substrate with a built-in inductor described in 1.
  4. An insulating layer is provided on the inductor;
    Via holes reaching the first connection portion and the second connection portion of the inductor are respectively formed in the insulating layer, and the first connection portion and the second connection portion are formed in the wiring layer through the via holes. The inductor-embedded substrate according to claim 1, wherein each of the substrates is connected.
  5.   3. The inductor-embedded substrate according to claim 1, wherein the inductor is made of copper and has a thickness of 100 to 300 μm.
  6. Bonding an inductor member obtained by pressing a metal plate on a substrate to form an inductor;
    Forming a wiring layer electrically connected to each of the first connection portion on one end side and the second connection portion on the other end side of the inductor,
    The method of manufacturing a substrate with a built-in inductor, wherein the inductor has a thickness greater than that of the wiring layer.
  7. The step of forming the wiring layer includes:
    Forming an insulating layer on the inductor;
    Forming through holes penetrating the first connection portion and the second connection portion of the inductor from the upper surface of the insulating layer to the lower surface side of the substrate;
    Forming a through wiring portion connected to the first connection portion and the second connection portion in the through hole, respectively, and forming the wiring layer connected to the through wiring portion on the insulating layer; The method for manufacturing a substrate with a built-in inductor according to claim 6, comprising:
  8. The step of forming the wiring layer includes:
    Forming an insulating layer on the inductor;
    Forming via holes respectively reaching the first connection portion and the second connection portion of the inductor by processing the insulating layer;
    And forming the wiring layer connected to the first connection portion and the second connection portion of the inductor via the via hole on the insulating layer. Manufacturing method for substrate with built-in inductor.
  9.   The method of manufacturing a substrate with a built-in inductor according to any one of claims 6 to 8, wherein the inductor is made of copper and has a thickness of 100 to 300 µm.
  10. A first wiring layer interconnected via through-holes formed through the substrate is formed on both sides of the substrate in the lateral direction of the inductor, and is formed on the insulating layer. The wiring layer formed is a second wiring layer;
    In the step of forming the via hole, a via hole reaching the first wiring layer is simultaneously formed,
    9. The method of manufacturing a substrate with a built-in inductor according to claim 8, wherein the second wiring layer connected to the inductor is connected to the first wiring layer through the via hole.
JP2007111643A 2007-04-20 2007-04-20 Substrate with built-in inductor and manufacturing method thereof Withdrawn JP2008270532A (en)

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JP2013070035A (en) * 2011-09-22 2013-04-18 Ibiden Co Ltd Multilayer printed wiring board
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US9307645B2 (en) 2012-07-18 2016-04-05 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
US20140020940A1 (en) * 2012-07-18 2014-01-23 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
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