KR20110131047A - Manufacturing method of embedded pcb and structure for manufacturing embedded pcb - Google Patents

Abstract

PURPOSE: A method for manufacturing an embedded type printed circuit board and a structure for the embedded type printed circuit board are provided to efficiently emit a heat to outside by supporting the mounting surface of a chip within a cavity area using a metal layer. CONSTITUTION: A base board(110) is formed on the surface of a first insulation layer(111). The base board comprises a circuit pattern which is electrically connected. First metal layers(140,141) are formed in the chip mounting range on the first insulation layer. One side supporting metal insulation layer is composed of an insulating layer and a second metal layer(220). The insulating layer is laminated in the base board of a part in which the first metal layer is formed. An external circuit pattern which is connected to the terminal of a chip is formed.

Description

Manufacturing method of embedded printed circuit board and structure for manufacturing embedded printed circuit board

The present invention relates to a method of manufacturing a buried printed circuit board, and more particularly, to the manufacture of a printed circuit board that can perform a heat dissipation function while implementing a stable mounting structure of an electronic device chip.

Printed circuit boards are solidifying their status as one of electronic components with the development of semiconductors and electronic devices, and all electric and electronic devices such as radios, televisions, PCS, and various other electrical and electronic products, as well as computers and high-tech electronic equipment. It is widely used as a component for implementing the circuit of. In recent years, as the technological progress in this field becomes remarkable, high quality is required in printed circuit boards, thereby rapidly increasing density. Particularly, in the manufacture of embedded PCB, a metal material such as Au is plated on the part where the component is to be surface-mounted, and for this purpose, masking treatment is performed using a dry film resist (hereinafter referred to as 'DFR'). This is achieved through a process.

One of the most important parts of the embedded technology of the embedded PCB is the high I / O count of the embedded components. This can be expressed as a fine pitch implementation level. For this, most development technologies use vias and / or metal bumps and lands to connect electronic device chips with circuits. Or, it is implemented using a fine pattern circuit technology such as a bonding process using a structure such as solder and solder pad (Solder / Pad).

Referring to FIG. 1, this conceptually illustrates a process of mounting an electronic device chip on a printed circuit board using solder and a solder pad (Solder / Pad) in a conventional buried printed circuit board manufacturing process.

Conventionally, in order to connect the electronic device chip 5 on the inner circuit board on which the insulating layer 1 and the outer metal layers 2 and 2 'and the circuit pattern 3 are implemented, the solder ball pad 6 is shown. ) To form a solder ball (7), and indirectly connected to a part of the circuit pattern (3) of the printed circuit board. Subsequently, the insulation layer 8 is stacked upside down and the outer circuit pattern is implemented 10 or the via hole 11 is plated to complete the circuit.

However, the chip mounting method of the buried printed circuit board has a technical difficulty in the manufacturing process to align the position to mount the chip accurately, reducing the process efficiency to the hassle to form a base point for fixing the chip, Since the heat dissipation structure for dissipating the heat source generated inside the chip to the outside is not secured, there is a problem that the error rate due to heat increases during the operation of the component.

The present invention has been made to solve the above-described problem, an object of the present invention is to machine a cavity that is not penetrated by sealing one side with a metal layer on an insulating layer having an internal circuit pattern, so that the component can be mounted Therefore, the process of forming a base point for fixing a separate chip is not necessary, and thus, the efficiency of the process can be realized, and the bottom surface on which the chip is mounted in the cavity area is supported by the metal layer, so that the heat generated during operation The present invention provides a buried printed circuit board and a method for manufacturing the same that can be efficiently discharged to the outside of the printed circuit board.

In addition, the process is performed in the state of forming a single-side support metal layer supporting the lower portion of the metal layer of the chip mounting region. When chip bonding in the chip mounting region, the expansion of the metal layer (Cu), sag caused by gravity, and processing work (Handling) Another object of the present invention is to provide a manufacturing process that can prevent damage to the metal layer that can occur during the), to implement a reliable product.

In order to solve the above problems, the present invention comprises the steps of forming a single-side support metal layer on one surface of the base substrate having at least one internal circuit pattern on the first insulating layer; Forming a chip mounting region in the first insulating layer and mounting a chip; It provides a method of manufacturing a buried printed circuit board comprising; three steps of forming an external circuit pattern connected to the terminal of the chip.

In addition, the above-described single-sided support metal layer of the first step is formed in a laminated structure of the second insulating layer and the second metal layer.

In addition, the step 2, a1) processing the cavity region using a first metal layer formed on one surface of the first insulating layer as a stopper layer; a2) bonding the chip to the first metal layer through an adhesive material in the cavity region; In this case, the first insulating layer is processed by laser processing until the first metal layer is exposed, and the width of the cavity area to be processed is smaller than the width of the first metal layer. And bonding the back surface of the connection terminal of the active device or the passive device to the first metal layer with an adhesive material and curing the adhesive.

Particularly, the step 3 may include: b 1) stacking a third insulating layer and a third metal layer to fill the chip terminal and the first insulating layer; b 2) processing and filling the through hole for electrically connecting the chip terminal or the internal circuit pattern; b 3) patterning the second metal layer and the third metal layer to form the external circuit pattern. In this case, step b 1) is a step of laying up a second insulating layer and a second metal layer of the same or different material as that of the first insulating layer. Any one of electroless plating, electroplating, screen printing, sputtering, evaporation, inkjetting, dispensing any one selected from among Sn, Au, Ni, Pd, or It can be configured by the step of filling using a combination of these methods.

The buried printed circuit board manufacturing structure used in the above-described manufacturing process has the following structure and can be manufactured into an efficient printed circuit board.

Specifically, the base substrate having a circuit pattern electrically connected to the surface of the first insulating layer; A first metal layer formed in the chip mounting region on the first insulating layer; A structure may be used; a single-sided support metal layer including an insulating layer and a second metal layer laminated on the base substrate surface of the portion where the first metal layer is formed.

In particular, in the above-described structure, the chip mounting region may include: a cavity region formed as a space region empty in the first insulating layer of the base substrate, and the first insulating layer formed on a surface of the first insulating layer to seal one surface of the cavity region. It may be composed of a metal layer.

The above structure may further include an electronic device chip having an opposite surface of the chip terminal connected to the first metal layer with an adhesive material, and further comprising a third insulating layer stacked on the base substrate. The structure may further be modified to further include a third metal layer.

In addition, the above-described structure may further include at least one or more connecting portions electrically connecting the chip terminal or the internal circuit pattern with the third metal layer, wherein the third metal layer is an area where the surface of the third insulating layer is exposed. It can be transformed into a structure having a plurality of completed to a printed circuit board.

According to the present invention, a process of forming a base point for fixing a separate chip is required by processing a cavity in which one side is closed and not penetrated by a metal layer on an insulating layer having an internal circuit pattern, so that components can be mounted. There is no effect to realize the efficiency of the process.

In addition, by supporting the lower surface on which the chip is mounted in the cavity area with the metal layer, there is an effect that the heat generated during the operation of the component can be efficiently released to the outside of the printed circuit board.

In particular, the process is performed in the state of forming a single-side supporting metal layer supporting the lower part of the metal layer of the chip mounting region. When chip bonding in the chip mounting region, the expansion of the metal layer (Cu), sag caused by gravity, and processing work ) Can prevent damage to the metal layer that can occur, there is an effect that can implement a reliable product.

1 is a conceptual diagram illustrating a chip mounting method of a conventional buried printed circuit board.
2A to 2C show a manufacturing flowchart and process diagram according to the present invention.
3A and 3B are cross-sectional conceptual views showing the structure of a buried printed circuit board manufactured by a manufacturing process according to the present invention.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation according to the present invention. In the description with reference to the accompanying drawings, the same components are given the same reference numerals regardless of the reference numerals, and duplicate description thereof will be omitted. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

The present invention processes a cavity that is not penetrated by using a first metal layer on a single sided support metal layer supported from the bottom as a stopper layer in order to embed a component in a base substrate having a circuit pattern, thereby preventing damage to the first metal layer. To improve the efficiency of the component mounting technology, to provide a manufacturing process for manufacturing a printed circuit board having a structure that can implement a heat dissipation effect through the metal layer.

Specifically, the manufacturing process according to the present invention with reference to Figures 2a to 2c as follows. Figure 2a is a manufacturing flow chart according to the present invention, Figures 2b and 2c is a manufacturing process chart according to the present invention.

In the manufacturing process of the buried printed circuit board according to the present invention, a step of forming a single-side support metal layer on one surface of a base substrate having at least one or more internal circuit patterns on the first insulating layer and chip mounting on the first insulating layer And two steps of forming an area and mounting a chip, and three steps of forming an external circuit pattern connected to the terminals of the chip.

The above-described process will be described in detail with reference to the presented flowchart and process diagram.

1. Form one-side support metal layer on the base substrate (Step 1)

Referring to FIG. 2B, in the SO step process, a single-sided support metal layer including the second insulating layer 210 and the second metal layer 220 is stacked below the base substrate 110. The single-sided support metal layer prevents damage to the first metal layers 140 and 141 in a process such as cavity processing and chip mounting in a subsequent process, and enables a stable process to be performed. In other words, it is possible to prevent the expansion of the first metal layer (Cu), sagging due to gravity, and damage to the metal layer that may occur during handling during chip bonding in the chip mounting area, thereby realizing a reliable product. Do this.

2. Formation of chip mounting area and chip mounting process (2 steps)

Thereafter, the cavities 120 and 121 are processed in the first insulating layer 112 of the base substrate on which the single-sided supporting metal layer is formed (step S1). In other words, a portion in which the circuit pattern is not formed is processed in the first insulating layer 112 that is the basis of the base substrate 110 having the circuit pattern 111 electrically connected to the conductive hole 113. As a result, the cavity 120 which is an empty area is formed. Particularly, in this case, one surface of the first insulating layer on which the cavity is processed includes the first metal layers 140 and 141, and has a chip mounting area in which only the upper surface is opened and does not penetrate through the cavity. In other words, the chip mounting area is defined as an area surrounded by the internal spaces 120 and 121 and the first metal layers 140 and 11 of the first insulating layer. The cavity may be processed by etching a first insulating layer through laser processing, and in this case, the first insulating layer is scraped off using the first metal layer as an etch stopper layer. It is preferable to carry out until the 1 metal layer is exposed.

The first metal layer is formed at a position covering one surface of the cavity, and preferably, the width of the cavity is narrower than the width of the first metal layer to implement a stable chip mounting region. The first metal layer may be formed using a material such as Cu, Ag, Sn, Au, Ni, Pd, and the like, and in particular, the first metal layer is formed of Cu as an example.

Subsequently, the chips 150 and 152 are arranged in the chip mounting region including the first metal layers 140 and 141 and then bonded to the first metal layer with an adhesive material. step). In this case, after bonding the chip with the connection material, the connection material is cured to firmly bond. The chip may include the active element 150 or the passive element 152, and the back surface of the connection terminals 151 and 153 of each element may be bonded to the first metal layers 140 and 141.

3. Formation process of external circuit pattern (3 steps)

After the step S1, the chip bonded to the chip mounting area lays up the third insulating layer 220 and the third metal layer 230 for multilayering on the terminal (S21 ~). Step S22). Here, the layup refers to a process of aligning the insulating layer and the metal layer and laminating them by heating and pressing.

In this case, the first insulating layer 112 and the third insulating layer 220 of the base substrate may be formed of the same material, or different materials may be used. Insulating materials that can be used include epoxy, phenolic resin, prepreg, polyimide film, Ajinomoto Build up Film (ABF), FR4, and the like.

Thereafter, a process of processing the through hole H1 electrically connecting the chip terminals 151 and 153 or the internal circuit pattern 111 and filling the inside of the through hole with a metal material is performed. The metal material to be filled is electroless plating, electroplating, screen printing, sputtering, evaporation, evaporation, any one selected from Cu, Ag, Sn, Au, Ni, and Pd. Filling may be performed using any one of inkjetting and dispensing, or a combination thereof (steps S 31 to S 32).

Thereafter, a process of forming the external circuit patterns 221 and 241 by patterning the second metal layer 220 and the third metal layer 240 may be performed. The external circuit patterns 221 and 241 may be formed using an etching method or an addifive method, which will be omitted.

3. Second Embodiment

In the manufacturing process of the buried printed circuit board according to the present invention as described above, the first insulating layer is processed to form a cavity by using the first metal layer as a stopper layer, and the process of naturally aligning and mounting chips in the cavity thus formed. As a matter of fact, depending on how to use the structure of the base substrate, which is the starting point of other processes, a structure having slightly different circuit layers can be realized.

2C is a structure in which the circuit pattern of the base substrate is formed on both sides of a single insulating layer, and the base substrate itself has a multilayer insulating layer 112, 113, 114 and an external circuit or an internal circuit formed thereon. In the case of performing the process of FIG. 2B by using the multi-layer printed circuit board can be implemented.

Of course, even in this case, it is preferable to perform the process in a structure in which a single-sided support metal layer formed of the second insulating layer 210 and the second metal layer 220 is formed below the base substrate (step P 0).

That is, in brief, the cavity 120, 121 is processed in the first insulating layer portion of the base substrate 110 (P 11), and the first metal layer 140, 141 is applied to the first metal layer 140, 141 through the adhesive materials 130, 131. The chips 150 and 152 are bonded to each other (P 12 to P 13), and then the third insulating layer 230 and the third metal layer 240 are laid up on the upper and lower surfaces of the base substrate (P 21 to P 22). It may be performed by a process of completing a printed circuit board by filling a conductive hole (H1) processing and a metal material 250 to realize electrical connection between the terminal and the circuit pattern of the chip or the circuit pattern. In the present invention, it is not necessary to form a base point for fixing a separate chip by using a cavity in which the insulating layer is not penetrated by the metal layer, and the chip is mounted. Since the bottom is a metal layer (Cu Pattern), there is an advantage in that the heat generated when operating a component can be removed by connecting it to the outside of the PCB. In addition, the process step is performed by using a single-sided support metal layer. In the chip mounting region, when the chip is bonded, the expansion of the first metal layer (Cu), deflection by gravity, and damage to the metal layer that may occur during handling are performed. It can be prevented, it is possible to implement a reliable product as described above.

In the process steps of FIGS. 2B and 2C, the buried printed circuit board structure according to the present invention has a structure implementing the characteristic manufacturing process effects of the present invention.

That is, the structure of step S 0 of FIG. 2B includes a base substrate having a circuit pattern electrically connected to the surface of the first insulating layer, and includes a first metal layer formed in the chip mounting region on the first insulating layer. It is a structure. In particular, by adding a one-side supporting metal layer composed of a soft layer and a second metal cutting layer laminated on the surface of the base substrate where the first metal layer is formed, the first metal layer sealing one surface of the cavity formed by processing the first insulating layer is formed. It can be stably supported, through which it is possible to exclude the damage of the first metal layer in the chip bonding process or lamination process later. As described above, the structure of step P 0 of FIG. 2C also implements the same specificity.

The buried printed circuit board manufacturing structure may include a cavity region formed as an empty space region on the first insulating layer of the base substrate and a surface of the first insulating layer formed to seal one surface of the cavity region according to a process step. It may be changed to a structure consisting of a metal layer (see step S 11 of FIG. 2b). In this case, even when the first insulating layer is processed through laser processing or the like, a stable process may be realized due to the existence of the single-sided support metal layers 210 and 220.

In addition, the above-described structure for manufacturing the buried printed circuit board according to the present invention, the structure further comprises an electronic device chip in which the opposite side of the chip terminal is connected to the first metal layer on the first cavity layer processed by the adhesive material. It may be changed to, and may further include a third insulating layer and a third metal layer stacked on the base substrate to implement an external circuit pattern. In addition, in order to electrically connect the external circuit pattern and the chip terminal, a connection part for electrically connecting the chip terminal or the internal circuit pattern with the third metal layer may be further provided.

The buried printed circuit board structure may finally complete the buried printed circuit board having the circuit pattern by selectively removing the third metal layer.

3A and 3B, a structure of a buried printed circuit board manufactured by using the buried printed circuit board structure described above will be described.

The buried printed circuit board according to the present invention includes chips 150 and 152 connected to an external circuit pattern 221 formed on the surface of the first insulating layer 111, as shown in FIG. 3A. And first metal layers 140 and 141 bonded to the rear surface of the electronic device chip. In this case, a cavity region which is a space region in which a chip is mounted on the first insulating layer 111 and a region formed by the first metal layer are defined as a chip mounting region.

The first metal layers 140 and 141 are formed to seal one surface of the cavity region formed by processing the first insulating layer 111 having an internal circuit pattern, and thus, the width X1 of the first metal layer. ) May have a length wider than the width Y1 of the cavity area.

In addition, it is preferable that a nonconductive adhesive material is disposed between the chips 150 and 152 and the first metal layers 140 and 141 to realize a firm coupling between the two components. In addition, although the chip illustrated illustrates a structure in which one active device 150 and a passive device 152 are mounted at the same time, a chip mounting only one of these chips or chips having a combination thereof are used. It is also apparent to those skilled in the art that the mounting is possible, and will be included in the gist of the present invention.

In addition, a second insulating layer 220 of the same or different material as the first insulating layer may be formed on the upper and lower portions of the first insulating layer 111. In addition, the external circuit pattern 221 is provided on the surface of the second insulating layer 220 electrically connected to the internal circuit pattern, and the internal and external circuit patterns are electrically connected through the through hole 230. Will be. The inside of the through hole may be filled with a material such as Cu, Ag, Sn, Au, Ni, Pd.

3B has the same structure in which the chip is mounted in the chip mounting region formed of the first metal layer and the cavity region as shown in FIG. 3A, but the base substrate made of the material has a two-layer circuit pattern as shown in FIG. 3A. However, there is a difference in that the structure includes a plurality of insulating layers 112, 113, and 113 having a multilayer circuit pattern.

The buried printed circuit board according to the present invention having the above-described structure is a structure in which a chip mounting region is provided in the first insulating layer, so that stable mounting of the chip is possible and heat dissipation characteristics are improved due to the presence of the first metal layer under the chip. Significantly improved advantages are realized.

In the foregoing detailed description of the present invention, specific examples have been described. However, various modifications are possible within the scope of the present invention. The technical idea of the present invention should not be limited to the embodiments of the present invention but should be determined by the equivalents of the claims and the claims.

110: base substrate
111: first insulating layer
112: internal circuit pattern
120: cavity area
130, 131: adhesive material
140 and 141: first metal layer
150: active element
151: connecting terminal
152: passive element
153: connection terminal
210: second insulating layer
220: second metal layer
230: third insulating layer
240: third metal layer

Claims (14)

Forming a single-side support metal layer on one surface of the base substrate having at least one internal circuit pattern on the first insulating layer;
Forming a chip mounting region in the first insulating layer and mounting a chip;
Forming an external circuit pattern connected to the terminals of the chip;
Method of manufacturing a buried printed circuit board comprising a.
The method according to claim 1,
The single-sided support metal layer of the first step,
A method of manufacturing a buried printed circuit board having a laminated structure of a second insulating layer and a second metal layer.
The method according to claim 1 or 2,
In the second step,
a1) processing the cavity region using the first metal layer formed on one surface of the first insulating layer as a stopper layer;
a2) bonding the chip to the first metal layer using an adhesive material in the cavity region;
Method of manufacturing a buried printed circuit board consisting of.
The method according to claim 3,
The step a1),
The first insulating layer is processed by laser processing until the first metal layer is exposed, and the width of the cavity area to be processed is first
A method of manufacturing a buried printed circuit board, which is a step of processing to be smaller than the width of the metal layer.
The method according to claim 3,
In step a 2),
And attaching and curing the back surface of the connection terminal of the active device or the passive device to the first metal layer with an adhesive material.
The method according to claim 3,
The third step,
b) laminating a third insulating layer and a third metal layer to fill the chip terminal and the first insulating layer;
b 2) processing and filling the through hole for electrically connecting the chip terminal or the internal circuit pattern;
b 3) patterning the second metal layer and the third metal layer to form the external circuit pattern;
Method for manufacturing a phosphorus embedded printed circuit board.
The method of claim 6,
Step b 1) is,
And laying up the second insulating layer and the second metal layer having the same or different materials as those of the first insulating layer.
The method of claim 6,
Step b 2) is,
Electroless plating, electroplating, screen printing of any one selected from Cu, Ag, Sn, Au, Ni, Pd,
A method of manufacturing a buried printed circuit board, which is a step of filling using any one or a combination of sputtering, evaporation, inkjetting, and dispensing.
A base substrate having a circuit pattern electrically connected to a surface of the first insulating layer;
A first metal layer formed in the chip mounting region on the first insulating layer;
A one-side supporting metal layer comprising an insulating layer and a second metal layer laminated on the base substrate surface of the portion where the first metal layer is formed;
The buried printed circuit board manufacturing structure is formed.
The method according to claim 9,
The chip mounting area is,
A cavity region formed as an empty space region in the first insulating layer of the base substrate; and
And a first metal layer formed on a surface of the first insulating layer to seal one surface of the cavity region.
The method according to claim 10,
The buried printed circuit board manufacturing structure of claim 1, further comprising an electronic device chip on the first metal layer opposite side of the chip terminal is connected to the adhesive material.
The method of claim 11,
A buried printed circuit board manufacturing structure further comprising a third insulating layer and a third metal layer stacked on the base substrate.
The method of claim 12,
The embedded printed circuit board manufacturing structure of claim 1, further comprising at least one or more connecting portions for electrically connecting the chip terminal or the internal circuit pattern with the third metal layer.
The method according to claim 13,
The third metal layer is,
A structure for manufacturing a buried printed circuit board having a plurality of regions where the surface of the third insulating layer is exposed.

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