CN110556376A - 包含二维半导电性材料的纳米片场效晶体管 - Google Patents

包含二维半导电性材料的纳米片场效晶体管 Download PDF

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CN110556376A
CN110556376A CN201910354743.1A CN201910354743A CN110556376A CN 110556376 A CN110556376 A CN 110556376A CN 201910354743 A CN201910354743 A CN 201910354743A CN 110556376 A CN110556376 A CN 110556376A
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semiconductive material
layer
dimensional
source
dimensional semiconductive
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CN110556376B (zh
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朱利安·弗罗吉尔
谢瑞龙
尼可拉斯·罗贝特
程慷果
李俊涛
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GlobalFoundries US Inc
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GlobalFoundries Inc
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    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
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    • H01L29/772—Field effect transistors
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    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
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    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
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    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane

Abstract

本发明涉及包含二维半导电性材料的纳米片场效晶体管，其揭示用于场效晶体管的结构、以及形成用于场效晶体管的结构的方法。多个沟道层是设置于层堆叠中，并且源极/漏极区与该多个沟道层连接。栅极结构包括多个区段，所述区段分别围绕该多个沟道层。该多个沟道层含有二维半导电性材料。

Description

包含二维半导电性材料的纳米片场效晶体管
技术领域
本发明是关于半导体装置制作及集成电路，并且更具体而言，是关于用于场效晶体管的结构、以及形成用于场效晶体管的结构的方法。
背景技术
用于场效晶体管的装置结构大体上包括源极、漏极及栅极电极，其是组配成用来切换设置于源极与漏极之间的半导体本体中形成的沟道中的载子流动。平面型场效晶体管的半导体本体及沟道是设置于基材的顶端表面下方，该顶端表面上支撑栅极电极。当向栅极电极施加超过指定阈值电压的控制电压时，沟道中的载子流动产生装置输出电流。
已将纳米片场效晶体管开发为一种类型的非平面型场效晶体管，其可允许另外增大集成电路中的堆积密度。纳米片场效晶体管的本体包括设置于层堆叠中的多个纳米片沟道层。纳米片沟道层最初是设置在具有牺牲层的层堆叠中，所述牺牲层含有可对构成纳米片沟道层的材料(例如：硅)予以选择性蚀刻的材料(例如：硅锗)。将牺牲层蚀刻并移除，以便释放纳米片沟道层，并且为栅极堆叠的形成提供空间。栅极堆叠的区段可将环绕式栅极配置中个别纳米片沟道层的所有侧边围绕。
纳米片场效晶体管在比例缩放方面可能遭遇困难，因为薄化硅纳米片沟道层可达到量子局限效应降低效能的厚度。另外，短沟道效应可能限制继续缩小栅极长度的能力。如此，对具有硅纳米片沟道层的纳米片场效晶体管限制静电控制可能限制比例缩放。
发明内容
在本发明的具体实施例中，提供一种用于场效晶体管的结构。该结构包括设置于层堆叠中的多个沟道层、与该多个沟道层连接的源极/漏极区、以及包括多个区段的栅极结构，所述区段分别围绕该多个沟道层。该多个沟道层是由二维半导电性材料所构成。
在本发明的具体实施例中，提供一种用于形成场效晶体管的方法。该方法包括形成设置于层堆叠中的多个纳米片沟道层、以及形成包括多个区段的栅极结构，所述区段分别围绕该多个纳米片沟道层。在形成该栅极结构之后，移除该多个纳米片沟道层，以在该栅极结构的该多个区段之间形成多个空间。该方法也包括在介于该栅极结构的该多个区段之间的该多个空间中沉积二维半导电性材料，以形成多个取代沟道层。
附图说明
附图乃合并于并且构成本说明书的一部分，绘示本发明的各项具体实施例，并且连同上文的一般性说明、及下文的详细说明，作用在于阐释本发明的具体实施例。
图1根据本发明的具体实施例，是一种装置结构在处理方法的初始制作阶段时的俯视图。
图2是大体上沿着图1所示线条2-2取看的截面图。
图2A是大体上沿着图1所示线条2A-2A取看的截面图。
图3至图11是该装置结构在继图2后的处理方法的接续制作阶段时的截面图。
图6A是图6的一部分的放大图。
图9A是图9的一部分的放大图。
图9B根据本发明的替代具体实施例，是与通过处理方法制作的装置结构的图9A类似的放大图。
图9C根据本发明的替代具体实施例，是与通过处理方法制作的装置结构的图9A类似的放大图。
附图标记说明
10 纳米片沟道层
12 牺牲层
14 基材
16 图型化层堆叠
18 介电层
19 浅沟槽隔离区
20、21 牺牲栅极结构
22 硬掩膜盖
24 侧壁间隔物
26、27 本体特征
30 内间隔物
32 保形层
34 层间介电层
35 接口层
36 栅极结构
37 栅极介电层
38 栅极结构
39 金属栅极电极
40 盖体
42 空间
44 取代沟道层
44a、44b 区段
46 连续层
48 气隙
50 介电层
52 下源极/漏极接触部
54 层间介电层
56 上接触部。
具体实施方式
请参阅图1、2、2A，并且根据本发明的具体实施例，纳米片沟道层10及牺牲层12是设置于位在基材14上的图型化层堆叠16中。基材14可由诸如单晶硅的半导体材料所构成。纳米片沟道层10及牺牲层12可通过磊晶生长程序在基材14上形成，在该磊晶生长程序期间，该组成物是随着形成层件10、12而交替，并且可使用微影及蚀刻程序来图型化以形成层堆叠16。层堆叠16中纳米片沟道层10及牺牲层12的数量可有别于所示代表性具体实施例中的数量，并且特别的是，通过将成对的纳米片沟道层10与牺牲层12加入图型化层堆叠16，可大于代表性具体实施例中的数量。纳米片沟道层10及牺牲层12可用于形成给定传导性类型的纳米片场效晶体管，诸如p型纳米片场效晶体管或n型纳米片场效晶体管。
纳米片沟道层10是由半导体材料所组成，并且牺牲层12是由半导体材料及组成物所组成，该组成物是经选择得以对纳米片沟道层10的半导体材料具有选择性而遭受移除。“选择性”一词参照材料移除程序(例如：蚀刻)于本文中使用时，表示凭借选择适当的蚀刻剂，靶材料的材料移除率(即蚀刻率)大于经受材料移除程序的至少另一材料的移除率。在磊晶生长期间，选择层件10、12的相应组成物。在一具体实施例中，构成纳米片沟道层10的半导体材料可以是硅(Si)，并且构成牺牲层12的半导体材料可以是由于锗含量而以比硅更高的速率进行蚀刻的硅锗(SiGe)。在一具体实施例中，牺牲层12的锗含量范围可为自百分之二十(25％)至百分之三十五(35％)。
纳米片沟道层10比牺牲层12更薄。就此而言，纳米片沟道层10的厚度t1小于牺牲层12的厚度t2。与用于纳米片场效晶体管的传统构造不同，纳米片沟道层10具有牺牲性，因此在完成的装置结构中并不存在。纳米片沟道层10的缩减厚度促进其以比传统纳米片场效晶体管中的纳米片沟道层10更薄的半导电性材料层件进行取代。
介电层18是设置在图型化层堆叠16下方，使得层堆叠16与基材14电隔离。适用于介电层18的介电材料包括但不限于二氧化硅(SiO2)、SiBCN、SiOC、以及SiOCN。介电层18的介电材料可取代磊晶生长后最初设置于层堆叠16与基材14之间的牺牲层(图未示)。浅沟槽隔离区19是绕着图型化层堆叠16设置在基材14中，并且可通过浅沟槽隔离(STI)技巧来形成。替代地，将是为主体基材的基材14取而代之的是，基材14可以是硅绝缘体(SOI)基材，并且图型化层堆叠16可直接设置在基材14的埋置型氧化物层上，不需要浅沟槽隔离区19，也不需要形成介电层18。
形成与图型化层堆叠16重叠并环绕图型化层堆叠16的牺牲栅极结构20、21。牺牲栅极结构20、21沿着层堆叠16的长度具有隔开型配置，并且是横切于层堆叠16对准。牺牲栅极结构20、21可包括相邻于图型化层堆叠16的薄氧化物层、及含有牺牲材料(诸如非晶硅)的更厚层件。使用硬掩膜通过反应性离子蚀刻(RIE)从这些成分层件将牺牲栅极结构20、21图型化。牺牲栅极结构20、21可沿着其长度受切割以界定个别场效晶体管的位置，及/或牺牲栅极结构20、21可与类似于层堆叠16的附加层堆叠重叠。牺牲栅极结构20、21遭由设置于其相应顶端表面上的硬掩膜盖22包覆。硬掩膜盖22可包括一或多种介电材料，诸如二氧化硅与氮化硅的分层组合，并且可以是来自用于形成牺牲栅极结构20、21的微影及蚀刻程序的硬掩膜的残留物。
牺牲栅极结构20、21的侧壁上形成侧壁间隔物24。侧壁间隔物24可通过将诸如SiBCN的介电材料的保形层沉积、并以诸如反应性离子蚀刻(RIE)的定向性蚀刻程序将保形层蚀刻来形成。
请参阅图3，图中相似的附图标记是指图2中相似的特征，而在处理方法的后续制造阶段，将层堆叠16图型化以形成本体特征26、27，各本体特征包括图型化纳米片沟道层10与牺牲层12的层堆叠。层堆叠16可通过自对准蚀刻程序来图型化，其中相应牺牲栅极结构20、21操作为蚀刻屏蔽。自对准蚀刻程序可以是反应性离子蚀刻(RIE)程序，可利用一或多种蚀刻化学品来蚀刻层堆叠16。图型化将层堆叠16从相邻于本体特征26、27及牺牲栅极结构20、21的区域完全移除。本体特征26及牺牲栅极结构20的堆叠配置是通过间隙与本体特征27及牺牲栅极结构21的堆叠配置分开。
在形成本体特征26、27之后，牺牲层12以干式或湿式等向性蚀刻程序相对于纳米片沟道层10侧向凹陷，该等向性蚀刻程序蚀刻对构成纳米片沟道层10的半导体材料具有选择性的构成牺牲层12的半导体材料。牺牲层12的侧向凹陷在本体特征26、27的侧壁中产生凹痕，理由在于纳米片沟道层10并未因等向性蚀刻程序的蚀刻选择性而侧向凹陷。
随后在与牺牲层12的凹陷端相邻的凹痕中形成内间隔物30。内间隔物30可通过沉积由介电材料所组成的保形层32来形成，该介电材料诸如为氮化硅(Si3N4)，该沉积是通过原子层沉积(ALD)来进行，其通过夹止，在本体特征26、27的侧壁中填充凹痕。保形层32涂布介电层18、牺牲栅极结构20、21与其硬掩膜盖22、以及本体特征26、27。然而，与传统程序流程形成对比，并未将保形层32从凹痕蚀刻掉及移除掉。
请参阅图4，其中相似的附图标记是指图3中相似的特征，而在处理方法的后续制作阶段，层间介电层34是通过化学机械研磨(CMP)来沉积及平坦化。层间介电层34可由介电材料所组成，诸如二氧化硅(SiO2)。层间介电层34有区段位于将牺牲栅极结构20及本体特征26与牺牲栅极结构21及本体特征27分开的间隙中。平坦化亦可将硬掩膜盖22从牺牲栅极结构20、21移除，并藉此使牺牲栅极结构20、21显露。
请参阅图5，图中相似的附图标记是指图4中相似的特征，而在处理方法的后续制作阶段，以一或多个蚀刻程序移除牺牲栅极结构20、21的牺牲材料及薄氧化物层。牺牲层12随后是利用蚀刻程序来移除，该蚀刻程序移除对纳米片沟道层10及内间隔物30具有选择性的牺牲层12的材料。蚀刻程序举例而言，可以是湿式SC1蚀刻或干式气相HCl蚀刻。牺牲层12的移除不仅释放纳米片沟道层10，还开放将各本体特征26、27的纳米片沟道层10围绕的空间。纳米片沟道层10是通过内间隔物30予以锚定在对立端。
请参阅图6、图6A，图中相似的附图标记是指图5中相似的特征，而在处理方法的后续制作阶段，于移除牺牲栅极结构20并移除牺牲层12将本体特征26、27的纳米片沟道层10释放之后，形成栅极结构36、38作为取代栅极程序的部分，用以制作多栅极纳米片场效晶体管。各栅极结构36、38可由包括接口层35、栅极介电层37、及金属栅极电极39的栅极堆叠所形成。接口层35涂布纳米片沟道层10的外部表面，并且栅极介电层37是设置在介于金属栅极电极39与接口层35之间的栅极堆叠中。栅极结构36的区段及栅极结构38的区段位于受移除牺牲层12先前占据的空间中。栅极结构36、38的这些区段围绕环绕式栅极(GAA)配置中不同本体特征26、27的纳米片沟道层10的相应外部表面。各栅极结构36、38上方诸侧壁间隔物24之间的空间中形成由诸如氮化硅(Si3N4)的介电材料所组成的自对准接触(SAC)盖体40。
接口层35可由介电材料所组成，诸如硅的氧化物(例如：二氧化硅(SiO2))。栅极介电层37可由介电材料所组成，诸如高k介电材料，如氧化铪(HfO2)。金属栅极电极39包括一或多个保形阻障金属层及/或功函数金属层，诸如由碳化钛铝(TiAlC)及/或氮化钛(TiN)所组成的层件，还包括由诸如钨(W)的导体所组成的金属栅极填充层。金属栅极电极39可包括保形阻障金属层及/或功函数金属层的不同组合。举例而言，金属栅极电极39可包括p型纳米片场效晶体管的保形功函数金属层特性。举另一实施例来说，金属栅极电极39可包括n型纳米片场效晶体管的保形功函数金属层特性。
请参阅图7，图中相似的附图标记是指图6中相似的特征，而在处理方法的后续制作阶段，层间介电层34是利用使保形层32曝露的蚀刻程序来移除。已曝露保形层32是利用蚀刻程序来移除，诸如使用含有磷酸(H3PO4)的加热溶液的湿化学蚀刻程序，其在本体特征26、27的侧壁中留下填充凹痕的内间隔物30。保形层32的移除使纳米片沟道层10的外部表面曝露。
请参阅图8，图中相似的附图标记是指图7中相似的特征，而在处理方法的后续制作阶段，纳米片沟道层10是利用蚀刻程序来移除，其移除对栅极结构36、38的接口层35的材料具有选择性的纳米片沟道层10。举例而言，蚀刻程序可以是远端等离子辅助干蚀刻程序(例如：Frontier蚀刻)，其使纳米片沟道层10曝露至从三氟化氮(NF3)与氢(H2)的气体混合物产生的自由基(即不带电或中性物种)。纳米片沟道层10的移除形成设置于栅极结构36、38的区段之间的空间42。空间42具有与受移除纳米片沟道层10的厚度相等的高度。在一具体实施例中，空间42的高度可为一(1)纳米至三(3)纳米的等级。
请参阅图9、图9A，图中相似的附图标记是指图8中相似的特征，而在处理方法的后续制作阶段，保形沉积二维(2D)半导电性材料，其至少部分地填充空间42以形成受栅极结构36、38的区段围绕的取代沟道层44，并且形成连续层46，连续层46环绕侧壁间隔物24、内间隔物30及盖体40，而且是在介电层18上形成。取代沟道层44含有在栅极结构36、38的接口层35上的空间42中沉积的2D半导电性材料的部分。在一具体实施例中，2D半导电性材料完全填充空间42以形成取代沟道层44，使得取代沟道层44具有与空间42的高度相等的厚度，其等级为一(1)纳米至三(3)纳米。
2D半导电性材料可以是薄保形涂层，其举例而言，是通过原子层沉积(ALD)或化学气相沉积(CVD)来沉积，较佳是以低于500℃(例如，在450℃至500℃的范围内)的温度沉积，以避免栅极结构36、38中出现金属扩散。在一具体实施例中，2D半导电性材料可由过渡金属二硫属化物所组成，其包括过渡金属(例如：钼(Mo)或钨(W))及硫属原子(硫(S)、硒(Se)或碲(Te))。例示性过渡金属二硫属化物包括但不限于二硫化钼(MoS2)、二硫化铪(HfS2)、二硫化锆(ZrS2)、二硫化钨(WS2)、硫化锡(SnS)、以及二硒化钨(WSe2)。在一替代具体实施例中，2D半导电性材料可由石墨烯(C)所组成。在一替代具体实施例中，2D半导电性材料的特征可在于比硅的载子迁移率更大的载子迁移率。各取代沟道层44中含有的2D半导电性材料，尤其是2D半导电性材料，可包括设置在薄片体中的单一单层原子。
可在层件46中掺杂2D半导电性材料以增大其导电性。在一具体实施例中，层件46中的2D半导电性材料可在其沉积之后予以掺杂。在一具体实施例中，层件46中的2D半导电性材料可通过非破坏性程序来掺杂，诸如通过等离子掺杂程序来掺杂。在一具体实施例中，层件46中的2D半导电性材料可掺杂有出自周期表第三族的p型掺质(例如：硼(B)、铝(Al)、镓(Ga)及/或铟(In))，其提供p型导电性。在一具体实施例中，层件46中的2D半导电性材料可掺杂有出自周期表第五族的n型掺质(例如，磷(P)及/或砷(As))，其提供n型导电性。
在另一具体实施例中，并且如图9B所示，可控制2D半导电性材料的沉积厚度，使得空间42仅部分地由2D半导电性材料填充。各空间42内侧的2D半导电性材料形成构成取代沟道层的区段44a、44b。2D半导电性材料的区段44a、44b在接口层35上形成，包覆栅极结构36及38的设置在空间42上面及下面的区段。在一具体实施例中，2D半导电性材料的区段44a、44b各可包括设置在薄片体中的单一单层原子。各取代沟道层的区段44a、44b中的2D半导电性材料是顺着垂直方向通过因为对空间42进行部分填充所得的气隙48来分开。结果是，各空间42的一部分包括其中一个气隙48。
在另一具体实施例中，并且如图9C所示，可控制2D半导电性材料的沉积厚度，使得空间42是由2D半导电性材料部分地填充。各空间42内侧的2D半导电性材料形成取代沟道层的区段44a、44b。2D半导电性材料的区段44a、44b在接口层35上形成，包覆栅极结构36及38的设置在空间42上面及下面的区段。在一具体实施例中，2D半导电性材料的区段44a、44b各可包括设置在薄片体中的单一单层原子。介电层50可在各空间42的一部分中形成，该部分将各取代沟道层的区段44a、44b分开。介电层50可由介电材料所组成，诸如SiO2、SiOC、SiOCN、SiBCN等。
请参阅图10，图中相似的附图标记是指图9中相似的特征，而在处理方法的后续制造阶段，形成下源极/漏极接触部52，其与层件46中的2D半导电性材料耦合，并且透过延展，是通过层件46与取代沟道层44中的2D半导电性材料耦合。下源极/漏极接触部52可含有导体，诸如金属，如钨(W)或氮化钛(TiN)，其是利用回蚀程序来沉积及凹陷。可掺杂位在层件46中的2D半导电性材料，其具有U字形状，该U字形状具有通过介电层18上的下水平区段结合的垂直区段，该2D半导电性材料还环绕各下源极/漏极接触部52中含有的导体。这种关系使接触面积达到最大，其可减小源极/漏极接触电阻。
在形成下源极/漏极接触部52之后，可使用等向性蚀刻程序对层件46进行倒角，以提供2D半导电性材料的互连水平与垂直区段。2D半导电性材料的水平与垂直区段的各分组提供纳米片场效晶体管的源极/漏极区。“源极/漏极区”一词于本文中使用时，意为2D半导电性材料的互连水平与垂直区段，其可作用为纳米片场效晶体管的源极或漏极。
请参阅图11，其中相似的附图标记是指图10中相似的特征，而在处理方法的后续制作阶段，层间介电层54是通过化学机械研磨(CMP)来沉积及平坦化。层间介电层54可由介电材料所组成，诸如二氧化硅(SiO2)。上接触部56可由金属(例如：钨(W))所组成，是于层间介电层54中蚀刻的接触开口内侧形成，并且垂直伸透层间介电层54以接触下源极/漏极接触部52。
完成的纳米片场效晶体管包括取代沟道层44，其含有2D半导电性材料，而不是提供传统纳米片场效晶体管的沟道层的半导体材料(例如：硅)。以2D半导电性材料替代可有效改善静电控制，并且可允许进一步栅极长度比例缩放及接触(多晶)间距(CPP)比例缩放。层件46及下源极/漏极接触部52的配置提供可改善接触电阻的环绕接触部(WAC)。因为源极/漏极区不含有如传统纳米片场效晶体管中的磊晶半导体材料，因此，包括2D半导电性材料的取代沟道层44的纳米片场效晶体管并无接面。通过对层件46中的2D半导电性材料、及用于形成下源极/漏极接触部52的金属进行掺杂调整，可形成n型或p型纳米片场效晶体管。
上述方法是用于制造集成电路芯片。产生的集成电路芯片可由制造商以空白晶圆(例如：具有多个未封装芯片的单一晶圆)、裸晶粒、或已封装等形式进行分配。在已封装的例子中，芯片是嵌装于单一芯片封装(例如：塑胶载体，具有粘贴至主机板或其它更高阶载体的引线)中，或多芯片封装(例如：具有表面互连或埋置型互连任一者或两者的陶瓷载体)中。无论如何，芯片可与其它芯片、离散电路组件、及/或其它信号处理装置整合，作为中间产品或最终产品的部分。
本文中对“垂直”、“水平”等用语的参照属于举例，并非限制，乃用来建立参考架构。诸如“水平”与“侧向”等用语是指平面中与半导体基材的顶端表面平行的方向，与其实际三维空间方位无关。诸如“垂直”与“正交”等用语是指与“水平”方向垂直的方向。诸如“上面”及“下面”等用语指出组件或结构彼此的相对位置，及/或与半导体基材的顶端表面相对的位置，与相对高度截然不同。
“连接”或“耦合”至另一组件、或与该另一组件“连接”或“耦合”的特征可直接连接或耦合至其它组件，或者，取而代之，可出现一或多个中介组件。若无中介组件，则一特征可“直接连接”或“直接耦合”至另一组件。若出现至少一个中介组件，则一特征可“间接连接”或“间接耦合”至另一组件。
本发明的各项具体实施例已为了说明而介绍，但不是意味着穷举或受限于所揭示的具体实施例。许多修改及变例对所属技术领域技术人员将会显而易见，但不会脱离所述具体实施例的范畴及精神。本文中选用的术语是为了最佳阐释具体实施例的原理、实际应用、或对市场现有技术的技术改良，或是为了让所属技术领域技术人员能够理解本文中所揭示的具体实施例。

Claims (20)

1.一种用于场效晶体管的结构，该结构包含：
多个沟道层，设置于层堆叠中；
源极/漏极区，与该多个沟道层连接；以及
栅极结构，包括多个区段，所述区段分别围绕该多个沟道层，
其中，该多个沟道层是由二维半导电性材料所构成。
2.如权利要求1所述的结构，其中，该二维半导电性材料是过渡金属二硫属化物。
3.如权利要求1所述的结构，其中，该二维半导电性材料是二硫化钼、二硫化铪、二硫化锆、二硫化钨、硫化锡、或二硒化钨。
4.如权利要求1所述的结构，其中，该二维半导电性材料是石墨烯(C)。
5.如权利要求1所述的结构，其中，该源极/漏极区是由该二维半导电性材料所构成。
6.如权利要求5所述的结构，其中，该源极/漏极区的该二维半导电性材料含有对增大该源极/漏极区的该二维半导电性材料的导电率有效的掺质。
7.如权利要求5所述的结构，还包含：
接触部，与该源极/漏极区的该二维半导电性材料耦合。
8.如权利要求7所述的结构，其中，该源极/漏极区的该二维半导电性材料含有对增大导电率有效的掺质。
9.如权利要求1所述的结构，其中，各沟道层包括通过气隙分开的第一区段及第二区段。
10.如权利要求1所述的结构，其中，各沟道层包括第一区段及与该第一区段相隔的第二区段，并且该结构还包含：
介电层，设置于各沟道层的该第一区段与该第二区段之间。
11.如权利要求1所述的结构，其中，各沟道层具有一纳米至三纳米的厚度。
12.如权利要求1所述的结构，其中，各沟道层是包括单层原子的片体。
13.一种形成场效晶体管的方法，该方法包含：
形成设置于层堆叠中的多个纳米片沟道层；
形成包括多个区段的栅极结构，所述区段分别围绕该多个纳米片沟道层；
在形成该栅极结构之后，移除该多个纳米片沟道层，以在该栅极结构的该多个区段之间形成多个空间；以及
在介于该栅极结构的该多个区段之间的该多个空间中沉积二维半导电性材料，以形成多个取代沟道层。
14.如权利要求13所述的方法，其中，该二维半导电性材料是过渡金属二硫属化物。
15.如权利要求13所述的方法，其中，该二维半导电性材料是沉积在该层堆叠的侧壁上，以提供与该多个取代沟道层连接的源极/漏极区。
16.如权利要求15所述的方法，还包含：
通过等离子掺杂程序将掺质引入该源极/漏极区的该二维半导电性材料，该掺质对增大该源极/漏极区的该二维半导电性材料的导电性有效。
17.如权利要求16所述的方法，还包含：
形成与该源极/漏极区的该二维半导电性材料耦合的接触部。
18.如权利要求15所述的方法，其中，各空间是通过该二维半导电性材料的第一区段及第二区段部分地填充，并且气隙是设置在介于该二维半导电性材料的该第一区段与该第二区段之间的各空间的一部分中。
19.如权利要求15所述的方法，其中，各空间是通过该二维半导电性材料的第一区段及第二区段部分地填充，并且该方法还包含：
在设置于该二维半导电性材料的该第一区段与该第二区段之间的各空间的一部分中沉积介电层。
20.如权利要求13所述的方法，其中，各沟道层是包括单层原子的片体。
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