CN110491846A - A kind of chip using low-grade fever generator - Google Patents
A kind of chip using low-grade fever generator Download PDFInfo
- Publication number
- CN110491846A CN110491846A CN201910638453.XA CN201910638453A CN110491846A CN 110491846 A CN110491846 A CN 110491846A CN 201910638453 A CN201910638453 A CN 201910638453A CN 110491846 A CN110491846 A CN 110491846A
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- China
- Prior art keywords
- chip
- type semiconductor
- semiconductor film
- conductive metal
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 208000030208 low-grade fever Diseases 0.000 title claims abstract description 13
- 239000004065 semiconductor Substances 0.000 claims abstract description 51
- 239000002184 metal Substances 0.000 claims abstract description 27
- 229910052751 metal Inorganic materials 0.000 claims abstract description 27
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 13
- 230000017525 heat dissipation Effects 0.000 claims abstract description 13
- 239000002105 nanoparticle Substances 0.000 claims abstract description 13
- 239000010408 film Substances 0.000 claims description 56
- 239000010409 thin film Substances 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 2
- 239000011888 foil Substances 0.000 claims description 2
- 238000012544 monitoring process Methods 0.000 abstract description 6
- 238000011084 recovery Methods 0.000 abstract description 4
- 238000001816 cooling Methods 0.000 description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003546 flue gas Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002918 waste heat Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3738—Semiconductor materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/38—Cooling arrangements using the Peltier effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/10—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
- H10N10/17—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the structure or configuration of the cell or thermocouple forming the device
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The present invention relates to a kind of chips using low-grade fever point generator, including operation chip, N-type semiconductor film, P-type semiconductor film, nano-sized carbon heat dissipation film, conductive metal paillon, operation chip at least three, by being electrically connected to each other to a conductive metal paillon between the N-type semiconductor film and a P-type semiconductor film for setting at least one N-type semiconductor film and at least one P-type semiconductor film between adjacent two layers operation chip respectively, and being in the same plane；Nano-sized carbon heat dissipation is respectively coated by the upper surface for being located at the operation chip of the top in each operation chip and the operation chip lower end surface positioned at bottom.One aspect of the present invention can effectively realize whole lowering ability when chip operation, and help to improve temperature reduction performance when chip operation, on the other hand convenient for carrying out accurate convenient monitoring to chip running temperature, while Integrated Energy recovery utilization rate when chip operation is also improved.
Description
Technical field
The present invention relates to a kind of flue gas inspection devices, more particularly to a kind of chip using low-grade fever generator.
Background technique
Now with the diminution of circuit system and chip structure size, the especially development of 3D IC technology, cause current
Chip structure is smaller and smaller, chip power density is increasing, although being effectively simplified circuit structure, also chip is caused to run
When calorific value it is relatively high, to easily cause circuit arrangement to break down because of high temperature, seriously affected electrical equipment fortune
Capable stability and reliability is currently mostly to be increased by reducing chip operational efficiency for chip exterior for this problem
The cooling systems such as cooling fan, water cooling heat exchanger, air cooling heat exchanger, although can meet to a certain extent to chip cooling
The needs of cooling, but chip circuit operational efficiency on the one hand has been seriously affected, on the other hand result in current chip circuit needs
It is equipped with complicated cooling system, leading to circuit arrangement, structure is complicated, for this problem, although also developing in chip knot
Reach the chip structure of cooling purpose by increasing thermo-electric generation mechanism in structure, as application No. is " 2016205099272 "
The patent of " using the 3D chip of low-grade fever electric generator " reaches although can realize that chip itself directly converts heat into electric energy
The purpose of chip running temperature is reduced, but the thermo-electric generation system structure used in the patent is opposite with chip array structure multiple
It is miscellaneous, and heat exchanger effectiveness is relatively poor, while the electric energy that thermo-electric generation obtains when running to chip lacks effective management, therefore
Larger inconvenience is caused to actual use.
Therefore it is directed to this status, there is an urgent need to develop a kind of completely new chip structures, to meet the needs of actual use.
Summary of the invention
In view of the shortcomings of the prior art, the present invention provides a kind of chip using low-grade fever generator, the invention compared with
On the one hand traditional chipset can effectively realize whole lowering ability when chip operation, and help to improve chip fortune
Temperature reduction performance when row, prevented while improving chip overall operation performance high temperature high temperature thermal conductivity cause failure of chip situations such as hair
It is raw, the convenience of chip operation supervision operation is effectively raised, on the other hand convenient for accurate just to the progress of chip running temperature
Victory monitoring, while also improving Integrated Energy recovery utilization rate when chip operation.
To achieve the goals above, the present invention is to realize by the following technical solutions:
A kind of chip using low-grade fever point generator, including operation chip, N-type semiconductor film, P-type semiconductor film,
Nano-sized carbon heat dissipation film, conductive metal paillon and encapsulating shell, wherein operation chip at least three, and each operation chip chamber is coaxially distributed
And it is uniformly distributed from top to bottom, at least one N-type semiconductor film and at least one p-type half are set between adjacent two layers operation chip respectively
Conductor thin film, N-type semiconductor film, P-type semiconductor film respectively with two adjacent operation chip upper surfaces and lower end surface phase
It supports, and is spaced apart from each other distribution between N-type semiconductor film, P type semiconductive thin film, and be in the same plane a N-type is partly led
By being electrically connected to each other to a conductive metal paillon between body thin film and a P-type semiconductor film, and constitute a temperature
Poor generating set passes through the mutual mixed connection of conductive metal paillon between thermo-electric generation group；It nano-sized carbon heat dissipation film totally two, is respectively coated by each
It is located at the upper surface of the operation chip of the top and the operation chip lower end surface positioned at bottom, the encapsulating shell in operation chip
For airtight cavity structure, be respectively coated by each operation chip, N-type semiconductor film, P-type semiconductor film, nano-sized carbon heat dissipation film,
Outside conductive metal paillon.
Further, the encapsulating shell outer surface is evenly distributed with several pins, the operation chip respectively with several pin phases
It is mutually electrically connected, at least one pin is electrically connected to each other by conductive metal paillon and each thermo-electric generation group in the pin.
Further, in the thermo-electric generation group, pass through conductive gold between each thermo-electric generation group being in the same plane
Belong to paillon to be serially connected, and constitute a working group, passes through conductive metal paillon phase between each working group in Different Plane
It is mutually in parallel, and be electrically connected by conductive metal paillon and pin.
Further, contact surface area is between the operation chip and N-type semiconductor film, P-type semiconductor film
50%-the 80% of operation chip and N-type semiconductor film, P-type semiconductor film contact surface area.
On the one hand the present invention can effectively realize whole lowering ability when chip operation compared with traditional chipset is passed, and
Temperature reduction performance when chip operation is helped to improve, prevents high temperature high temperature thermal conductivity from causing while improving chip overall operation performance
Situations such as failure of chip, occurs, and effectively raises the convenience of chip operation supervision operation, on the other hand convenient for transporting to chip
Trip temperature carries out accurate convenient monitoring, while also improving Integrated Energy recovery utilization rate when chip operation.
Detailed description of the invention
The following describes the present invention in detail with reference to the accompanying drawings and specific embodiments.
Fig. 1 is schematic structural view of the invention.
Specific embodiment
To be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, below with reference to
Specific embodiment, the present invention is further explained.
A kind of chip using low-grade fever point generator as described in Figure 1, including operation chip 1, N-type semiconductor film 2, P
Type semiconductive thin film 3, nano-sized carbon heat dissipation film 4, conductive metal paillon 5 and encapsulating shell 6, wherein operation chip 1 at least three, and it is each
It is coaxially distributed between operation chip 1 and uniformly distributed from top to bottom, sets at least one N-type respectively between adjacent two layers operation chip 1 and partly lead
Body thin film 2 and at least one P-type semiconductor film 3, N-type semiconductor film 2, P-type semiconductor film 3 are respectively with adjacent two
A 1 upper surface of operation chip and lower end surface offset, and distribution is spaced apart from each other between N-type semiconductor film 2, P-type semiconductor film 3,
And by a conductive gold between the N-type semiconductor film 2 and a P-type semiconductor film 3 being in the same plane
Belong to paillon 5 to be electrically connected to each other, and constitutes a thermo-electric generation group, it is mutually mixed by conductive metal paillon 1 between thermo-electric generation group
Connection；Nano-sized carbon heat dissipation film 4 totally two, it is respectively coated by the upper surface for being located at the operation chip 1 of the top in each operation chip 1
With 1 lower end surface of operation chip for being located at bottom, encapsulating shell 6 is airtight cavity structure, is respectively coated by each operation chip 1, N-type
Semiconductive thin film 2, P-type semiconductor film 3, nano-sized carbon heat dissipation film 4, outside conductive metal paillon 5.
Wherein, 6 outer surface of encapsulating shell is evenly distributed with several pins 7, the operation chip 1 respectively with several 7 phases of pin
It is mutually electrically connected, at least one pin 7 is mutually electrically connected by conductive metal paillon 5 with each thermo-electric generation group in the pin 7
It connects.
In addition, passing through conductive metal foil between each thermo-electric generation group being in the same plane in the thermo-electric generation group
Piece 5 is serially connected, and constitutes a working group, mutual by conductive metal paillon 5 between each working group in Different Plane
Parallel connection, and be electrically connected by conductive metal paillon 5 and pin 7.
Meanwhile contact surface area is to make between the operation chip and N-type semiconductor film 2, P-type semiconductor film 3
50%-the 80% of industry chip and N-type semiconductor film 2,3 contact surface area of P-type semiconductor film.
It needs to illustrate, the conductive metal paillon 5 is respectively positioned on outside 1 side surface of operation chip, and is embedded in encapsulating shell 6
Inner surface.
The present invention in specific implementation, partly lead by operation chip of the invention to composition first, N-type semiconductor film, p-type
Body thin film, nano-sized carbon heat dissipation film, conductive metal paillon and encapsulating shell are assembled, and the present invention after assembling is then passed through encapsulation
The pin of shell is connect with the circuit system of the external circuit board and circuit board, assembly thereby completing the present invention.
In when by pin with being connect with the circuit system of the external circuit board and circuit board, draw with what operation chip was connect
Foot is directly electrically connected between the operation circuit system of the circuit system of circuit board, thin with N-type semiconductor film, P-type semiconductor
Film constitute thermo-electric generation group connection pin and circuit system power circuit and in temperature monitoring circuit any one or
Two kinds are electrically connected simultaneously.
When the present invention is run, each operation chip can generate a large amount of waste heat at runtime, and the heat a part generated is logical
The nano-sized carbon heat dissipation film crossed positioned at end positions operation chip outer surface carries out radiating and cooling, and another part is in being gathered in and being located at
Between position each operation chip position at, and then temperature is higher closer to center, so as to cause operation core each in the present invention
There are the biggish temperature difference when piece is run, the N-type semiconductor film, p-type under temperature difference condition, positioned at two neighboring operation chip chamber
DC current, and the electricity by the way that electric current to be transported to circuit system in conductive metal paillon by pin are generated between semiconductive thin film
In source circuit and temperature monitoring circuit, on the one hand achieve the purpose that cool down to chip by converting heat into electric energy, separately
On the one hand the accurate temperature of current chip operation can be directly obtained by the size produced electricl energy, convenient for being protected to chip,
It prevents from leading to failure of chip because temperature is excessively high, furthermore the electric energy that chip generates can separately be recycled, and conduct
Other electric equipment operation electric energy are utilized, to reach the mesh for improving comprehensive resource utilization rate and reducing equipment operation energy consumption
's.
On the one hand the present invention can effectively realize whole lowering ability when chip operation compared with traditional chipset is passed, and
Temperature reduction performance when chip operation is helped to improve, prevents high temperature high temperature thermal conductivity from causing while improving chip overall operation performance
Situations such as failure of chip, occurs, and effectively raises the convenience of chip operation supervision operation, on the other hand convenient for transporting to chip
Trip temperature carries out accurate convenient monitoring, while also improving Integrated Energy recovery utilization rate when chip operation.
It should be understood by those skilled in the art that the present invention is not limited to the above embodiments.Above-described embodiment and explanation
It is merely illustrated the principles of the invention described in book.Without departing from the spirit and scope of the present invention, the present invention also has
Various changes and modifications.These changes and improvements all fall within the protetion scope of the claimed invention.The claimed scope of the invention
It is defined by the appending claims and its equivalent thereof.
Claims (4)
1. a kind of chip using low-grade fever point generator, it is characterised in that: the chip using low-grade fever generator includes making
Industry chip, N-type semiconductor film, P-type semiconductor film, nano-sized carbon heat dissipation film, conductive metal paillon and encapsulating shell, wherein described
Operation chip at least three, and each operation chip chamber is coaxially distributed and is evenly distributed with from top to bottom, divides between adjacent two layers operation chip
At least one N-type semiconductor film and at least one P-type semiconductor film, the N-type semiconductor film, P-type semiconductor are not set
Film offsets with two adjacent operation chip upper surfaces and lower end surface respectively, and N-type semiconductor film, P-type semiconductor film
Between be spaced apart from each other distribution, and pass through between be in the same plane N-type semiconductor film and a P-type semiconductor film
It is electrically connected to each other to a conductive metal paillon, and constitutes a thermo-electric generation group, pass through conduction between the thermo-electric generation group
The mutual mixed connection of metal foil；The nano-sized carbon heat dissipation film totally two, it is respectively coated by the work for being located at the top in each operation chip
The upper surface of industry chip and operation chip lower end surface positioned at bottom, the encapsulating shell are airtight cavity structure, are respectively coated by
Outside each operation chip, N-type semiconductor film, P-type semiconductor film, nano-sized carbon heat dissipation film, conductive metal paillon.
2. a kind of chip using low-grade fever generator according to claim 1, it is characterised in that: the encapsulating shell appearance
Face is evenly distributed with several pins, and the operation chip is electrically connected to each other with several pins respectively, at least one pin in the pin
It is electrically connected to each other by conductive metal paillon and each thermo-electric generation group.
3. a kind of chip using low-grade fever generator according to claim 1 or 2, it is characterised in that: the temperature difference hair
It in electric group, is serially connected between each thermo-electric generation group being in the same plane by conductive metal paillon, and constitutes a job
Group, it is parallel with one another by conductive metal paillon between each working group in Different Plane, and by conductive metal paillon and draw
Foot electrical connection.
4. the chip that a kind of invention according to claim 1 uses low-grade fever generator, it is characterised in that: the operation core
Contact surface area is operation chip and N-type semiconductor film, p-type half between piece and N-type semiconductor film, P-type semiconductor film
50%-the 80% of conductor thin film contact surface area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910638453.XA CN110491846B (en) | 2019-07-16 | 2019-07-16 | Chip adopting micro-thermal generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910638453.XA CN110491846B (en) | 2019-07-16 | 2019-07-16 | Chip adopting micro-thermal generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110491846A true CN110491846A (en) | 2019-11-22 |
| CN110491846B CN110491846B (en) | 2021-01-15 |
Family
ID=68547253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910638453.XA Active CN110491846B (en) | 2019-07-16 | 2019-07-16 | Chip adopting micro-thermal generator |
Country Status (1)
| Country | Link |
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| CN (1) | CN110491846B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204131895U (en) * | 2013-12-11 | 2015-01-28 | 中扬动力股份有限公司 | Heat transfer catalysis heat dissipation structure |
| CN105870083A (en) * | 2016-05-31 | 2016-08-17 | 福州大学 | Three-dimensional chip adopting micro-thermal electric generator and implementation method of chip |
| CN106489201A (en) * | 2014-05-27 | 2017-03-08 | 美光科技公司 | There is interconnection structure and related system and the method for redundancy electric connector |
-
2019
- 2019-07-16 CN CN201910638453.XA patent/CN110491846B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204131895U (en) * | 2013-12-11 | 2015-01-28 | 中扬动力股份有限公司 | Heat transfer catalysis heat dissipation structure |
| CN106489201A (en) * | 2014-05-27 | 2017-03-08 | 美光科技公司 | There is interconnection structure and related system and the method for redundancy electric connector |
| CN105870083A (en) * | 2016-05-31 | 2016-08-17 | 福州大学 | Three-dimensional chip adopting micro-thermal electric generator and implementation method of chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110491846B (en) | 2021-01-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20201224 Address after: No. 201, building 5, Tian'an headquarters center, 555 Panyu Avenue North, Donghuan street, Panyu District, Guangzhou, Guangdong 510000 Applicant after: Guangdong Evan Low Carbon Technology Co.,Ltd. Applicant after: Guangzhou Evan new energy Co.,Ltd. Address before: No. 201, building 5, Tian'an headquarters center, 555 Panyu Avenue North, Donghuan street, Panyu District, Guangzhou, Guangdong 510000 Applicant before: Guangdong Evan Low Carbon Technology Co.,Ltd. |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: A Chip Using Micro thermal Generator Effective date of registration: 20221220 Granted publication date: 20210115 Pledgee: Agricultural Bank of China Limited Guangzhou Sanyuanli Sub-branch Pledgor: Guangdong Evan Low Carbon Technology Co.,Ltd. Registration number: Y2022980028105 |
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| PC01 | Cancellation of the registration of the contract for pledge of patent right | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Granted publication date: 20210115 Pledgee: Agricultural Bank of China Limited Guangzhou Sanyuanli Sub-branch Pledgor: Guangdong Evan Low Carbon Technology Co.,Ltd. Registration number: Y2022980028105 |
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| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: A chip using a micro thermal generator Granted publication date: 20210115 Pledgee: Agricultural Bank of China Limited Guangzhou Sanyuanli Sub-branch Pledgor: Guangdong Evan Low Carbon Technology Co.,Ltd. Registration number: Y2024980003780 |