CN110473860A - 具有集成分流电阻器的半导体器件及其制造方法 - Google Patents

具有集成分流电阻器的半导体器件及其制造方法 Download PDF

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CN110473860A
CN110473860A CN201910380123.5A CN201910380123A CN110473860A CN 110473860 A CN110473860 A CN 110473860A CN 201910380123 A CN201910380123 A CN 201910380123A CN 110473860 A CN110473860 A CN 110473860A
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semiconductor devices
semiconductor
folder
power
chip
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R·桑德
T·贝梅尔
S·蒂勒
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本公开涉及一种半导体器件，包括：第一芯片焊盘；功率半导体芯片，布置在第一芯片焊盘上并且至少具有第一功率电极和第二功率电极；以及与第一功率电极连接的夹。在此，夹的整体部分形成分流电阻器，并且分流电阻器的第一接触指与夹一体地形成。

Description

具有集成分流电阻器的半导体器件及其制造方法
技术领域
本公开涉及一种具有集成分流电阻器的半导体器件，以及用于制造具有集成分流电阻器的半导体器件的方法。
背景技术
半导体器件可以包括被构造为切换大电流的功率半导体芯片。对于许多应用，可能需要确定流过这种功率半导体芯片的电流的强度。这种电流确定通常可以在外部进行，例如，半导体器件可以安装在电路板上并且与电路板电连接，并且在电路板上可以存在用于测量通过功率半导体芯片的电流的测量装置。然而，为了优化半导体器件的集成密度，在内部(即在半导体器件本身内)确定电流可能是有利的，例如借助于集成的分流电阻器。
发明内容
因此，本发明的目的是提供一种具有改进的集成分流电阻器的半导体器件。此外，本发明提供一种用于制造具有改进的集成分流电阻器的半导体器件的方法。
本发明的一个方面涉及一种半导体器件，包括：第一芯片焊盘；功率半导体芯片，布置在第一芯片焊盘上并且至少具有第一功率电极和第二功率电极；以及与第一功率电极连接的夹，其中夹的整体部分形成分流电阻器，并且其中分流电阻器的第一接触指与夹一体地形成。
本公开的另一方面涉及一种用于制造半导体器件的方法，该方法包括：将功率半导体芯片安装在芯片焊盘上，其中该功率半导体芯片至少具有第一功率电极和第二功率电极；并且将夹安装到第一功率电极处，其中夹的整体部分形成分流电阻器，并且其中分流电阻器的第一接触指与夹一体地形成。
附图说明
下面参考附图更详细地解释根据本发明的半导体器件和制造半导体器件的方法。附图中所示的元件不一定按比例绘制。相同的附图标记可以表示相同的组件。
图1示出了根据本发明的具有集成分流电阻器的半导体器件的概略俯视图。
图2示出了电路图，该电路图例如可以通过图1的半导体器件实现。
图3A至图3C示出了根据本发明的其他半导体器件的概略俯视图，其中集成分流电阻器的一个或多个接触指具有不同的布置。
图4A至图4C示出了根据本发明的其他半导体器件的概略俯视图，其还包括与集成分流电阻器的接触指电连接的集成半导体电压测量单元。
图5示出了根据本发明的另一半导体器件的概略俯视图，其中集成分流电阻器与半导体器件的外部端子一体地形成。
图6示出了根据本发明的其他半导体器件的概略俯视图，其中构成集成分流电阻器的夹用于提供半桥电路。
图7示出了用于制造具有集成分流电阻器的半导体器件的方法的示例性流程图。
具体实施方式
在以下详细描述中，参考附图和其中所示的示例。可以使用术语“安装”、“附接”和“连接”以及其衍生术语。这些术语可用于表示两个元件彼此相互作用或彼此互动，无论它们是彼此直接物理接触还是电接触，或者彼此不直接接触；中间元件或层可以布置在“安装”、“附接”或“连接”元件之间，或者元件可以彼此直接接触。
图1示出了半导体器件100的示例，具有夹10、功率半导体芯片20和芯片焊盘30。该功率半导体芯片20至少具有第一功率电极和第二功率电极，其中夹10与第一功率电极电连接。该半导体器件100还可以包括封装40和暴露在封装40上的外部端子50。夹10可以被封装40完全封装。
半导体器件100可以被设计用于客户侧安装在电路板上，例如作为表面安装器件或通孔器件。半导体器件100可以是半导体封装。封装40可以是注塑成型体或层压体。如图1和图3A至图6所示，外部端子50不能突出超过封装的平面(“无引线封装”)，或者外部端子50可以突出超过平面(“引线封装”)。
根据示例，第一功率电极布置在功率半导体芯片20的上主表面上，第二功率电极布置在功率半导体芯片20的相对的下主表面上，即功率半导体芯片20设计用于垂直电流。第二功率电极可以与芯片焊盘30电连接。根据示例，第一功率电极可以是源电极，第二功率电极可以是漏电极。根据其他示例，源电极和漏电极可以互换。
功率半导体芯片20可以包括控制电极21，例如栅电极21，被配置为控制功率电极之间的电流。控制电极21可以布置在功率半导体芯片20的上主表面上。控制电极可以通过电连接器60与半导体器件100的外部端子50连接。电连接器60可以包括接合线或夹，或者电连接器由接合线或夹构成。
夹10可以被配置为将半导体芯片20的第一功率电极与半导体器件100的其他元件电连接，例如与外部端子50或其他芯片焊盘(图1中未示出)电连接。夹10可以具有任何导电材料，例如金属或金属合金或由金属或金属合金组成。夹10例如可以具有Al、Cu或Fe或由其组成。夹10可以是一体的，即由一个连贯的部件构成。
夹10具有整体部分11，该整体部分形成分流电阻器或测量电阻器。分流电阻器被设计为使得流过夹10的电流可以通过与电流成比例的分流电阻器两端的电压降来测量。
整体部分11可以布置在夹10的第一接触表面12和第二接触表面13之间，第一接触表面12和第二接触表面13可以位于夹10的相对端。在第一接触表面12上，夹10与功率半导体芯片20的第一功率电极连接，例如焊接在这上面。在第二接触表面13上，夹10可以与外部端子50或半导体器件100的其他芯片焊盘连接。替代地，夹10自身可以构成半导体器件100的外部端子50，在这种情况下，没有第二接触表面13。
夹10具有分流电阻器的至少一个第一接触指14，其中第一接触指14与夹10一体地(整体地)形成。第一接触指14例如可以是从夹10的其余部分横向突出。第一接触指14的远端可以与半导体器件100的外部端子50连接，或者第一接触指14的远端形成半导体器件100的外部端子50。
根据示例，夹10还可以具有分流电阻器的第二接触指15，其中第二接触指15与夹10一体地形成。第二接触指15的远端可以与半导体器件100的外部端子50连接，或者第二接触指15的远端形成半导体器件100的外部端子50。
根据示例，对流过夹10的电流的测量可以按照以下方式进行：与电流关联的分流电阻器的电压降在接触指14和15处被截取并测量。根据其他示例，例如当夹仅具有第一接触指14但不具有第二接触指15时，电流的测量也可以这样实现：分流电阻器的电压降在接触指14处和在外部端子50处被截取并且测量，夹10的第二接触表面13与该外部端子50连接。
夹10可以被配置为使得整体部分11具有带电阻值的分流电阻器，使得流过夹10的电流可以以特定应用的预期精度被测量。例如，夹10的长度和/或厚度和/或宽度可以选择为使得由整体部分11形成的分流电阻器具有预期精度所需的电阻值。根据示例，分流电阻器的电压降可以是大约1mV。
图2示出了电路图200，其表示半导体器件100的可能的电路。电路图200包括晶体管210和与晶体管的输出电极(例如的源电极)连接的分流电阻器220。分流电阻器220具有测量触点221、222，从而能够确定分流电阻器220两端的电压降并因此确定流过晶体管210的电流。在半导体器件100中，晶体管210可以通过功率半导体芯片20实现，分流电阻器220可以通过夹10的整体部分11实现，并且测量触点221、222可以通过接触指14、15实现。替代地，在仅存在第一测量触点221(即第一接触指14)而不存在第二测量触点222(即第二接触指15)的情况下，例如外部端子50对应晶体管210的功率触点230(例如源电极触点)同时用作分流电阻器220的第二测量触点。
图3A至图6示出了半导体器件的其他示例，除了示出或描述的不同之外，其可以与半导体器件100相同。特别地，根据本发明的所有半导体器件的共同之处在于，夹10的整体部分形成分流电阻器，该分流电阻器具有至少一个接触指，该至少一个接触指与夹10一体地形成。相同的附图标记可以表示相同的部件。
图3A至图3C示出了将分流电阻器的接触指与半导体器件的外部端子连接的各种可能性。
图3A示出了半导体器件300，其中分流电阻器仅具有单个接触指14。接触指14的远端与半导体器件300的第一外部端子50.1连接。夹10的远端与第二外部端子50.2连接，其中第二端子50.2共同地形成功率半导体芯片20的功率端子和用于测量分流电阻器的电压降的测量端子。
图3B示出了半导体器件310，其中分流电阻器具有两个接触指14、15。接触指14、15与外部端子50连接，外部端子50位于半导体器件的相对侧。
图3C同样示出了半导体器件320，其中分流电阻器具有两个接触指14、15。夹10的一端与半导体器件320的外部端子50连接。接触指14、15与外部端子50.3、50.4连接，外部端子50.3、50.4布置在半导体器件320的一侧，并且位于具有外部端子50.2的侧面的对面。
图1和图3A至图3C示出了半导体器件，其中接触指14或接触指14、15与半导体器件的外部端子连接。这意味着在图1和图3A至图3C的示例性半导体器件中，分流电阻器的电压降以及因此流过夹10的电流从外部测量。根据本公开的其他方面，该测量也可以在内部进行。为此目的，半导体电压测量单元可以布置在半导体器件中，并且接触指14、15可以与半导体电压测量单元连接。
图4A至图4C示出了具有集成半导体电压测量单元70的半导体器件的示例。根据示例，半导体电压测量单元70可以与半导体器件的外部端子(图4中未示出)连接，例如传输测量的电压降。半导体电压测量单元70可以通过封装40被完全封装。
根据示例，半导体电压测量单元70可以包括逻辑半导体器件。半导体电压测量单元70可以包括双极型晶体管。半导体电压测量单元70可以通过CMOS技术实现。
图4A示出了半导体器件400，其中集成在半导体器件400中的半导体电压测量单元70与功率半导体芯片20单片地形成(这由图4A中的虚线示出)。
根据示例，功率半导体芯片20可以是p通道MOSFET。根据其他示例，功率半导体芯片20可以是n通道MOSFET。
图4B示出了半导体部件410，其中半导体电压测量单元70具有其自己的半导体芯片，该半导体芯片横向地布置在半导体功率芯片20旁边的芯片焊盘30上。半导体电压测量单元70例如可以通过焊连接或借助于粘合剂(例如通过非导电粘合剂)固定到芯片焊盘30上。
图4C示出了半导体器件420，其中半导体电压测量单元70布置在半导体功率芯片20的上主表面上(“芯片上芯片”)。半导体电压测量单元70例如可以通过焊接连接或借助于粘合剂(例如借助于非导电粘合剂)固定到功率半导体芯片20的上主表面上。
在图1、图3A至图3C和图4A至图4C中，示出了半导体器件，其中夹10和电连接器60未与相应的外部端子50一体地形成。然而，夹10、接触指14或接触指14、15和/或电连接器60也可以与相应的外端子50一体地形成。换句话说，夹10、相应的接触指14(或14、15)和/或电连接器60自身可以形成相应的外部端子50。
图5示出了半导体器件500，其中夹10和接触指14与相应的外部端子50一体地形成。此外，电连接器60被构造为另一个夹，其本身也形成外部端子50。
根据示例，用于制造半导体器件的方法可以包括：通过拾取和放置工艺，将夹10和/或构造为另一个夹的电连接器60安装到功率半导体芯片20上。
根据其他示例，用于制造半导体器件的方法可以包括：芯片焊盘20是第一引线框架(下引线框架)的一部分，并且夹10和/或构造为另一个夹的电连接器60是第二引线框架(上引线框架)的一部分。上引线框架可以布置在功率半导体芯片20的上主表面上，并且夹10和/或电连接器60可以从上引线框架中分隔。
使用第一引线框架(下引线框架)和另一个上引线框架(包括具有一体的接触指14或一体的接触指14、15的夹10，以及例如电连接器60)的这种结构可以在本文所述的所有半导体器件中使用，即，特别地也在以下半导体器件中，其中外部端子50部分地或完全地由下引线框实现(见图1和图3A至图4C)。
在图1和图3A至图5的半导体器件中，夹10被构造为用于将功率半导体芯片20的第一功率电极与外部端子50电连接。然而，夹10也可以在半导体器件中提供内部电连接。
图6示出了具有第一功率半导体芯片20和第二功率半导体芯片610的半导体器件600，其中第一功率半导体芯片20布置在第一芯片焊盘30上，第二功率半导体芯片610布置在第二芯片焊盘620上并且与第二芯片焊盘620电连接。在半桥电路中，夹10将第一功率半导体芯片20的第一功率电极(内部地)与第二芯片焊盘620连接。
根据示例，功率半导体芯片20、610中的一个可以是n通道MOSFET，并且功率半导体芯片20、610中的另一个可以是p通道MOSFET。第一芯片焊盘30和第二芯片焊盘620可以被称为“分离”引线框架。
根据示例，接触指14、15与内部半导体电压测量单元(图6中未示出)连接。根据其他示例，接触指14、15与半导体器件600的外部端子(图6中未示出)连接。
半导体器件600还可以通过使用第一引线框架(下引线框架)和另一上引线框架构造，该另一上引线框架包括具有一体的接触指14(或一体的接触指14、15)的夹10，以及例如一个或多个电连接器(图6中未示出)，以用于接触第一功率半导体芯片20的控制电极和必要时接触第二功率半导体芯片610的控制电极。
在整个半导体器件中，形成分流电阻器的夹10的整体部分11可以具有特殊形状。例如，整体部分11可以实施成横向尺寸和/或厚度小于夹10的第一和/或第二接触表面12、13的厚度，以减小夹10在整体部分11中的横截面积，从而增加了接触指14,15之间的电压降。
图7示出了用于制造半导体器件的方法700。方法700包括：在701中，将功率半导体芯片安装到芯片焊盘上，其中功率半导体芯片至少具有第一功率电极和第二功率电极。方法700包括：在702中，将夹安装到第一功率电极处，其中夹的整体部分形成分流电阻器，并且其中分流电阻器的第一接触指与夹一体地形成。
根据示例，芯片焊盘可以是下引线框架的一部分，并且夹可以是上引线框架的一部分。此外，方法700可以包括将第二夹安装到功率半导体芯片的控制电极处，其中第二夹是上引线框架的一部分。
示例
在下文中，将通过示例更详细地解释半导体器件和用于制造半导体器件的方法。
示例1是一种半导体器件，包括：第一芯片焊盘；功率半导体芯片，布置在第一芯片焊盘上并且至少具有第一功率电极和第二功率电极；以及与第一功率电极连接的夹，其中夹的整体部分形成分流电阻器，并且其中分流电阻器的第一接触指与夹一体地形成。
示例2是根据示例1的半导体器件，其中分流电阻器的第二接触指与夹一体地形成。
示例3是根据示例1或2的半导体器件，其中第一接触指的远端与半导体器件的第一外部端子连接，或者第一接触指的远端形成半导体器件的第一外部端子。
示例4是根据示例2的半导体器件，其中第二接触指的远端与半导体器件的第二外部端子连接，或者第二接触指的远端形成半导体器件的第二外部端子。
示例5是根据示例1的半导体器件，其中第一接触指的远端与布置在半导体器件中的半导体电压测量单元的第一测量电极连接。
示例6是根据示例2的半导体器件，其中第二接触指的远端与布置在半导体器件中的半导体电压测量单元的第二测量电极连接。
示例7是根据示例5或6的半导体器件，其中半导体电压测量单元与功率半导体芯片单片地形成。
示例8是根据示例5或6的半导体器件，其中半导体电压测量单元包括布置在功率半导体芯片的主表面上的半导体芯片。
示例9是根据示例5或6的半导体器件，其中半导体电压测量单元包括横向地布置在功率半导体芯片旁边的半导体芯片。
示例10是根据示例1的半导体器件，其中夹的远端与半导体器件的外部端子连接，或者夹的远端形成半导体器件的外部端子。
示例11是根据示例10的半导体器件，其中外部端子共同地形成功率半导体芯片的功率端子和用于测量分流电阻器的电压降的测量端子。
示例12是根据示例1的半导体器件，还包括：第二功率半导体芯片，布置在与第一芯片焊盘分离的第二芯片焊盘上。
示例13是根据示例12的半导体器件，其中夹将第一功率半导体芯片的第一功率电极与第二芯片焊盘电连接。
示例14是用于制造半导体器件的方法，该方法包括：将功率半导体芯片安装到芯片焊盘上，其中功率半导体芯片至少具有第一功率电极和第二功率电极；以及将夹安装到第一功率电极处，其中夹的整体部分形成分流电阻器，并且其中分流电阻器的第一接触指与夹一体地形成。
示例15是根据示例14的方法，其中分流电阻器的第二接触指与夹一体地形成。
示例16是根据示例14或15的方法，还包括：在半导体器件中提供半导体电压测量单元；并且将第一接触指安装到半导体电压测量单元的测量端子处。
示例17是根据示例15和16的方法，还包括：将第二接触指安装到半导体电压测量单元的另外的测量端子处。
示例18是根据示例14或15的方法，还包括：将第一接触指安装到半导体器件的外部端子处。
示例19是根据示例14至18中任一项的方法，其中芯片焊盘是下引线框架的一部分，并且夹是上引线框架的一部分。
示例20是根据示例19的方法，还包括：将第二夹安装到功率半导体芯片的控制电极处，其中第二夹是上引线框架的一部分。
附图标记列表
10 夹
11 夹的整体部分
12 第一接触面
13 第二接触面
14 第一接触指
15 第二接触指
20 功率半导体芯片
21 控制电极
30 芯片焊盘
40 封装
50 外部端子
50.1 外部端子
50.2 外部端子
50.3 外部端子
50.4 外部端子
60 电连接器
70 半导体电压测量单元
100 半导体器件
200 电路图
210 晶体管
220 分流电阻器
221 测量触点
222 测量触点
230 功率触点
300 半导体器件
310 半导体器件
320 半导体器件
400 半导体器件
410 半导体器件
420 半导体器件
500 半导体器件
600 半导体器件
610 第二功率半导体芯片
620 第二芯片焊盘
700 用于制造半导体器件的方法
701 安装功率半导体芯片
702 安装夹

Claims (20)

1.一种半导体器件，包括：
第一芯片焊盘；
功率半导体芯片，布置在所述第一芯片焊盘上，并且至少具有第一功率电极和第二功率电极；和
夹，与所述第一功率电极连接；
其中所述夹的整体部分形成分流电阻器；并且
其中所述分流电阻器的第一接触指与所述夹一体地形成。
2.根据权利要求1所述的半导体器件，其中所述分流电阻器的第二接触指与所述夹一体地形成。
3.根据权利要求1或2所述的半导体器件，其中所述第一接触指的远端与所述半导体器件的第一外部端子连接，或者所述第一接触指的远端形成所述半导体器件的第一外部端子。
4.根据权利要求2所述的半导体器件，其中所述第二接触指的远端与所述半导体器件的第二外部端子连接，或者所述第二接触指的远端形成所述半导体器件的第二外部端子。
5.根据权利要求1所述的半导体器件，其中所述第一接触指的远端与半导体电压测量单元的第一测量电极连接，所述半导体电压测量单元布置在所述半导体器件中。
6.根据权利要求2所述的半导体器件，其中所述第二接触指的远端与半导体电压测量单元的第二测量电极连接，所述半导体电压测量单元布置在所述半导体器件中。
7.根据权利要求5或6所述的半导体器件，其中所述半导体电压测量单元与所述功率半导体芯片单片地形成。
8.根据权利要求5或6所述的半导体器件，其中所述半导体电压测量单元包括布置在所述功率半导体芯片的主表面上的半导体芯片。
9.根据权利要求5或6所述的半导体器件，其中所述半导体电压测量单元包括横向地布置在所述功率半导体芯片旁边的半导体芯片。
10.根据权利要求1所述的半导体器件，其中所述夹的远端与所述半导体器件的外部端子连接，或者所述夹的远端形成所述半导体器件的外部端子。
11.根据权利要求10所述的半导体器件，其中所述外部端子共同地形成所述功率半导体芯片的功率端子和用于测量所述分流电阻器的电压降的测量端子。
12.根据权利要求1所述的半导体器件，还包括：
第二功率半导体芯片，布置在与所述第一芯片焊盘分离的第二芯片焊盘上。
13.根据权利要求12所述的半导体器件，其中所述夹将所述第一功率半导体芯片的所述第一功率电极与所述第二芯片焊盘电连接。
14.一种用于制造半导体器件的方法，所述方法包括：
将功率半导体芯片安装在芯片焊盘上，其中所述功率半导体芯片至少具有第一功率电极和第二功率电极；和
将夹安装到所述第一功率电极处，其中所述夹的整体部分形成分流电阻器，并且其中所述分流电阻器的第一接触指与所述夹一体地形成。
15.根据权利要求14所述的方法，其中所述分流电阻器的第二接触指与所述夹一体地形成。
16.根据权利要求14或15所述的方法，还包括：
在所述半导体器件中提供半导体电压测量单元；和
将所述第一接触指安装到所述半导体电压测量单元的测量端子处。
17.根据权利要求15和16所述的方法，还包括：
将所述第二接触指安装到所述半导体电压测量单元的另外的测量端子处。
18.根据权利要求14或15所述的方法，还包括：
将所述第一接触指安装到所述半导体器件的外部端子处。
19.根据权利要求14至18中任一项所述的方法，其中所述芯片焊盘是下引线框架的一部分，并且所述夹是上引线框架的一部分。
20.根据权利要求19所述的方法，还包括：
将第二夹安装到所述功率半导体芯片的控制电极处，其中所述第二夹是所述上引线框架的一部分。
CN201910380123.5A 2018-05-09 2019-05-08 具有集成分流电阻器的半导体器件及其制造方法 Pending CN110473860A (zh)

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