CN110379347B - Screen body dummy device detection method and device - Google Patents
Screen body dummy device detection method and device Download PDFInfo
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The invention discloses a method and a device for detecting a screen body dummy device. The method comprises the following steps: applying one or more groups of preprocessing signals to the dummy device to enable the electrical characteristics of the dummy device to be in a stable state; and applying the detection signal to the dummy device to obtain one or more electrical characteristic parameters of the dummy device. By adopting the technical scheme of the embodiment of the invention, the electrical characteristics of the dummy device can be stabilized, the precision and the accuracy of the detection data are improved, and repeated tests are avoided.
Description
Technical Field
The invention relates to the technical field of display, in particular to a method and a device for detecting a screen body dummy device.
Background
As shown in fig. 1, the panel body has a display area DA provided with active devices (e.g., TFT transistors) for driving the operation of pixels and a non-display area NDA provided with dummy devices on the periphery side of the display area. The effective device and the dummy device are synchronously formed during the preparation of the array substrate, the effective device and the dummy device have the same process parameters, and the electrical characteristics of the dummy device can reflect the electrical characteristics of the effective device.
In the prior art, the electrical characteristic parameters of the dummy device are mainly detected by applying a detection signal once. However, since the devices are connected through the holes in the process, the electrical characteristics of the dummy device are unstable due to poor contact effect between different materials, micro-residue and film stress of the device, and the like, so that the difference between the first detection data and the next detection data is large, the repeatability is poor, whether the process of the dummy device is normal or not cannot be determined, and judgment interference is caused to engineers.
Disclosure of Invention
The embodiment of the invention provides a method and a device for detecting a screen body nominal device, which can stabilize the electrical characteristics of the nominal device, improve the precision and accuracy of detection data and avoid repeated tests.
In a first aspect, an embodiment of the present invention provides a method for detecting a screen body dummy device, where the screen body has a display area and a non-display area located on a peripheral side of the display area, and the dummy device is located in the non-display area, where the method for detecting the screen body dummy device includes:
applying one or more groups of preprocessing signals to the dummy device to enable the electrical characteristics of the dummy device to be in a stable state;
and applying the detection signal to the dummy device to obtain one or more electrical characteristic parameters of the dummy device.
In a possible implementation manner of the first aspect, the difference between two adjacent preprocessed signals in each set of preprocessed signals is equal.
In one possible implementation of the first aspect, a maximum amplitude of the preconditioning signal applied to the dummy device is greater than a maximum amplitude of the detection signal applied to the dummy device.
In one possible embodiment of the first aspect, active devices are provided in the display area, which are fabricated in synchronization with the dummy devices; after the step of obtaining one or more electrical characteristic parameters of the dummy device, the method further comprises: if all the electrical characteristic parameters of the dummy device are within the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are normal; and if any one of all the electrical characteristic parameters of the dummy device exceeds the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are abnormal.
In one possible implementation of the first aspect, the dummy device is a transistor; the step of applying one or more sets of preprocessing signals to the dummy device includes: one or more sets of preprocessing signals are applied to the gate of the transistor.
In a possible implementation of the first aspect, the electrical characteristic parameter of the transistor comprises at least one of the following parameters: on current, off current, threshold voltage and mobility.
In one possible implementation of the first aspect, after the step of obtaining one or more electrical characteristic parameters of the dummy device, the method further comprises: if any one electrical characteristic parameter of the transistor exceeds the corresponding parameter allowable range, applying one or more groups of preprocessing signals to a plurality of interlayer contact resistances of the transistor respectively to enable the electrical characteristics of the interlayer contact resistances to be in a stable state; respectively applying detection signals to the indirect contact resistors of each layer to obtain the resistance values of the contact resistors among the layers; and comparing the resistance values of the interlayer contact resistors with the corresponding allowable resistance value ranges respectively, and positioning the area where the interlayer contact resistors with the resistance values exceeding the corresponding allowable resistance value ranges as a fault area.
In a second aspect, an embodiment of the present invention provides a device for detecting a dummy device in a panel, where the panel has a display area and a non-display area located on a peripheral side of the display area, and the dummy device is located in the non-display area, the device including: the device comprises a preprocessing module, a data processing module and a data processing module, wherein the preprocessing module is used for applying one or more groups of preprocessing signals to a dummy device to enable the electrical characteristics of the dummy device to be in a stable state; and the detection module is used for applying a detection signal to the virtual device to obtain one or more electrical characteristic parameters of the virtual device.
In one possible embodiment of the second aspect, active devices are provided in the display area, which are fabricated in synchronization with the dummy devices; the device also comprises an analysis module, a parameter setting module and a parameter setting module, wherein the analysis module is used for determining that the dummy device and the corresponding effective device are normal if all the electrical characteristic parameters of the dummy device are within the corresponding parameter allowable range; and if any one of all the electrical characteristic parameters of the dummy device exceeds the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are abnormal.
In one possible embodiment of the second aspect, the dummy device is a transistor; the device also comprises a fault positioning module; the preprocessing module is further used for applying one or more groups of preprocessing signals to a plurality of interlayer contact resistances of the transistor respectively to enable the electrical characteristics of the interlayer contact resistances to be in a stable state if any one electrical characteristic parameter of the transistor exceeds a corresponding parameter allowable range; the detection module is also used for applying detection signals to the contact resistors among the layers respectively to obtain the resistance values of the contact resistors among the layers; and the fault positioning module is used for comparing the resistance values of the interlayer contact resistors with the corresponding resistance value allowable ranges respectively, and positioning the area where the interlayer contact resistors with the resistance values exceeding the corresponding resistance value allowable ranges as a fault area.
In the embodiment of the invention, one or more groups of preprocessing signals are applied to the dummy device, so that the electrical characteristics of the dummy device can reach a stable state before detection, the precision and the accuracy of detection data are improved, repeated tests are avoided, whether the process of the dummy device is normal can be determined only through one-time detection, and the purpose of improving the productivity is achieved.
In addition, one or more groups of preprocessing signals are applied to the dummy device, so that micro-residue and film stress can be eliminated, faults such as poor contact or open circuit can be exposed in advance, and judgment interference to engineers is avoided.
In addition, since the active devices located in the display area DA need to drive the pixels to operate according to the preconditioning signals, the electrical characteristics of the dummy devices can be made closer to those of the active devices by applying one or more sets of preconditioning signals to the dummy devices, thereby reflecting the electrical characteristics of the active devices more accurately.
Drawings
The present invention may be better understood from the following description of specific embodiments thereof taken in conjunction with the accompanying drawings, in which like or similar reference characters identify like or similar features.
FIG. 1 is a layout diagram of a panel according to an embodiment of the present invention;
fig. 2 is a schematic flow chart illustrating a method for detecting a screen dummy device according to an embodiment of the present invention;
fig. 3 is a schematic layer structure diagram of a thin film transistor according to an embodiment of the present invention;
fig. 4 is a schematic flowchart of a method for detecting a screen dummy device according to another embodiment of the present invention;
fig. 5 is a schematic structural diagram of a screen dummy device detection apparatus according to an embodiment of the present invention.
Fig. 6 is a schematic structural diagram of a screen dummy device detection apparatus according to another embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a screen dummy device detection apparatus according to another embodiment of the present invention.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention.
The embodiment of the invention provides a method and a device for detecting a screen body dummy device.
Fig. 2 is a schematic flow chart of a method for detecting a screen dummy device according to an embodiment of the present invention.
As shown in fig. 2, the screen body dummy device detection method includes step 101 and step 102.
In step 101, one or more sets of preconditioning signals are applied to the dummy device to stabilize the electrical characteristics of the dummy device. Wherein the dummy device may be a transistor.
Fig. 3 is a schematic layer structure diagram of a thin film transistor according to an embodiment of the present invention. As shown in fig. 3, G, S, D are the gate, source and drain of the tft, respectively, siO is the gate insulating layer, and P-Si is the active layer. Also shown in fig. 3 are electrode leads that are connected to the source and drain electrodes, respectively, through vias.
Contact resistance exists between adjacent layers or vias and layers of the thin film transistor.
Due to the difference of materials and processes, micro-residue, film stress and the like may exist between adjacent layers or between via holes and layers, so that the electrical characteristics of the device are unstable. In this case, the dummy device may be pre-processed (or may be referred to as aging process) from the viewpoint of stabilizing the electrical characteristics of the dummy device, and the electrical characteristics of the dummy device may be stabilized by eliminating the micro-residue and the film stress, and then the dummy device may be tested.
In step 102, a detection signal is applied to the dummy device to obtain one or more electrical characteristic parameters of the dummy device.
As described above, before the dummy device is detected, one or more sets of preprocessing signals may be applied to the dummy device in advance, and after micro-residue and film stress are eliminated, the detection signals may be applied to the dummy device after the electrical characteristics of the dummy device have stabilized, so as to obtain one or more electrical characteristic parameters of the dummy device.
In the embodiment of the invention, one or more groups of preprocessing signals are applied to the dummy device, so that the electrical characteristics of the dummy device can reach a stable state before detection, the precision and the accuracy of detection data are improved, repeated tests are avoided, whether the process of the dummy device is normal can be determined only through one-time detection, and the aim of improving the productivity is achieved.
In addition, one or more groups of preprocessing signals are applied to the dummy device, so that micro-residue and film stress can be eliminated, faults such as poor contact or open circuit can be exposed in advance, and judgment interference on engineers is avoided.
In addition, since the active devices located in the display area DA need to drive the pixels according to the preconditioning signals, the electrical characteristics of the dummy devices can be brought closer to those of the active devices by applying one or more sets of preconditioning signals to the dummy devices, thereby more accurately reflecting the electrical characteristics of the active devices.
In some embodiments, the difference values of two adjacent preprocessing signals in each set of preprocessing signals are equal, that is, the preprocessing signals are in an arithmetic progression, so that the electrical characteristics of the dummy device gradually tend to a stable state, and controllability is achieved. In a specific implementation, the preconditioning signal may be applied to the dummy device from small to large, or may be applied to the dummy device from large to small, which is not limited herein.
In some embodiments, the maximum amplitude of the preconditioning signal applied to the dummy device may be greater than the maximum amplitude of the detection signal applied to the dummy device, i.e., the amplitude range of the preconditioning signal is greater. For example, the maximum amplitude of the detection signal is 10V, and the maximum amplitude of the corresponding preprocessing signal may be 11V, so that the electrical characteristics of the dummy device can reach a more stable state with respect to the detection signal, thereby further improving the precision and accuracy of the detection data.
Specifically, one or more sets of voltage signals may be applied to the gate of the transistor when the transistor is pre-processed. For example, the voltage signal ranges (-15V, 15V) with a step size of 1V. Correspondingly, the drain of the transistor may be-10V, and the source grounded. The range, step length and scanning time sequence of the voltage preprocessing signal can be set according to actual conditions on the premise of not damaging the transistor.
In some embodiments, the electrical characteristic parameter of the transistor comprises at least one of: on-state current I on Off current I off Threshold voltage V th And a mobility μ. Wherein the on-state current I on Refers to the drain current, off current I, when the transistor is on off Refers to the drain current, threshold voltage V, when the transistor is off th Refers to the gate voltage at the moment when a conductive channel is induced on the surface of the channel layer between the source and the drain, and the mobility μ refers to the average drift velocity of carriers in the active layer under a unit electric field. It is to be understood that the electrical characteristic parameters of the transistor are not limited to the above-mentioned parameters.
In some embodiments, the drain voltage V of the transistor may be controlled ds Without change, by adjusting the gate voltage V of the transistor gs Electrical measurement to obtain I ds -V gs A relation curve; the gate voltage V of the transistor can also be controlled gs Without change, by adjusting the drain voltage V of the transistor ds Electrical measurement to obtain I ds -V ds Relation curve of, wherein I ds And analyzing the relationship curve to obtain the electrical characteristic parameters of the transistor, wherein the analysis process of the relationship curve is not explained herein.
Because the transistor effective device and the transistor dummy device are synchronously formed during the preparation of the array substrate and have the same process parameters, if all the electrical characteristic parameters of the transistor dummy device are within the corresponding parameter allowable range, the transistor dummy device and the corresponding transistor effective device can be determined to be normal. On the contrary, if any one of all the electrical characteristic parameters of the transistor dummy device exceeds the corresponding parameter allowable range, it can be determined that both the transistor dummy device and the corresponding transistor active device are abnormal.
For the abnormal situation of the transistor dummy device, a person skilled in the art can perform an interlayer contact resistance test on the transistor dummy device, so as to locate the contact position or area where the abnormality occurs.
Fig. 4 is a schematic flow chart of a method for detecting a screen dummy device according to another embodiment of the present invention. Fig. 4 differs from fig. 2 in that after step 102 in fig. 2, the screen body dummy device detection method further includes steps 103 to 105 in fig. 4.
In step 103, if any one of the electrical characteristic parameters of the transistor is out of the allowable range of the corresponding parameter, one or more sets of preprocessing signals are applied to the plurality of interlayer contact resistances of the transistor, so that the electrical characteristics of the interlayer contact resistances are in a stable state.
In step 104, a detection signal is applied to each inter-layer contact resistor to obtain the resistance of each inter-layer contact resistor.
Taking a two-wire resistor (i.e., a resistor having two terminals) as an example, one or more sets of voltage signals may be applied to the interlayer contact resistor during pre-processing of the interlayer contact resistor.
Taking a four-wire resistor (i.e., a resistor with four terminals) as an example, one or more sets of current signals may be applied to the interlayer contact resistor during pre-processing of the interlayer contact resistor. In specific implementation, a suitable current range and step size can be found through experiments, and are not limited herein.
Compared with a two-wire connection mode, the four-wire connection mode has the advantages that the current loop and the voltage measurement loop are independently separated, and the accuracy is higher.
In step 105, the resistance values of the interlayer contact resistors are compared with the corresponding allowable ranges of resistance values, and the area where the interlayer contact resistor with the resistance value exceeding the corresponding allowable range of resistance value is located as a fault area.
In this embodiment, in the case of an abnormality of a transistor dummy device, verification tests may be performed on a plurality of interlayer contact resistances of the transistor dummy device, respectively, so as to locate a contact position or an area where the abnormality occurs. Before testing, one or more groups of preprocessing signals are respectively applied to the interlayer contact resistors of the transistor, so that the electrical characteristics of the interlayer contact resistors are in a stable state, and the abnormal contact position or area of the transistor dummy device can be more accurately positioned.
Fig. 5 is a schematic structural diagram of a screen body dummy device detection apparatus according to an embodiment of the present invention.
As shown in fig. 5, the screen dummy device detection apparatus 500 includes a preprocessing module 501 and a detection module 502.
The preprocessing module 501 is configured to apply one or more groups of preprocessing signals to the dummy device, so that the electrical characteristics of the dummy device are in a stable state.
The detection module 502 is configured to apply a detection signal to the dummy device to obtain one or more electrical characteristic parameters of the dummy device.
In this embodiment, the preprocessing module 501 applies one or more groups of preprocessing signals to the dummy device, so that the electrical characteristics of the dummy device can reach a stable state before detection, thereby improving the accuracy and precision of the detection data of the detection module 502, avoiding repeated tests, and determining whether the process of the dummy device is normal only by one-time detection, thereby achieving the purpose of improving productivity.
Fig. 6 is a schematic structural diagram of a screen body dummy device detection apparatus according to another embodiment of the present invention, and fig. 6 is different from fig. 5 in that the screen body dummy device detection apparatus in fig. 6 further includes an analysis module 503 for determining that the dummy device and the corresponding valid device are normal if all electrical characteristic parameters of the dummy device are within the corresponding parameter allowable range; and if any one of the detected values of all the electrical characteristic parameters of the dummy device exceeds the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are abnormal.
Fig. 7 is a schematic structural diagram of a screen dummy device detection apparatus according to another embodiment of the present invention, where fig. 7 is different from fig. 5 in that the screen dummy device detection apparatus in fig. 7 further includes a fault location module 504; wherein the content of the first and second substances,
the preprocessing module 501 is further configured to apply one or more sets of preprocessing signals to the plurality of interlayer contact resistors of the transistor respectively to enable the electrical characteristics of the interlayer contact resistors to be in a stable state if any one of the electrical characteristic parameters of the transistor is out of the corresponding parameter allowable range.
The detecting module 502 is further configured to apply a detecting signal to each inter-layer contact resistor, so as to obtain the resistance of each inter-layer contact resistor.
The fault location module 504 is configured to compare the resistance values of the interlayer contact resistors with the corresponding allowable resistance value ranges, and locate an area where the interlayer contact resistor having the resistance value exceeding the allowable resistance value range is located as a fault area.
It should be noted that the screen body dummy device detection apparatus in the embodiment of the present invention may be a processor having a logic operation function, and by operating the processor, the screen body dummy device may automatically perform the preprocessing step and the detection step, and output a result.
It should be clear that the embodiments in this specification are described in a progressive manner, and the same or similar parts between the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. For the device embodiments, reference may be made to the description of the method embodiments in the relevant part. Embodiments of the invention are not limited to the specific steps and structures described above and shown in the drawings. Those skilled in the art may make various changes, modifications and additions to, or change the order between the steps, after appreciating the spirit of the embodiments of the invention. Also, a detailed description of known process techniques is omitted herein for the sake of brevity.
The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, plug-in, function card, or the like. When implemented in software, the elements of an embodiment of the invention are the programs or code segments used to perform the required tasks. The program or code segments can be stored in a machine-readable medium or transmitted by a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" may include any medium that can store or transfer information. Examples of a machine-readable medium include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio Frequency (RF) links, and so forth. The code segments may be downloaded via computer networks such as the internet, intranet, etc.
Embodiments of the present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the embodiments of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the embodiments of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (9)
1. A method for detecting a dummy device on a panel, the panel having a display area and a non-display area located on a peripheral side of the display area, the dummy device being located in the non-display area, the method comprising:
applying one or more sets of preconditioning signals to the dummy device to stabilize the electrical characteristics of the dummy device, the maximum amplitude of the preconditioning signals applied to the dummy device being greater than the maximum amplitude of the detection signals applied to the dummy device;
and applying a detection signal to the dummy device to obtain one or more electrical characteristic parameters of the dummy device.
2. The method of claim 1,
and the difference values of two adjacent preprocessed signals in each group of preprocessed signals are equal.
3. The method of claim 1, wherein active devices are provided in the display area in synchronization with the dummy devices; after the step of obtaining one or more electrical characteristic parameters of the dummy device, the method further comprises:
if all the electrical characteristic parameters of the dummy device are within the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are normal;
and if any one of all the electrical characteristic parameters of the dummy device exceeds the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are abnormal.
4. The method of claim 1,
the dummy device is a transistor;
the step of applying one or more sets of preconditioning signals to the dummy device comprises:
one or more sets of preprocessing signals are applied to the gate of the transistor.
5. The method according to claim 4, wherein the electrical characteristic parameter of the transistor comprises at least one of the following parameters: on current, off current, threshold voltage and mobility.
6. The method of claim 4, wherein after the step of deriving one or more electrical characteristic parameters of the dummy device, the method further comprises:
if any one electrical characteristic parameter of the transistor exceeds the corresponding parameter allowable range, applying one or more groups of preprocessing signals to a plurality of interlayer contact resistances of the transistor respectively to enable the electrical characteristics of each interlayer contact resistance to be in a stable state;
applying a detection signal to each interlayer contact resistor to obtain the resistance value of each interlayer contact resistor;
and comparing the resistance value of each interlayer contact resistor with the corresponding allowable range of the resistance value respectively, and positioning the area where the interlayer contact resistor with the resistance value exceeding the allowable range of the corresponding resistance value is positioned as a fault area.
7. A screen body dummy device detection apparatus, the screen body having a display area and a non-display area located on a peripheral side of the display area, the dummy device being located in the non-display area, the apparatus comprising:
a preprocessing module for applying one or more sets of preprocessing signals to the dummy device to stabilize the electrical characteristics of the dummy device, wherein the maximum amplitude of the preprocessing signals applied to the dummy device is greater than the maximum amplitude of the detection signals applied to the dummy device;
and the detection module is used for applying a detection signal to the dummy device to obtain one or more electrical characteristic parameters of the dummy device.
8. The apparatus of claim 7, wherein active devices are provided in the display area in synchronization with the dummy devices;
the device further comprises an analysis module, a parameter setting module and a parameter setting module, wherein the analysis module is used for determining that the dummy device and the corresponding effective device are normal if all the electrical characteristic parameters of the dummy device are within the corresponding parameter allowable range; and if any one of all the electrical characteristic parameters of the dummy device exceeds the corresponding parameter allowable range, determining that the dummy device and the corresponding effective device are abnormal.
9. The apparatus of claim 7, wherein the dummy device is a transistor; the device also comprises a fault positioning module; wherein the content of the first and second substances,
the preprocessing module is further configured to apply one or more sets of preprocessing signals to a plurality of interlayer contact resistances of the transistor respectively if any one of the electrical characteristic parameters of the transistor exceeds a corresponding parameter allowable range, so that the electrical characteristics of each interlayer contact resistance are in a stable state;
the detection module is further used for applying detection signals to the interlayer contact resistors respectively to obtain resistance values of the interlayer contact resistors;
and the fault positioning module is used for comparing the resistance value of each interlayer contact resistor with the corresponding resistance value allowable range respectively, and positioning the area where the interlayer contact resistor with the resistance value exceeding the corresponding resistance value allowable range is positioned as a fault area.
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