CN110364440A - Manufacturing method, substrate and the display device of thin film transistor (TFT) - Google Patents
Manufacturing method, substrate and the display device of thin film transistor (TFT) Download PDFInfo
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- CN110364440A CN110364440A CN201910508215.7A CN201910508215A CN110364440A CN 110364440 A CN110364440 A CN 110364440A CN 201910508215 A CN201910508215 A CN 201910508215A CN 110364440 A CN110364440 A CN 110364440A
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- thin film
- film transistor
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- 239000010409 thin film Substances 0.000 title claims abstract description 111
- 239000000758 substrate Substances 0.000 title claims abstract description 83
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- 229910052751 metal Inorganic materials 0.000 claims abstract description 81
- 239000002184 metal Substances 0.000 claims abstract description 81
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 76
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 30
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 30
- 239000001301 oxygen Substances 0.000 claims abstract description 30
- 238000001312 dry etching Methods 0.000 claims abstract description 26
- 238000001039 wet etching Methods 0.000 claims abstract description 21
- 239000011248 coating agent Substances 0.000 claims abstract description 8
- 238000000576 coating method Methods 0.000 claims abstract description 8
- 238000002161 passivation Methods 0.000 claims description 90
- 239000000463 material Substances 0.000 claims description 51
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 claims description 35
- 238000005530 etching Methods 0.000 claims description 34
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 23
- 239000007788 liquid Substances 0.000 claims description 21
- 239000007769 metal material Substances 0.000 claims description 20
- 239000010408 film Substances 0.000 claims description 17
- 230000015572 biosynthetic process Effects 0.000 claims description 15
- 239000007789 gas Substances 0.000 claims description 15
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 12
- 229910017604 nitric acid Inorganic materials 0.000 claims description 12
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 11
- 229910018503 SF6 Inorganic materials 0.000 claims description 9
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 9
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 9
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims description 7
- 239000000460 chlorine Substances 0.000 claims description 7
- 229910052801 chlorine Inorganic materials 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 5
- 239000012528 membrane Substances 0.000 claims description 5
- 239000004973 liquid crystal related substance Substances 0.000 claims description 4
- 239000011259 mixed solution Substances 0.000 claims description 4
- 230000005611 electricity Effects 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims 1
- 229910044991 metal oxide Inorganic materials 0.000 abstract description 16
- 150000004706 metal oxides Chemical class 0.000 abstract description 16
- -1 wherein Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 12
- 239000011521 glass Substances 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 239000000243 solution Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 239000004411 aluminium Substances 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000004020 conductor Substances 0.000 description 4
- 229920000620 organic polymer Polymers 0.000 description 4
- 239000010453 quartz Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000001354 calcination Methods 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000000839 emulsion Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
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- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Abstract
This application provides a kind of manufacturing method of thin film transistor (TFT), substrate and display devices, including thin film transistor (TFT) is formed on the substrate, wherein, thin film transistor (TFT) includes the grid layer stacked gradually, gate insulating layer, active layer, ohmic contact layer and Source and drain metal level；Deviate from the surface coating photoresist of ohmic contact layer in Source and drain metal level, and photoresist is exposed and is developed by the first light shield, to form photoresist layer, wherein photoresist layer has first area and second area；After successively carrying out first time wet etching and first time dry etching to Source and drain metal level, ohmic contact layer and the active layer of second area exposure, it is pre-processed by photoresist layer of the oxygen to first area, wherein, the concentration of oxygen is 4000sccm~5000sccm.Oxygen can be reduced to be reacted with the surface of the Source and drain metal level at first area, to reduce the quantity of metal oxide, avoid metal oxide excessive and caused by short circuit problem, to improve display performance.
Description
Technical field
This application involves display device technology field, in particular to a kind of manufacturing method of thin film transistor (TFT), substrate and aobvious
Showing device.
Background technique
Here statement only provides background information related with the application, without inevitably constituting example technique.
Thin film transistor (TFT) (TFT) is a kind of technology of microelectric technique Yu the ingenious combination of LCD Technology, wherein
Switch of the TFT as pixel, controls the rotation of liquid crystal and different colors is presented.
Currently, the production of TFT is the deposition of each layer film, i.e., manufactured using the technique of four mask plates (MASK), and adopt
Each layer film is performed etching with etch process.Wherein, when being exposed to photoresist (PR), the corresponding PR in TFT channel area
Residual thickness is not easy to control, when the remaining thinner thickness of PR, in the etching process of PR residual region, is easy to produce gold
Belong to or metal oxide remains, causes partial short-circuit, reduce display performance.
Summary of the invention
The main purpose of the application is to provide manufacturing method, substrate and the display device of a kind of thin film transistor (TFT), solves
To metal or metal oxide residual in the etching process of photoresist residual region, is easy to produce, partial short-circuit is caused, is dropped
The problem of low display performance.
To achieve the above object, a kind of manufacturing method for thin film transistor (TFT) that the application proposes, the thin film transistor (TFT)
Manufacturing method includes:
Thin film transistor (TFT) is formed on the substrate, wherein the thin film transistor (TFT) includes that the grid layer stacked gradually, grid are exhausted
Edge layer, active layer, ohmic contact layer and Source and drain metal level；
Deviate from the surface coating photoresist of the ohmic contact layer in the Source and drain metal level, and by the first light shield to institute
It states photoresist to be exposed and develop, to form the photoresist layer, wherein the photoresist layer has first area and second
Region, the first area cover the thin film transistor (TFT), the second area exposure thin film transistor (TFT)；And
First time wet process is successively carried out to Source and drain metal level, ohmic contact layer and the active layer of second area exposure
After etching and first time dry etching, pre-processed by photoresist layer of the oxygen to the first area, wherein the oxygen
The concentration of gas is 4000sccm~5000sccm.
Optionally, the first time wet etching use the first etching liquid, wherein first etching liquid include acetic acid,
The mixed liquor of nitric acid and phosphoric acid.
Optionally, the first time dry etching uses the mixed gas of sulfur hexafluoride and oxygen.
Optionally, described the step of thin film transistor (TFT) is formed on the substrate, includes:
It is sequentially depositing the first metal material, gate insulating layer material, active layer material, Ohmic contact layer material on substrate
And second metal material；And
By the second light shield to first metal material, gate insulating layer material, active layer material, ohmic contact layer material
Material and the second metal material are exposed and develop, to form thin film transistor (TFT), wherein the thin film transistor (TFT) includes grid
Layer, gate insulating layer, active layer, ohmic contact layer and Source and drain metal level.
Optionally, it is described to the second area exposure Source and drain metal level, ohmic contact layer and active layer successively into
After row first time wet etching and first time dry etching, by oxygen to the first area carry out pretreated step it
Afterwards, further includes:
Second of wet etching is carried out by Source and drain metal level of second etching liquid to first area exposure, to be formed
Source electrode and drain electrode, wherein second etching liquid includes the mixed solution of acetic acid, nitric acid and phosphoric acid；And
Second of dry etching is carried out to the ohmic contact layer of first area exposure, to form channel region, wherein institute
State the mixed gas that second of dry etching uses sulfur hexafluoride and chlorine.
Optionally, the ohmic contact layer to first area exposure carries out second of dry etching, to form ditch
After the step of road area, further includes:
Remove the first area, and the exposure source electrode and the drain electrode；
Deposit passivation layer material is distinguished away from the surface of the ohmic contact layer in the source electrode and the drain electrode；With
And
The passivation material is exposed and is developed by third light shield, to form the first passivation layer and the second passivation
Layer, wherein first passivation layer formation is in the top of the source electrode, and second passivation layer formation is in the drain electrode
Top.
Optionally, described that the passivation material is exposed and is developed by third light shield, to form the first passivation
After the step of layer and the second passivation layer, further includes:
Deviate from the surface deposited metal film of the Source and drain metal level in second passivation layer, wherein described second is blunt
Change the contact hole on layer with the exposure drain electrode；And
The metallic film is exposed and is developed by the 4th light shield, to form pixel electrode layer, wherein the picture
Plain electrode layer is connect by the contact hole with the drain electrode.
To achieve the above object, the application also proposes a kind of substrate, and the substrate includes substrate and brilliant by above-mentioned film
Thin film transistor (TFT) made from the manufacturing method of body pipe:
The thin film transistor (TFT) is formed on the substrate, and the thin film transistor (TFT) includes the grid layer stacked gradually, grid
Pole insulating layer, active layer, ohmic contact layer, Source and drain metal level, passivation layer and pixel electrode layer.
Optionally, the Source and drain metal level includes source electrode and drain electrode, and the passivation layer includes the first passivation layer and the
Two passivation layers, first passivation layer formation is in the top of the source electrode, and second passivation layer formation is in the drain electrode
Top；
There is the contact hole of the exposure drain electrode, the pixel electrode layer passes through the contact on second passivation layer
Hole is connect with the drain electrode.
To achieve the goals above, the application also proposes that a kind of display device, the display device include substrate, color film base
Plate and the layer of liquid crystal molecule between the substrate and the color membrane substrates；
The substrate includes substrate and the thin film transistor (TFT) as made from the manufacturing method of above-mentioned thin film transistor (TFT):
The thin film transistor (TFT) is formed on the substrate, and the thin film transistor (TFT) includes the grid layer stacked gradually, grid
Pole insulating layer, active layer, ohmic contact layer, Source and drain metal level, passivation layer and pixel electrode layer.
In embodiments herein, the manufacturing method of thin film transistor (TFT) by the way that thin film transistor (TFT) is formed on the substrate,
In, the thin film transistor (TFT) includes the grid layer stacked gradually, gate insulating layer, active layer, ohmic contact layer and source and drain gold
Belong to layer；Deviate from the surface coating photoresist of the ohmic contact layer in the Source and drain metal level, and by the first light shield to described
Photoresist is exposed and develops, to form the photoresist layer, wherein the photoresist layer has first area and the secondth area
Domain, the first area cover the thin film transistor (TFT), the second area exposure thin film transistor (TFT)；To secondth area
Source and drain metal level, ohmic contact layer and the active layer of domain exposure successively carry out first time wet etching and first time dry etching
Afterwards, pre-processed by photoresist layer of the oxygen to the first area, wherein the concentration of the oxygen be 4000sccm~
5000sccm.The surface that technical solution provided by the present application can reduce the Source and drain metal level at oxygen and first area carries out anti-
Answer, to reduce the quantity of metal oxide, avoid metal oxide excessive and caused by short circuit problem, to improve display
Energy.
Detailed description of the invention
In ord to more clearly illustrate embodiments of the present application or it is exemplary in technical solution, below will be to embodiment or example
Property description needed in attached drawing be briefly described, it should be apparent that, the accompanying drawings in the following description is only the application
Some embodiments for those of ordinary skill in the art without creative efforts, can also basis
Acquisition others attached drawing shown in these attached drawings.
Fig. 1 is the step flow diagram of the manufacturing method of one embodiment thin film transistor (TFT) of the application；
Fig. 2 is the refinement flow diagram of S1 step in Fig. 1；
Fig. 3 is the step flow diagram of the manufacturing method of another embodiment thin film transistor (TFT) of the application；
Fig. 4 is the step flow diagram of the manufacturing method of the another embodiment thin film transistor (TFT) of the application；
Fig. 5 is the step flow diagram of the manufacturing method of the application another embodiment thin film transistor (TFT)；
Fig. 6 is the structural schematic diagram of the embodiment of the present application substrate；
Fig. 7 is the structural schematic diagram of the embodiment of the present application display device.
The embodiments will be further described with reference to the accompanying drawings for realization, functional characteristics and the advantage of the application purpose.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiment is only a part of the embodiment of the application, instead of all the embodiments.Base
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
His embodiment, shall fall in the protection scope of this application.
It is to be appreciated that the directional instruction (such as up, down, left, right, before and after ...) of institute is only used in the embodiment of the present application
In explaining in relative positional relationship, the motion conditions etc. under a certain particular pose (as shown in the picture) between each component, if should
When particular pose changes, then directionality instruction also correspondingly changes correspondingly.
In addition, the description for being related to " first ", " second " etc. in this application is used for description purposes only, and should not be understood as referring to
Show or imply its relative importance or implicitly indicates the quantity of indicated technical characteristic." first ", " are defined as a result,
Two " feature can explicitly or implicitly include at least one of the features.In addition, the technical solution between each embodiment can
It to be combined with each other, but must be based on can be realized by those of ordinary skill in the art, when the combination of technical solution occurs
Conflicting or cannot achieve when, will be understood that the combination of this technical solution is not present, also not this application claims protection model
Within enclosing.
As shown in Fig. 1~5, this application provides a kind of manufacturing methods of thin film transistor (TFT).
In one embodiment, as shown in Figure 1, the manufacturing method of thin film transistor (TFT) includes the following steps:
S1, thin film transistor (TFT) is formed on the substrate, wherein the thin film transistor (TFT) includes the grid layer stacked gradually, grid
Pole insulating layer, active layer, ohmic contact layer and Source and drain metal level；
In this step, a substrate is provided, which includes but is not limited to use glass substrate etc., and substrate is light transmission base
Plate, the material of transparent substrates can be selected from glass, quartz, organic polymer, other suitable materials or combinations thereof.It should be noted that
If substrate selects conductive material, an insulating layer need to be formed on the substrate before the component that substrate carries thin film transistor (TFT)
(not shown go out), in order to avoid the problem of short circuit occurs between substrate and the component of thin film transistor (TFT).
Further, for mechanical property, substrate can be rigid substrates or flexible base plate.The material of rigid substrates can
Selected from glass, quartz, conductive material, metal, wafer, other suitable materials or combinations thereof.The material of flexible base plate can be selected from
Ultra-thin glass, organic polymer (such as plastics), other suitable materials or combinations thereof.
Thin film transistor (TFT) (TFT) is formed on the substrate, wherein thin film transistor (TFT) includes the grid layer stacked gradually, grid
Insulating layer, active layer, ohmic contact layer and Source and drain metal level.
S2, the surface coating photoresist for deviating from the ohmic contact layer in the Source and drain metal level, and pass through the first light shield
The photoresist is exposed and is developed, to form the photoresist layer, wherein the photoresist has first area and the
Two regions, the first area cover the thin film transistor (TFT), the second area exposure thin film transistor (TFT)；
In this step, the surface coating photoresist of ohmic contact layer is deviated from Source and drain metal level, and passes through the first light shield
Photoresist is exposed and is developed, to form photoresist layer, wherein photoresist layer has first area and second area, the
One region overlay thin film transistor (TFT), second area exposed film transistor.Wherein, the first area of photoresist layer is for protecting it
The structure of the thin film transistor (TFT) of covering is not etched.
Further, photoresist layer is formed in the surface that Source and drain metal level deviates from ohmic contact layer.Wherein, photoresist layer is adopted
With photoresist prepared by (Photo Resin, PR), i.e., photoresist is coated on to the surface of Source and drain metal level, to form photoresist layer,
Above-mentioned photoresist includes phenolic resin, emulsion, solvent and portions additive etc..
Before being coated with photoresist, the surface of Source and drain metal level is cleaned and dried, to guarantee Source and drain metal level
Surface cleanliness, thus guarantee photoresist be coated with when, do not have foreign matter and be attached on substrate, so that the subsequent etching moment
It loses liquid and penetrates into etching, metal wiring is caused to break.
Further, it is exposed and develops by photoresist of first light shield to coating, specifically: it is saturating by ultraviolet light
It crosses the first light shield and is radiated on photoresist layer and carry out exposure-processed, and developed after exposure-processed using alkaline-based developer,
And form photoresist layer.And the structure based on the first light shield, photoresist layer have photographic department and not photosensitive during exposure
Portion, when alkaline-based developer is sprayed on photoresist layer, the photographic department of photoresist layer is soluble in alkaline-based developer, to form second
The photoresist layer of the pattern in region, i.e. second area is removed and exposes the thin film transistor (TFT) in the region, photoresist layer it is photosensitive
Portion is insoluble in alkaline-based developer, so that the pattern for forming first area covers the thin film transistor (TFT) in the region.
Further, the shape of the first area of photoresist layer is U-shaped.Certainly, in other embodiments, it is based on the first light
The shape of the structure of cover, the first area of photoresist layer can also be other shapes, and there is no restriction herein.
After photoresist layer forms patterning, cleaning and rear baking processing are carried out, so that the patterning of photoresist layer has
There is higher adherence, to reinforce the corrosion resistance of the thin film transistor (TFT) of photoresist layer overlay area.
S3, Source and drain metal level, ohmic contact layer and the active layer of second area exposure are successively carried out for the first time
After wet etching and first time dry etching, pre-processed by photoresist layer of the oxygen to the first area, wherein institute
The concentration for stating oxygen is 4000sccm~5000sccm.
In this step, the is successively carried out to Source and drain metal level, ohmic contact layer and the active layer of second area exposure
After wet etching and first time dry etching, pre-processed by photoresist layer of the oxygen to first area, wherein oxygen
The concentration of gas is 4000sccm~5000sccm.
Wherein, first time wet etching is carried out to the Source and drain metal level of second area exposure, so that removal second area is sudden and violent
The Source and drain metal level of dew, and due to being covered with photoresist layer above the Source and drain metal level of first area, i.e., in first time wet process
When etching, which can be protected Source and drain metal level, avoid being etched away.
Further, first time wet etching carries out wet etching, the first etching to second area using the first etching liquid
Liquid includes acetic acid (CH3COOH), nitric acid (HNO3) and phosphoric acid (H3PO4) mixed liquor, phosphoric acid in the first etching liquid, acetic acid and
The ratio of nitric acid is 70:10:5.5.Wherein, acetic acid plays the role of buffer, for adjusting the concentration of the first etching liquid.
Specifically, the material of Source and drain metal level is aluminium (Al).That is first time wet etching performs etching aluminium, changes
It is as follows to learn reaction equation:
4Al+6HNO3→2Al2O3+6NO3+3H2↑,
Al2O3+2H3PO4→2Al(PO4)+3H2O；
By above-mentioned reaction equation it is found that the metal that nitric acid is used to contain in the Source and drain metal level of second area exposure aoxidizes
For metal oxide, the metal oxide that phosphoric acid is used to contain in the Source and drain metal level of second area exposure is dissolved, that is, is used
First etching liquid can completely remove the Source and drain metal level of second area exposure.
Further, it is lost by ohmic contact layer and active layer of the first time dry etching to second area exposure
It carves, to remove ohmic contact layer and active layer.First time dry etching is using the mixed gas of sulfur hexafluoride and chlorine to the
Two regions exposure ohmic contact layer and active layer perform etching, with remove the second area exposure ohmic contact layer and
Active layer.Wherein, the concentration ratio of sulfur hexafluoride and chlorine is 1:5 in above-mentioned mixed gas.
Further, after carrying out first time wet etching and first time dry etching, by oxygen to first area
Photoresist layer pre-processed, wherein pre-process for by oxygen to photoresist layer carry out calcination, that is, reduce the photoresist layer
Thickness, so as to subsequent etching technics.Specifically, the photoresist layer of first area is U-shaped structure, is passing through oxygen to first
After the photoresist layer in region is pre-processed, the bottom of the photoresist layer of first area is removed, and exposure Source and drain metal level.
After the bottom of the photoresist layer of first area is removed, the surface of remaining oxygen and exposure Source and drain metal level
In conjunction with, and generate metal oxide (as shown in the figure).
Optionally, the concentration of the oxygen is 4000sccm~5000sccm.With alkalinity after photoresist layer is exposed
Developer solution develops, since the concentration of alkaline-based developer is not easy to control, i.e., so that the thickness of the first area bottom of photoresist layer
Degree is not easy to control, when the thickness of the first area bottom of photoresist layer is smaller, pre-processes to first area, i.e. reduction oxygen
The concentration of gas is to 4000sccm~5000sccm, i.e., after mixed gas penetrates first area, it is possible to reduce oxygen and first
The surface of the Source and drain metal level of exposure is reacted at region, to reduce the quantity of metal oxide, avoids metal oxide
Short circuit problem caused by excessively, to improve display performance.
In embodiments herein, the manufacturing method of thin film transistor (TFT) by the way that thin film transistor (TFT) is formed on the substrate,
In, the thin film transistor (TFT) includes the grid layer stacked gradually, gate insulating layer, active layer, ohmic contact layer and source and drain gold
Belong to layer；Deviate from the surface coating photoresist of the ohmic contact layer in the Source and drain metal level, and by the first light shield to described
Photoresist is exposed and develops, to form the photoresist layer, wherein the photoresist layer has first area and the secondth area
Domain, the first area cover the thin film transistor (TFT), the second area exposure thin film transistor (TFT)；To secondth area
Source and drain metal level, ohmic contact layer and the active layer of domain exposure successively carry out first time wet etching and first time dry etching
Afterwards, pre-processed by photoresist layer of the oxygen to the first area, wherein the concentration of the oxygen be 4000sccm~
5000sccm.The surface that technical solution provided by the present application can reduce the Source and drain metal level at oxygen and first area carries out anti-
Answer, to reduce the quantity of metal oxide, avoid metal oxide excessive and caused by short circuit problem, to improve display
Energy.
Based on the above embodiment, as shown in Fig. 2, including: the step of thin film transistor (TFT) is formed on the substrate in S1
S11, it is sequentially depositing the first metal material, gate insulating layer material, active layer material, ohmic contact layer on substrate
Material and the second metal material；
S12, pass through the second light shield to first metal material, gate insulating layer material, active layer material, Ohmic contact
Layer material and the second metal material are exposed and develop, to form thin film transistor (TFT), wherein the thin film transistor (TFT) includes
Grid layer, gate insulating layer, active layer, ohmic contact layer and Source and drain metal level.
In one embodiment, a substrate is provided, which includes but is not limited to use glass substrate etc., and substrate is light transmission base
Plate, the material of transparent substrates can be selected from glass, quartz, organic polymer, other suitable materials or combinations thereof.It should be noted that
If substrate selects conductive material, an insulating layer need to be formed on the substrate before the component that substrate carries thin film transistor (TFT)
(not shown), in order to avoid the problem of short circuit occurs between substrate and the component of thin film transistor (TFT).
For mechanical property, substrate can be rigid substrates or flexible base plate.The material of rigid substrates can be selected from glass,
Quartz, conductive material, metal, wafer, other suitable materials or combinations thereof.The material of flexible base plate can be selected from ultra-thin glass,
Organic polymer (such as plastics), other suitable materials or combinations thereof.
It is sequentially depositing the first metal material, gate insulating layer material, active layer material, Ohmic contact layer material on substrate
And second metal material.
Wherein, the first metal material and the second metal material are aluminium (Al), are existed certainly, in other embodiments, first
Metal material and the second metal material can also be other materials, such as: copper material (Cu) etc., there is no restriction in this application.
By the second light shield to the first metal material, gate insulating layer material, active layer material, Ohmic contact layer material with
And second metal material be exposed and develop, to form thin film transistor (TFT), wherein thin film transistor (TFT) includes grid layer, grid
Insulating layer, active layer, ohmic contact layer and Source and drain metal level.A thin film transistor (TFT) is formed by the second light shield together
Structure.
Based on two above-mentioned embodiments, as shown in figure 3, the manufacturing method of thin film transistor (TFT) provided by the present application, is also wrapped
It includes:
S4, second of wet etching is carried out by Source and drain metal level of second etching liquid to first area exposure, with
Form source electrode and drain electrode, wherein second etching liquid includes the mixed solution of acetic acid, nitric acid and phosphoric acid；
S5, second of dry etching is carried out to the ohmic contact layer exposure of the first area, to form channel region,
In, second of dry etching uses the mixed gas of sulfur hexafluoride and chlorine.
In one embodiment, due in the S3 step, the bottom of the first area of photoresist layer by oxygen calcination by
Removal, and exposure Source and drain metal level and oxygen react the metal oxide generated with Source and drain metal level surface.Passed through for the second quarter
It loses liquid and second of wet etching is carried out to the Source and drain metal level of first area, to form source electrode and drain electrode, i.e., to exposed
Source and drain metal level performs etching, and to remove the Source and drain metal level in the region, forms source electrode and drain electrode.
Wherein, second etching liquid includes the mixed solution of acetic acid, nitric acid and phosphoric acid, and phosphoric acid in the second etching liquid,
The ratio of acetic acid and nitric acid is 70:10:5.5.Wherein, acetic acid plays the role of buffer, for adjusting the second etching liquid
Concentration.
Specifically, the material of Source and drain metal level is aluminium (Al).That is second of wet etching aoxidizes aluminium and metal
Object (Al2O3) perform etching, chemical equation is as follows:
4Al+6HNO3→2Al2O3+6NO3+3H2↑,
Al2O3+2H3PO4→2Al(PO4)+3H2O；
By above-mentioned reaction equation it is found that the metal that nitric acid is used to contain in the Source and drain metal level of first area exposure aoxidizes
For metal oxide, phosphoric acid is used for the metal oxide and remaining gold that will contain in the Source and drain metal level of first area exposure
Belong to oxide dissolution, i.e., the Source and drain metal level and remaining gold that first area exposes can be completely removed using the second etching liquid
Belong to oxide.
Further, after carrying out second of wet etching to the Source and drain metal level of first area exposure, exposure ohm
Contact layer carries out second of dry etching to the ohmic contact layer of first area exposure, to form channel region, wherein second
Secondary dry etching uses the mixed gas of sulfur hexafluoride and chlorine to remove the ohmic contact layer of first area exposure.Wherein,
The concentration ratio of sulfur hexafluoride and chlorine is 1:5 in above-mentioned mixed gas.
It is understood that in second of dry etching, it may be fast due to etching speed, there are no complete for mixed gas
It totally disappeared and consume, i.e., mixed gas can be reacted with the active layer below ohmic contact layer, and carry out partial etching to active layer.
Based on the above embodiments, as shown in figure 4, after S5 step, further includes:
S6, the removing first area, and exposure institute's source electrode and the drain electrode；
S7, deposit passivation layer material is distinguished away from the surface of the ohmic contact layer in the source electrode and the drain electrode
Material；
S8, the passivation material is exposed and is developed by third light shield, to form the first passivation layer and second
Passivation layer, wherein first passivation layer formation is in the top of the source electrode, and second passivation layer formation is in the electric leakage
The top of pole.
In one embodiment, after carrying out secondary wet process etching and secondary dry etching to thin film transistor (TFT), removing first
Region, and exposure Source and drain metal level and channel region, that is, remove remaining photoresist layer, and exposure source electrode, drain electrode and
Channel region.
Further, deposit passivation layer material is distinguished away from the surface of ohmic contact layer in source electrode and drain electrode, and lead to
Passivation material is exposed and is developed with third light shield, to form the first passivation layer and the second passivation layer, wherein first is blunt
Change the top that layer is formed in the source electrode, second passivation layer formation is in the top of the drain electrode.Wherein, the first passivation
Layer and the second passivation layer are covered on thin film transistor (TFT), and are protected to thin film transistor (TFT)；First passivation layer formation Yu Yuan electricity
The top of pole, the second passivation layer formation is in the top of drain electrode.
Further, third passivation layer is additionally provided between the first passivation layer and the second passivation layer, third passivation layer is covered in
On channel region, so that the first passivation layer, third passivation layer and the second passivation layer are continuous structure on thin film transistor (TFT).
Based on the above embodiments, as shown in figure 5, after S8 step, further includes:
S9, the surface deposited metal film for deviating from the Source and drain metal level in second passivation layer, wherein described second
There is the contact hole of the exposure drain electrode on passivation layer；
S10, the metallic film is exposed and is developed by the 4th light shield, to form pixel electrode layer, wherein institute
Pixel electrode layer is stated to connect by the contact hole with the drain electrode.
In one embodiment, the surface deposited metal film of Source and drain metal level is deviated from the second passivation layer, wherein second is blunt
Change the contact hole on layer with exposure drain electrode；Metallic film is conductive film.Metallic film is exposed by the 4th light shield
Light simultaneously develops, to form pixel electrode layer, wherein pixel electrode layer is connect by contact hole with drain electrode.
As shown in figs. 1 to 6, the application also provides a kind of substrate.
In one embodiment, substrate includes manufacturer's legal system of substrate 1 and the thin film transistor (TFT) as described in above-described embodiment
The thin film transistor (TFT) obtained.Specifically, as shown in fig. 6, the substrate include substrate 1, the film crystal that is formed on the substrate 1
Pipe, the thin film transistor (TFT) include the grid layer 2 stacked gradually, gate insulating layer 3, active layer 4, ohmic contact layer 5, source and drain gold
Belong to layer 6, passivation layer 7 and pixel electrode layer 8.
In one embodiment, Source and drain metal level 6 includes source electrode 61 and drain electrode 62, and passivation layer 7 includes the first passivation layer
71 and second passivation layer 72, the first passivation layer 71 be formed in the top of source electrode 61, the second passivation layer 72 is formed in drain electrode 62
Top；There is the contact hole (being not marked in figure) of exposure drain electrode, pixel electrode layer 8 passes through contact hole on second passivation layer 72
It is connect with drain electrode 62.
In one embodiment, a channel region, passivation layer 7 are formed between the source electrode 61 on thin film transistor (TFT) and drain electrode 62
It further include third passivation layer 73, third passivation layer 73 is covered on the channel region.First passivation layer 71, the second passivation layer 72 and
Three passivation layers 73 are continuous structure on thin film transistor (TFT), and are made up of one of light shield, and passivation layer 7 is covered completely
It is placed on thin film transistor (TFT), with protection cap thin film transistor (TFT).
By the thin film transistor (TFT) on substrate in this present embodiment referring to the implementation of the manufacturing method of above-mentioned thin film transistor (TFT)
Example is made, i.e. all technologies of the embodiment of manufacturing method of the thin film transistor (TFT) in the present embodiment with above-mentioned thin film transistor (TFT)
Feature and technical effect are no longer repeated herein referring in particular to above-described embodiment.
As shown in Fig. 1~7, the application also provides a kind of display device.
In one embodiment, as shown in fig. 7, display device include substrate 100, color membrane substrates 200 and be set to substrate 100
Layer of liquid crystal molecule 300 between color membrane substrates 200.
Optionally, substrate includes thin made from the manufacturing method of substrate 1 and the thin film transistor (TFT) as described in above-described embodiment
Film transistor.Specifically, as shown in fig. 6, the substrate 100 includes substrate 1, the thin film transistor (TFT) being formed on the substrate 1,
The thin film transistor (TFT) includes the grid layer 2 stacked gradually, gate insulating layer 3, active layer 4, ohmic contact layer 5, source and drain metal
Layer 6, passivation layer 7 and pixel electrode layer 8.
In one embodiment, Source and drain metal level 6 includes source electrode 61 and drain electrode 62, and passivation layer 7 includes the first passivation layer
71 and second passivation layer 72, the first passivation layer 71 be formed in the top of source electrode 61, the second passivation layer 72 is formed in drain electrode 62
Top；There is the contact hole (being not marked in figure) of exposure drain electrode, pixel electrode layer 8 passes through contact hole on second passivation layer 72
It is connect with drain electrode 62.
In one embodiment, a channel region, passivation layer 7 are formed between the source electrode 61 on thin film transistor (TFT) and drain electrode 62
It further include third passivation layer 73, third passivation layer 73 is covered on the channel region.First passivation layer 71, the second passivation layer 72 and
Three passivation layers 73 are continuous structure on thin film transistor (TFT), and are made up of one of light shield, and passivation layer 7 is covered completely
It is placed on thin film transistor (TFT), with protection cap thin film transistor (TFT).
By the substrate that display device in this present embodiment includes in above-described embodiment, i.e. display device in the present embodiment
Substrate in above-described embodiment, and the thin film transistor (TFT) on substrate is referring to the embodiment system of the manufacturing method of above-mentioned thin film transistor (TFT)
It obtains, i.e. all technical characteristics of the embodiment of manufacturing method of the thin film transistor (TFT) in the present embodiment with above-mentioned thin film transistor (TFT)
And technical effect is no longer repeated herein referring in particular to above-described embodiment.
The foregoing is merely the alternative embodiments of the application, are not intended to limit the scope of the patents of the application, all at this
Under the design of application, using equivalent transformation made by present specification and accompanying drawing content, or directly/it is used in other phases indirectly
The technical field of pass is included in the scope of patent protection of the application.
Claims (10)
1. a kind of manufacturing method of thin film transistor (TFT), which is characterized in that the manufacturing method of the thin film transistor (TFT) includes:
Thin film transistor (TFT) is formed on the substrate, wherein the thin film transistor (TFT) includes the grid layer stacked gradually, gate insulator
Layer, active layer, ohmic contact layer and Source and drain metal level；
Deviate from the surface coating photoresist of the ohmic contact layer in the Source and drain metal level, and by the first light shield to the light
Photoresist is exposed and develops, to form the photoresist layer, wherein the photoresist layer has first area and the secondth area
Domain, the first area cover the thin film transistor (TFT), the second area exposure thin film transistor (TFT)；And
First time wet etching is successively carried out to Source and drain metal level, ohmic contact layer and the active layer of second area exposure
After first time dry etching, pre-processed by photoresist layer of the oxygen to the first area, wherein the oxygen
Concentration is 4000sccm~5000sccm.
2. the manufacturing method of thin film transistor (TFT) according to claim 1, which is characterized in that the first time wet etching is adopted
With the first etching liquid, wherein first etching liquid includes the mixed liquor of acetic acid, nitric acid and phosphoric acid.
3. the manufacturing method of thin film transistor (TFT) according to claim 1, which is characterized in that the first time dry etching is adopted
With the mixed gas of sulfur hexafluoride and oxygen.
4. the manufacturing method of thin film transistor (TFT) according to any one of claims 1 to 3, which is characterized in that described to serve as a contrast
The step of formation thin film transistor (TFT), includes: on bottom
Be sequentially depositing on substrate the first metal material, gate insulating layer material, active layer material, Ohmic contact layer material and
Second metal material；And
By the second light shield to first metal material, gate insulating layer material, active layer material, Ohmic contact layer material with
And second metal material be exposed and develop, to form thin film transistor (TFT), wherein the thin film transistor (TFT) includes grid layer, grid
Pole insulating layer, active layer, ohmic contact layer and Source and drain metal level.
5. the manufacturing method of thin film transistor (TFT) according to claim 4, which is characterized in that described sudden and violent to the second area
After Source and drain metal level, ohmic contact layer and the active layer of dew successively carry out first time wet etching and first time dry etching,
After carrying out pretreated step to the first area by oxygen, further includes:
Second of wet etching is carried out by Source and drain metal level of second etching liquid to first area exposure, to form source electricity
Pole and drain electrode, wherein second etching liquid includes the mixed solution of acetic acid, nitric acid and phosphoric acid；And
Second of dry etching is carried out to the ohmic contact layer of first area exposure, to form channel region, wherein described the
Secondary dry etching uses the mixed gas of sulfur hexafluoride and chlorine.
6. the manufacturing method of thin film transistor (TFT) according to claim 5, which is characterized in that described sudden and violent to the first area
The ohmic contact layer of dew carries out second of dry etching, the step of to form channel region after, further includes:
Remove the first area, and the exposure source electrode and the drain electrode；
Deposit passivation layer material is distinguished away from the surface of the ohmic contact layer in the source electrode and the drain electrode；And
The passivation material is exposed and is developed by third light shield, to form the first passivation layer and the second passivation layer,
Wherein, first passivation layer formation is in the top of the source electrode, and second passivation layer formation is in the upper of the drain electrode
Side.
7. the manufacturing method of thin film transistor (TFT) according to claim 6, which is characterized in that it is described by third light shield to institute
It states passivation material to be exposed and develop, after the step of the first passivation layer of formation and the second passivation layer, further includes:
Deviate from the surface deposited metal film of the Source and drain metal level in second passivation layer, wherein second passivation layer
The upper contact hole with the exposure drain electrode；And
The metallic film is exposed and is developed by the 4th light shield, to form pixel electrode layer, wherein the pixel electricity
Pole layer is connect by the contact hole with the drain electrode.
8. a kind of substrate, which is characterized in that the substrate includes substrate and as described in 1~7 any one of the claims
Thin film transistor (TFT) manufacturing method made from thin film transistor (TFT):
The thin film transistor (TFT) is formed on the substrate, and the thin film transistor (TFT) includes that the grid layer stacked gradually, grid are exhausted
Edge layer, active layer, ohmic contact layer, Source and drain metal level, passivation layer and pixel electrode layer.
9. substrate according to claim 8, which is characterized in that the Source and drain metal level includes source electrode and drain electrode, institute
Stating passivation layer includes the first passivation layer and the second passivation layer, and first passivation layer formation is described in the top of the source electrode
Second passivation layer formation is in the top of the drain electrode；
There is the contact hole of the exposure drain electrode on second passivation layer, the pixel electrode layer by the contact hole with
The drain electrode connection.
10. a kind of display device, which is characterized in that the display device include substrate, color membrane substrates and be set to the substrate
Layer of liquid crystal molecule between the color membrane substrates；
The substrate includes the manufacturing method of substrate and the thin film transistor (TFT) as described in 1~7 any one of the claims
Thin film transistor (TFT) obtained:
The thin film transistor (TFT) is formed on the substrate, and the thin film transistor (TFT) includes that the grid layer stacked gradually, grid are exhausted
Edge layer, active layer, ohmic contact layer, Source and drain metal level, passivation layer and pixel electrode layer.
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