CN110335814A - The preparation method and solar battery sheet of selective doping structure are prepared on silicon wafer - Google Patents
The preparation method and solar battery sheet of selective doping structure are prepared on silicon wafer Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 90
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 90
- 239000010703 silicon Substances 0.000 title claims abstract description 90
- 238000002360 preparation method Methods 0.000 title claims abstract description 38
- 239000012535 impurity Substances 0.000 claims abstract description 153
- 230000004888 barrier function Effects 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims description 18
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 15
- 229910004205 SiNX Inorganic materials 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 229910004012 SiCx Inorganic materials 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 4
- 229910021478 group 5 element Inorganic materials 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 3
- 230000002708 enhancing effect Effects 0.000 claims description 2
- 230000001737 promoting effect Effects 0.000 claims description 2
- 239000002019 doping agent Substances 0.000 abstract description 12
- 230000003749 cleanliness Effects 0.000 abstract description 3
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 150000001875 compounds Chemical class 0.000 description 5
- 238000002161 passivation Methods 0.000 description 4
- 230000004044 response Effects 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical group [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 210000002268 wool Anatomy 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 235000008216 herbs Nutrition 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 230000004083 survival effect Effects 0.000 description 1
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
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- H01L21/2251—Diffusion into or out of group IV semiconductors
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- H01L21/2256—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides through the applied layer
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Abstract
The present invention relates to preparation methods and solar battery sheet that selective doping structure is prepared on silicon wafer, selective doping structure includes lightly doped district and heavily doped region, preparation method is the following steps are included: sensitive side or backlight side in silicon wafer set gradually the first impurity active layer, barrier layer and the second impurity active layer from the inside to the outside, impurity source in second impurity active layer is identical relative to the doping attribute of silicon wafer as the impurity source in the first impurity active layer, and the concentration of the impurity source in the second impurity active layer is higher;The impurity source in the first impurity active layer is doped into silicon wafer and forms the lightly doped district of planar in silicon chip surface by high temperature propulsion mode;In specified region the impurity source in the first impurity active layer and the second impurity active layer is promoted by laser threat warner mode into silicon wafer, forms heavily doped region.The preparation method of the embodiment of the present invention keeps the surface dopant concentration for preparing resulting lightly doped district lower, and the surface dopant concentration of heavily doped region is higher, and the preparation method cleanliness without any pollution.
Description
Technical field
The present invention relates to technical field of solar batteries, and in particular to a kind of selective doping structure of preparing on silicon wafer
Preparation method and solar battery sheet.
Background technique
The survival and development of the mankind be unable to do without the energy.Solar energy be the renewable of most advantage, amount be big, clean energy resource it
One.Crystal silicon solar energy battery is a kind of semiconductor devices for luminous energy being converted into electric energy.At this stage, crystal silicon solar
In the preparation process of battery, the preparation process of selective doping structure is a kind of mainstream technology, because, selective doping structure packet
Lightly doped district and heavily doped region are included, lightly doped district possesses superior shortwave photoresponse, the few son of contact of the heavily doped region with metal
It is compound to reduce and there is lower contact resistance.
But the preparation method of existing selective doping structure have the shortcomings that it is obvious, wherein laser doping divergent contour
At the method for phosphorosilicate glass (PSG) layer, because of the limitation of diffusion technique, the lightly doped district and heavily doped region of selective doping structure
Concentration difference is less big;And by the way of exposure mask cleaning, the part heavily doped region cleaning of selective doping structure is gently mixed
Miscellaneous area, and a large amount of chemical solution can be consumed, while bringing chemical contamination to environment.
Summary of the invention
In order to solve the above technical problems, it is an object of the present invention to provide one kind to prepare selective doping on silicon wafer
The preparation method of structure, the preparation method can individually regulate and control the lightly doped district of selective doping structure and the doping of heavily doped region
Concentration keeps the surface dopant concentration for preparing resulting lightly doped district lower, and the surface dopant concentration of heavily doped region is higher, to make
The short wave response of lightly doped district is more preferable, the contact of the metal of heavily doped region it is compound it is lower, contact resistance is lower, and the preparation method is clear
It is clean pollution-free.
It is another object of the present invention to provide the silicon wafer systems that a kind of solar battery sheet, the solar battery sheet use
The selective doping structure being prepared by above-mentioned preparation method is had, is imitated with higher open-circuit voltage and cells convert
Rate.
In order to achieve the above objectives, the present invention adopts the following technical scheme:
The preparation method that selective doping structure is prepared on silicon wafer of embodiment according to a first aspect of the present invention, the choosing
Selecting property doped structure includes lightly doped district and heavily doped region, comprising the following steps:
Step S1 sets gradually the first impurity active layer, barrier layer and in the sensitive side or backlight side of silicon wafer from the inside to the outside
Two impurity active layer, the impurity source in impurity source and the first impurity active layer in the second impurity active layer is relative to the silicon
The doping attribute of piece is identical, and the concentration of the impurity source in the second impurity active layer is higher;
Step S2 makes the impurity source in the first impurity active layer be doped into the silicon by high temperature propulsion mode
The lightly doped district of planar is formed in piece and in the silicon chip surface;
Step S3 makes the first impurity active layer and second impurity in specified region by laser threat warner mode
The impurity source in active layer is promoted into the silicon wafer, forms the heavily doped region.
Preferably, the type of the silicon wafer is N-shaped or p-type.
Preferably, the material of main part of the first impurity active layer and the second impurity active layer be SiNx, SiON, SiOx,
SiCx or amorphous silicon, the impurity source are selected from group V element or iii group element.
Preferably, the thickness of the first impurity active layer and the second impurity active layer is mutually indepedent, is 1-1000nm.
Preferably, the first impurity active layer and/or the second impurity active layer pass through chemical vapour deposition technique or physics
Vapour deposition process is prepared, and the chemical vapour deposition technique is low-pressure chemical vapour deposition technique, plasma enhanced chemical
Any one of vapour deposition process and aumospheric pressure cvd method.
Preferably, the material of main part on the barrier layer is SiNx, SiON, SiOx, SiCx or amorphous silicon, and the barrier layer
With a thickness of 1-1000nm.
Preferably, in the step S2, the high temperature propulsion mode is the propulsion of tubular type high temperature, and propulsion temperature is 500-1000
℃。
Preferably, the doping concentration of the lightly doped district is 1 × 1017cm-3-1×1022cm-3。
Preferably, the doping concentration of the heavily doped region is 1 × 1019cm-3-1×1023cm-3。
Preferably, the preparation method that selective doping structure is prepared on silicon wafer further includes following steps:
Step S4 removes the first impurity active layer, barrier layer and the second impurity source after forming the heavily doped region
Layer.
The solar battery sheet of embodiment according to a second aspect of the present invention, including silicon wafer are prepared with basis on the silicon wafer
The selective doping structure that preparation method described in any of the above-described embodiment is prepared, the selective doping structure are selection
Property emitter or selective surface.
The beneficial effects of the present invention are:
The preparation method according to an embodiment of the present invention that selective doping structure is prepared on silicon wafer, by silicon wafer by
Light side or backlight side set gradually the first impurity active layer, barrier layer and the second impurity active layer from the inside to the outside, promote by high temperature
When mode forms lightly doped district, barrier layer can effectively stop the impurity of the second impurity active layer to enter, and then be pushed away by laser
Heavily doped region is formed into mode, as long as controlling the impurity source concentration of the first impurity active layer Yu the second impurity active layer respectively as a result, i.e.,
The lightly doped district of selective doping structure and the doping concentration of heavily doped region can individually be regulated and controled, to make to prepare resulting selectivity
The surface dopant concentration of the lightly doped district of doped structure is lower, and the surface dopant concentration of heavily doped region is higher, such as Fig. 8 and Fig. 9 institute
Show, the surface dopant concentration of lightly doped district can achieve 1 × 1020cm-3Hereinafter, and the surface dopant concentration of heavily doped region can be with
Reach 1 × 1021cm-3, and then keeping the short wave response of lightly doped district more preferable, the metal of heavily doped region contacts compound and contact resistance
It is lower, and the preparation method cleanliness without any pollution.It is further available with higher open-circuit voltage and cell conversion efficiency
Solar battery sheet.
The above description is only an overview of the technical scheme of the present invention, in order to better understand the technical means of the present invention,
And can be implemented in accordance with the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention and the accompanying drawings.
Detailed description of the invention
Fig. 1 is the flow chart of the preparation method that selective doping structure is prepared on silicon wafer of the embodiment of the present invention;
Fig. 2 is the silicon wafer after the surface wool manufacturing of the embodiment of the present invention;
Fig. 3 is the silicon wafer for being provided with the first impurity active layer, barrier layer and the second impurity active layer of the embodiment of the present invention;
Fig. 4 is the silicon wafer for being prepared with selective doping structure of the embodiment of the present invention;
Fig. 5 is the silicon wafer of the first impurity of removal active layer of the embodiment of the present invention, the second impurity active layer and barrier layer;
Fig. 6 is the silicon wafer for being deposited with aluminum oxide passivation film and SiNx film of the embodiment of the present invention;
Fig. 7 is the structural schematic diagram of the solar battery sheet of the embodiment of the present invention;
Fig. 8 is bent according to the doping of the lightly doped district for the selective doping structure of the embodiment of the present invention prepared on silicon wafer
Line chart;
Fig. 9 is bent according to the doping of the heavily doped region for the selective doping structure of the embodiment of the present invention prepared on silicon wafer
Line chart.
Specific embodiment
With reference to the accompanying drawings and examples, specific embodiments of the present invention will be described in further detail.Implement below
Example is merely to illustrate the present invention, but is not intended to limit the scope of the invention.
It is as shown in Figures 1 to 4, according to an embodiment of the present invention that selective doping structure is prepared on silicon wafer 10 is (including light
Doped region 11 and heavily doped region 12) preparation method, include the following steps:
Step S1 sets gradually the first impurity active layer 20, barrier layer in the sensitive side or backlight side of silicon wafer 10 from the inside to the outside
30 and the second impurity active layer 40, the impurity source in the second impurity active layer 40 and the impurity source in the first impurity active layer 20
Doping attribute relative to the silicon wafer 10 is identical, and the concentration of the impurity source in the second impurity active layer 20 is higher.
According to some embodiments of the present invention, the type of silicon wafer 10 can may be p-type for N-shaped.It should be noted that
The doping attribute of selective doping structure and the doping attribute of silicon wafer 10 select on the contrary, for example, when the type of silicon wafer 10 is N-shaped
The doping attribute of selecting property doped structure is p-type.
The impurity source in impurity source and the first impurity active layer 20 in so-called second impurity active layer 40 is relative to silicon wafer 10
It is identical to adulterate attribute, that is to say, that the impurity source in the second impurity active layer 40 and the first impurity active layer 20, relative to silicon wafer 10
Speech belongs to p-type doping or n-type doping.
According to some embodiments of the present invention, the material of main part of the first impurity active layer 20 and the second impurity active layer 40 is
SiNx, SiON, SiOx, SiCx or amorphous silicon, the impurity source in the first impurity active layer 20 and the second impurity active layer 40 are selected from group V
Element or iii group element, wherein be p-type doping when impurity source is selected from iii group element, when impurity source is selected from group V
It is n-type doping when element.That is, when silicon wafer 10 is N-shaped, in the first impurity active layer 20 and the second impurity active layer 40
Impurity source is selected from iii group element, carries out p-type doping;When silicon wafer 10 is p-type, the first impurity active layer 20 and the second impurity source
Impurity source in layer 40 is selected from group V element, carries out n-type doping.
According to some embodiments of the present invention, the thickness of the first impurity active layer 20 and the second impurity active layer 40 is mutually indepedent,
For 1-1000nm.It is so-called mutually indepedent, that is to say, that the thickness of the first impurity active layer 20 and the second impurity active layer 40 each other not by
Other side influences, and thickness can be the same or different, can be thick with 20 to the second impurity active layer 40 of the first impurity active layer, can also be with the
One impurity active layer, 20 to the second impurity active layer 40 is thin.
Wherein, the first impurity active layer 20 and/or the second impurity active layer 40 pass through chemical vapour deposition technique or object
Physical vapor deposition method is prepared, and the chemical vapour deposition technique is low-pressure chemical vapour deposition technique, plasma enhancing
Learn any one of vapour deposition process and aumospheric pressure cvd method.
In addition, not having about the impurity source concentration of the first impurity active layer 20 and the impurity source concentration of the second impurity active layer 40
There is specific limitation, can determine according to the design needs.It should be noted that the impurity source concentration ratio of the second impurity active layer 40
The impurity source concentration of first impurity active layer 20 is high.
According to some embodiments of the present invention, the material of main part on barrier layer 30 can be selected from SiNx, SiON, SiOx, SiCx
Or amorphous silicon, and the thickness on barrier layer 30 can be 1-1000nm.
Step S2 is doped into the impurity source in the first impurity active layer 20 by high temperature propulsion mode described
The lightly doped district 11 of planar is formed in silicon wafer 10 and on 10 surface of silicon wafer.
According to some embodiments of the present invention, the step of the above-mentioned preparation method that selective doping structure is prepared on silicon wafer 10
In rapid S2, high temperature propulsion mode is the propulsion of tubular type high temperature, and promoting temperature is 500-1000 DEG C.
Step S3 makes the first impurity active layer 20 and described second miscellaneous by laser threat warner mode in specified region
The impurity source in matter active layer 40 is promoted into the silicon wafer 10, forms the heavily doped region 12.
That is, as shown in figure 3, sensitive side or backlight side in silicon wafer 10 are sequentially depositing the first impurity source from the inside to the outside
Layer 20, barrier layer 30 and the second impurity active layer 40, wherein in impurity source and the first impurity active layer 20 in the second impurity active layer 40
Impurity source it is identical relative to the doping attribute of silicon wafer 10, i.e. doping attribute is p-type doping or n-type doping, and second is miscellaneous
The concentration of impurity source in matter active layer 40 is higher than the concentration of the impurity source in the first impurity active layer 20, as shown in figure 4, the first impurity
Impurity source in active layer 20 is doped into silicon wafer 10 by high temperature propulsion mode, and forms gently mixing for planar on 10 surface of silicon wafer
Then miscellaneous area 11 makes the impurity source in the first impurity active layer 20 and the second impurity active layer 40, by laser threat warner mode, specified
It is promoted in region into silicon wafer 10, forms heavily doped region 12.
By the setting on barrier layer 30, the impurity source avoided in the second impurity active layer 40 is advanced into selective doping structure
In lightly doped district 11, the doping concentration of the lightly doped district 11 and heavily doped region 12 that allow selective doping structure individually carries out
Regulation, thus keep the surface dopant concentration for preparing the lightly doped district 11 of resulting selective doping structure lower, heavily doped region 12
Surface dopant concentration it is higher, and then keep the short wave response of lightly doped district 11 more preferable, the metal contact of heavily doped region 12 it is compound and
Contact resistance is lower, the further available solar battery sheet with higher open-circuit voltage and cell conversion efficiency.
And the preparation method cleanliness without any pollution.
According to some embodiments of the present invention, the above-mentioned preparation method that selective doping structure is prepared on silicon wafer 10 is in silicon
In the selective doping structure prepared on piece 10, the doping concentration of lightly doped district 11 is 1 × 1017cm-3-1×1022cm-3, heavily doped
The doping concentration in miscellaneous area 12 is 1 × 1019cm-3-1×1023cm-3。
According to some embodiments of the present invention, in the above-mentioned preparation method for preparing selective doping structure on silicon wafer 10,
After forming heavily doped region 12, the first impurity active layer 20 of removal, barrier layer 30 and the second impurity active layer 40.
It is prepared with the selectivity being prepared according to the above-mentioned preparation method for preparing selective doping structure on silicon wafer 10
The silicon wafer 10 of doped structure, can be used for forming solar battery sheet, wherein selective doping structure can be solar battery
Selective emitter or selective surface in piece, the solar battery sheet have higher open-circuit voltage and cells convert
Efficiency.
The present invention is described below by specific embodiment.
As shown in Figures 2 to 7, a kind of preparation method of solar battery sheet, the silicon wafer 10 in the solar battery sheet are made
The selective doping structure being prepared according to the above-mentioned preparation method for preparing selective doping structure on silicon wafer 10 is had, is wrapped
Include following steps:
A, making herbs into wool: selection P-type wafer 10, body resistivity are 2.0 Ω cm, carry out surface system to the light-receiving surface of silicon wafer 10
Suede, the resulting 10 light-receiving surface reflectivity of silicon wafer with flannelette reach 12%;
B, deposit the first impurity active layer 20: silicon wafer 10 light-receiving surface normal atmosphere vapor deposition with a thickness of the first miscellaneous of 100nm
Matter active layer 20, the first impurity active layer 20 are the phosphorosilicate glass layer that a little impurity source phosphorus doping is contained in bottom;
C, deposit barrier layer 30: normal atmosphere vapor deposition, should with a thickness of the barrier layer 30 of 100nm in the first impurity active layer 20
Barrier layer 30 is silicon oxide layer;
D, deposit the second impurity active layer 40: on barrier layer 30 normal atmosphere vapor deposition with a thickness of 100nm the second impurity source
Layer 40, the second impurity active layer 40 are the phosphorosilicate glass layer rich in impurity source phosphorus doping;
E, the formation of the lightly doped district 11 of selective doping structure: in tube type apparatus, using tubular type high temperature propulsion mode
Make impurity source phosphorus doping in the first impurity active layer 20 into silicon wafer 10, form the lightly doped district 11 of planar on 10 surface of silicon wafer,
Wherein, the temperature that tubular type high temperature promotes is 830 DEG C, time 30min;
F, the formation of the heavily doped region 12 of selective doping structure: using laser in specified scanned in regions metal gate line chart
Shape promotes the impurity source in the first impurity active layer 20 and the second impurity active layer 40 into silicon wafer 10, forms heavily doped region 12,
The technological parameter of middle laser are as follows: wavelength 532nm, pulsewidth 10ns, frequency 200KHz, power 30W;
G, the first impurity active layer 20, the second impurity active layer 40 and barrier layer 30 are removed: clean with hydrofluoric acid solution and removes the
One impurity active layer 20, the second impurity active layer 40 and barrier layer 30;
H, it grows oxide layer: in tube type apparatus, at 800 DEG C, leading to oxygen 30min, in the table of the light-receiving surface of silicon wafer 10
Face generate silicon oxide layer, silicon oxide layer with a thickness of 10nm;
I, deposition of aluminium oxide passivating film 50: using atomic energy depositing device silicon wafer 10 shady face deposited oxide aluminum passivation
Film 50, aluminum oxide passivation film 50 with a thickness of 10nm;
J, deposit SiNx film 60: using plasma enhances chemical vapour deposition technique in the light-receiving surface and shady face of silicon wafer 10
Deposited the SiNx film 60 of passivation and antireflective effect respectively, wherein the SiNx film 60 of light-receiving surface deposition with a thickness of 80nm, back
Smooth surface deposition SiNx film 60 with a thickness of 90nm;
K, it slots: using wavelength for the laser of 532nm, slot on the SiNx film 60 of the shady face of silicon wafer 10;
L, it makes metal electrode 70: printing electrocondution slurry respectively in the light-receiving surface and shady face of silicon wafer 10, form metal electricity
Pole 70.
The silicon wafer 10 for being prepared with selective doping structure obtained according to above-described embodiment, the doping of lightly doped district 11 are dense
Degree is shown in Fig. 8 and Fig. 9 with the doping concentration of heavily doped region 12 and the relationship of depth, as seen from the figure, wherein being lightly doped
The surface dopant concentration in area can achieve 1 × 1020cm-3Hereinafter, and the surface dopant concentration of heavily doped region can achieve 1 ×
1021cm-3, and then keeping the short wave response of lightly doped district more preferable, the metal contact of heavily doped region is compound and contact resistance is lower, into
The obtained solar battery sheet of one step has higher open-circuit voltage and cell conversion efficiency.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. one kind prepares the preparation method of selective doping structure on silicon wafer (10), the selective doping structure includes gently mixing
Miscellaneous area (11) and heavily doped region (12), which comprises the following steps:
Step S1 sets gradually the first impurity active layer (20), barrier layer in the sensitive side or backlight side of silicon wafer (10) from the inside to the outside
(30) and the second impurity active layer (40), in the impurity source and the first impurity active layer (20) in the second impurity active layer (40)
Impurity source it is identical relative to the doping attribute of the silicon wafer (10), and the impurity source in the second impurity active layer (40) is dense
Du Genggao;
Step S2 makes the impurity source in the first impurity active layer (20) be doped into the silicon by high temperature propulsion mode
The lightly doped district (11) of planar is formed in piece (10) and on the silicon wafer (10) surface;
Step S3 makes the first impurity active layer (20) and second impurity in specified region by laser threat warner mode
The impurity source in active layer (40) is promoted into the silicon wafer (10), forms the heavily doped region (12).
2. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
The type of the silicon wafer (10) is N-shaped or p-type.
3. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
The material of main part of the first impurity active layer (20) and the second impurity active layer (40) is SiNx, SiON, SiOx, SiCx or non-
Crystal silicon, the impurity source are selected from group V element or iii group element.
4. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
The thickness of the first impurity active layer (20) and the second impurity active layer (40) is mutually indepedent, is 1-1000nm,
Preferably, the first impurity active layer (20) and/or the second impurity active layer (40) by chemical vapour deposition technique or
Physical vaporous deposition is prepared, and the chemical vapour deposition technique is low-pressure chemical vapour deposition technique, plasma enhancing
Any one of chemical vapour deposition technique and aumospheric pressure cvd method.
5. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
The material of main part of the barrier layer (30) is SiNx, SiON, SiOx, SiCx or amorphous silicon, and the thickness of the barrier layer (30)
For 1-1000nm.
6. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
In the step S2, the high temperature propulsion mode is the propulsion of tubular type high temperature, and promoting temperature is 500-1000 DEG C.
7. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
The doping concentration of the lightly doped district (11) is 1 × 1017cm-3-1×1022cm-3。
8. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
The doping concentration of the heavily doped region (12) is 1 × 1019cm-3-1×1023cm-3。
9. the preparation method according to claim 1 for preparing selective doping structure on silicon wafer (10), which is characterized in that
Further include following steps:
Step S4 removes the first impurity active layer (20), barrier layer (30) and second after forming the heavily doped region (10)
Impurity active layer (40).
10. a kind of solar battery sheet, which is characterized in that including silicon wafer (10), be prepared on the silicon wafer (10) according to right
It is required that the selectivity that the described in any item preparation methods for preparing selective doping structure on silicon wafer (10) of 1-9 are prepared is mixed
Miscellaneous structure, the selective doping structure are selective emitter or selective surface.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103050568A (en) * | 2011-10-13 | 2013-04-17 | 三星Sdi株式会社 | Method of manufacturing a photoelectric device |
CN103155178A (en) * | 2010-06-18 | 2013-06-12 | 弗劳恩霍弗实用研究促进协会 | Method for producing a selective doping structure in a semiconductor substrate in order to produce a photovoltaic solar cell |
CN109616528A (en) * | 2018-10-29 | 2019-04-12 | 晶澳太阳能有限公司 | A kind of preparation method of selective emitter of solar battery |
-
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CN103155178A (en) * | 2010-06-18 | 2013-06-12 | 弗劳恩霍弗实用研究促进协会 | Method for producing a selective doping structure in a semiconductor substrate in order to produce a photovoltaic solar cell |
CN103050568A (en) * | 2011-10-13 | 2013-04-17 | 三星Sdi株式会社 | Method of manufacturing a photoelectric device |
CN109616528A (en) * | 2018-10-29 | 2019-04-12 | 晶澳太阳能有限公司 | A kind of preparation method of selective emitter of solar battery |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116053353A (en) * | 2022-12-01 | 2023-05-02 | 江苏杰太光电技术有限公司 | Preparation method of boron doped selective emitter and N-type crystalline silicon solar cell |
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