CN110320957B - Voltage selection circuit - Google Patents
Voltage selection circuit Download PDFInfo
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- CN110320957B CN110320957B CN201910718976.5A CN201910718976A CN110320957B CN 110320957 B CN110320957 B CN 110320957B CN 201910718976 A CN201910718976 A CN 201910718976A CN 110320957 B CN110320957 B CN 110320957B
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- voltage division
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/625—Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc
Abstract
The invention discloses a voltage selection circuit, and belongs to the field of electricity. The voltage selection circuit comprises a resistance voltage division circuit module, an analog cross selector, a comparator, an inverter and a buffer. The voltage selection circuit can accurately compare the voltage levels of two voltages in the circuit, and is convenient for users to freely select the voltage level of the output voltage.
Description
Technical Field
The invention relates to the field of electricity, in particular to a voltage selection circuit.
Background
The voltage selection circuit is widely applied to analog circuits, particularly to the occasions of circuits such as an EEPROM, an OTP, an SOC and the like, and is used for switching to corresponding voltages to operate in different operation modes, for example, the operation voltages of the OTP during data writing and data reading are different, a normal chip power supply voltage is required during data reading, and the data writing needs to be completed at a higher operation voltage than the normal power supply voltage, so that the voltage selection circuit is required to complete the switching of high and low voltages.
Most of traditional voltage selection circuits select a single transistor as a switching tube, and most of the functions of the circuits can only select large voltage output and can work only by needing a large voltage difference between two voltages.
Disclosure of Invention
The invention mainly solves the technical problem of providing a voltage selection circuit, which can be used for a user to independently select a high-voltage output circuit or a low-voltage output circuit, and can be separated even if the voltage difference between the two circuits is small due to high voltage detection sensitivity, thereby facilitating the selection of the user.
In order to achieve the above purpose, the invention adopts a technical scheme that: the utility model provides a voltage selection circuit, including simulation cross selector, comparator, phase inverter, its characterized in that still includes resistance bleeder circuit module, resistance bleeder circuit module connects the signal input part of simulation cross selector, simulation cross selector signal output part connects the comparator input end, the comparator output end is connected resistance bleeder circuit module with the input of phase inverter, the output of phase inverter is connected resistance bleeder circuit module.
Preferably, the resistance voltage divider circuit module is composed of two units having the same structure, each of the units includes a common output end of the resistance voltage divider circuit, a first PMOS transistor, a second PMOS transistor, a first voltage divider resistor, and a second voltage divider resistor, the common output end of the resistance voltage divider circuit, the first PMOS transistor, the second PMOS transistor, the first voltage divider resistor, and the second voltage divider resistor are sequentially connected in series, one end of the second voltage divider resistor is connected to a ground line, a leading-out port between the second PMOS transistor and the first voltage divider resistor is connected to an external power supply, a leading-out port between the first voltage divider resistor and the second voltage divider resistor is connected to a signal input end of the analog cross selector, and external power supply voltages accessed by the two units are different.
Preferably, the substrate of the first PMOS transistor is connected to the drain, and the substrate of the second PMOS transistor is connected to the source.
Preferably, the working voltage of the analog cross selector and the comparator is the same as the voltage of one unit in the resistance voltage-dividing circuit module, and the working voltage of the inverter is the same as the voltage of another unit in the resistance voltage-dividing circuit module.
Preferably, the number of the signal input ends of the analog cross selector is two, the two signal input ends are respectively connected with different units in the resistance voltage division circuit module, and the analog cross selector comprises an external level signal input end.
Preferably, the number of the phase inverters is two, the input end of the first phase inverter is connected to the gate of the first PMOS transistor of the first unit of the resistance voltage divider circuit module and the output end of the comparator, and the output end of the first phase inverter is connected to the gate of the first PMOS transistor of the second unit of the resistance voltage divider circuit module; the input end of the second phase inverter is connected with the grid electrode of the second PMOS tube of the second unit of the resistance voltage division circuit module and the output end of the comparator, and the output end of the second phase inverter is connected with the grid electrode of the second PMOS tube of the first unit of the resistance voltage division circuit module.
Preferably, an NMOS tube is connected between the second voltage-dividing resistor and the ground, the second voltage-dividing resistor is connected to a drain of the NMOS tube, a gate of the NMOS tube is connected to the external enable terminal, and a source of the NMOS tube is connected to the ground.
Preferably, the voltage divider circuit further comprises a buffer, a signal input end of the buffer is communicated with the outside of the voltage selection circuit, a signal output end of the buffer is connected with an external enabling end of the resistance voltage divider circuit module, and the working voltage of the buffer is the same as the working voltage of the phase inverter.
The invention has the beneficial effects that:
firstly, a dual-power switch PMOS tube design is adopted, and a connection mode of a B end of the PMOS tube is combined, so that the circuit can realize the complete opening and closing of VDD _ IN and VDDH or VDDL no matter low-voltage output or high-voltage output is selected, and the condition of electric leakage cannot occur;
secondly, the design of an analog cross selector is adopted, so that the high-voltage or low-voltage output can be freely selected;
thirdly, the design of the comparator is simplified by adopting the voltage detection resistor, if the two voltages VDDH and VDDL are directly compared without resistor voltage division sampling, the comparator is difficult to realize, and the adjustment of the comparison voltage can be accurately realized by adjusting the resistance value;
and fourthly, when the voltage is compared, the NMOS tube of the resistance switch can be controlled to be opened through internal logic, and can be kept in a closed state after the comparison is completed, so that the power consumption of the circuit can be reduced.
Drawings
FIG. 1 is a schematic diagram of a voltage selection circuit according to the present invention;
the parts in the drawings are numbered as follows: 101-a first resistance voltage division circuit unit second PMOS tube, 102-a first resistance voltage division circuit unit first PMOS tube, 103-a second resistance voltage division circuit unit second PMOS tube, 104-a second resistance voltage division circuit unit first PMOS tube, 105-a first resistance voltage division circuit unit first voltage division resistor, 106-a first resistance voltage division circuit unit second voltage division resistor, 107-a second resistance voltage division circuit unit first voltage division resistor, 108-a second resistance voltage division circuit unit second voltage division resistor, 109-a first resistance voltage division circuit unit NMOS tube, 110-a second voltage division resistor circuit unit NMOS tube, 111-an analog cross selector, 112-a comparator, 113-a first phase inverter, 114-a second phase inverter, 115-a buffer;
VA-the simulation cross selector connecting end of the first resistance voltage division circuit unit, VB-the simulation cross selector connecting end of the second resistance voltage division circuit unit, V1-the first resistance voltage division circuit unit second PMOS tube 101 grid external interface, V2-the first resistance voltage division circuit unit first PMOS tube 102 grid external interface, V3-the second resistance voltage division circuit unit second PMOS tube 103 grid external interface, V4-the second resistance voltage division circuit unit first PMOS tube 104 grid external interface, EN-external enabling end interface.
FIG. 2 is an equivalent diagram of the connection of the B terminal of the PMOS transistor of the power switch of the present invention
Detailed Description
The following detailed description of the preferred embodiments of the present invention, taken in conjunction with the accompanying drawings, will make the advantages and features of the invention easier to understand by those skilled in the art, and thus will clearly and clearly define the scope of the invention.
Fig. 1 is a schematic diagram of a voltage selection circuit. The voltage selection circuit comprises a first resistance voltage division circuit unit, a second PMOS tube 101, a first resistance voltage division circuit unit, a first PMOS tube 102, a second resistance voltage division circuit unit, a second PMOS tube 103, a second resistance voltage division circuit unit, a first PMOS tube 104, a first resistance voltage division circuit unit, a first voltage division resistor 105, a first resistance voltage division circuit unit, a second voltage division resistor 106, a second resistance voltage division circuit unit, a first voltage division resistor 107, a second resistance voltage division circuit unit, a second voltage division resistor 108, a first resistance voltage division circuit unit NMOS tube 109, a second voltage division resistor circuit unit NMOS tube 110, an analog cross selector 111, a comparator 112, a first inverter 113, a second inverter 114 and a buffer 115.
The resistance voltage division circuit module is composed of two units with the same structure, a common output end VDD _ IN IN the first unit is connected with a drain electrode of a first PMOS tube 102 of the first resistance voltage division circuit unit, the drain electrode of the first PMOS tube 102 of the first resistance voltage division circuit unit is connected with a substrate, a source electrode of the first PMOS tube 102 of the first resistance voltage division circuit unit is connected with a drain electrode of a second PMOS tube 101 of the first resistance voltage division circuit unit, a source electrode of the second PMOS tube 101 of the first resistance voltage division circuit unit is connected with the substrate, a source electrode of the second PMOS tube 101 of the first resistance voltage division circuit unit is connected with a first voltage division resistor 105 of the first resistance voltage division circuit unit, a leading-out port between the first voltage division circuit unit and the second voltage division resistor 105 is connected with an external power supply, the external power supply voltage is VDDH, the other end of the first voltage division resistor 105 of the first resistance voltage division circuit unit is connected with a second voltage division resistor 106 of the first resistance voltage division circuit unit, and a leading-out port VA between the first voltage division circuit unit and the second voltage division resistor 105 and the first resistance voltage division circuit unit and the second voltage division resistor 105 and the first voltage divider, wherein the leading-out port is used for connecting with an analog cross selector. The other end of the second voltage-dividing resistor 106 of the first voltage-dividing circuit unit is connected to the drain of the NMOS transistor 109 of the first voltage-dividing circuit unit, the source of the NMOS transistor 109 of the first voltage-dividing circuit unit is grounded, and the gate of the NMOS transistor 109 of the first voltage-dividing circuit unit is connected to the external enable terminal EN.
A common output end VDD _ IN IN a second unit of the resistance voltage division circuit module is connected with a drain electrode of a first PMOS tube 104 of a second resistance voltage division circuit unit, a drain electrode of the first PMOS tube 104 of the second resistance voltage division circuit unit is connected with a substrate, a source electrode of the first PMOS tube 104 of the second resistance voltage division circuit unit is connected with a drain electrode of a second PMOS tube 103 of the second resistance voltage division circuit unit, a source electrode of the second PMOS tube 103 of the second resistance voltage division circuit unit is connected with the substrate, a source electrode of the second PMOS tube 103 of the second resistance voltage division circuit unit is connected with a first voltage division resistor 107 of the second resistance voltage division circuit unit, a leading-out port between the two is connected with an external power supply, the external power supply voltage is VDDL, the other end of the first voltage division resistor 107 of the second resistance voltage division circuit unit is connected with a second voltage division resistor 108 of the second resistance voltage division circuit unit, and a leading-out a port VB for connecting with an analog cross selector. The other end of the second voltage-dividing resistor 108 of the second voltage-dividing circuit unit is connected to the drain of the NMOS transistor 110 of the second voltage-dividing circuit unit, the source of the NMOS transistor 110 of the second voltage-dividing circuit unit is grounded, and the gate of the NMOS transistor 110 of the second voltage-dividing circuit unit is connected to the external enable terminal EN.
The analog cross selector 111, the comparator 112, the first inverter 113, and the second inverter 114 constitute a control block for comparing and selecting outputs of VDDH and VDDL in the resistance voltage divider circuit block. Two signal input ends of the analog cross selector 111 are respectively connected with VA and VB in the resistance voltage dividing circuit module, and the analog cross selector 111 is provided with an external level signal input end SEC for receiving a level signal freely selected by a user. The analog cross selector 111 is further provided with a working voltage input end for an external circuit to provide a working voltage of the analog cross selector 111, two signal output ends of the analog cross selector 111 are connected with an INP end and an INN end of the comparator 112, the comparator 112 is provided with a working voltage input end for the external circuit to provide the working voltage of the comparator 112, two signal output ends of the comparator 112 are respectively connected with a signal input end of the first inverter 113 and a signal input end of the second inverter 114, a port is led out between the signal output end of the comparator 112 and the signal input end of the first inverter 113 and is connected with a grid electrode of the first PMOS tube 102 of the first resistance voltage division circuit unit, and a port is led out between the signal output end of the comparator 112 and the signal input end of the second inverter 114 and is connected with a grid electrode of the second PMOS tube 103 of the second resistance voltage division circuit unit. The first inverter 113 has an operating voltage input terminal for providing an operating voltage of the first inverter 113 by an external circuit, and a signal output terminal of the first inverter 113 is connected to the gate of the first PMOS transistor 104 of the second resistor-divider circuit unit. The second inverter 114 has an operating voltage input terminal for providing the operating voltage of the second inverter 114 by an external circuit, and a signal output terminal of the second inverter 114 is connected to the gate of the second PMOS transistor 101 of the first resistor voltage divider circuit unit.
The circuit of the invention also comprises a buffer 115, wherein a signal input end ENA of the buffer 115 is communicated with the outside of the voltage selection circuit and is used for receiving an external signal, the buffer 115 is provided with a working voltage input end which is used for providing the working voltage of the buffer 115 by an external circuit, and a signal output end of the buffer 115 is connected with two external enabling ends EN of the resistance voltage division circuit module.
The detection of two input voltage values (VDDH and VDDL) is completed through resistance voltage division detection, and if the detection is sensitive to power consumption, a voltage division resistor is closed to a ground path through a switch with an enable (a first resistance voltage division circuit unit NMOS tube 109 and a second resistance voltage division circuit unit NMOS tube 110), so that the power consumption is reduced. When voltage detection is needed, the voltage detection circuit is controlled to be opened through internal logic.
The operation principle of the voltage selection circuit will be described IN detail below by taking the example that the voltage selection circuit output voltage VDD _ IN is a high voltage.
Assuming that VDDH is higher than VDDL, the operation voltages of the analog cross selector 111 and the comparator 112 are switched to VDDL, and the operation voltages of the first inverter 113, the second inverter 114 and the buffer 115 are switched to VDDH, then the SEL port level of the analog cross selector 111 is configured, and the VA port of the first resistance divider circuit unit is connected to the analog cross selectorThe cross selector 111 is connected with the INP end of the comparator 112, the VB port of the second voltage divider circuit unit is connected with the analog cross selector 111 and connected with the INN end of the comparator 112, different voltage units in the voltage divider circuit module are connected, voltage sampling is performed on VDDH and VDDL, the voltage is sent to the comparator 112 through VA and VB, the conduction state of the four power switch PMOS transistors 101-104 is controlled after voltage judgment, so as to realize the high voltage selection function, and the corresponding expression is as follows (the access resistances of the two NMOS transistors 109 and 110 are ignored, and the resistances of the 101-104 are R-104 respectively105-R108)
If the output voltage VDD _ IN of the voltage selection circuit is low voltage, on the basis of high voltage output, the SEL port level of the analog cross selector 111 is changed to connect VA with the INN port of the comparator 112 and connect VB with the INP port of the comparator 112, so that the low voltage output function is realized, and the corresponding expression is as follows (ignoring the access resistances of the two NMOS transistors 109 and 110, the resistances of the 101-S-channel 104 are R respectively105-R108)
The user can autonomously set the level of the SEL port and the corresponding intersection relationship of VA, VB, INP, INN, for example: when SEL is 1, INP is VA, INN is VB; when SEL is 0, INP is VB, and INN is VA.
When SEL equals 1, the first resistance voltage division circuit unit second PMOS transistor 101 and the first resistance voltage division circuit unit first PMOS transistor 102 are IN a conducting state, the voltage of the first resistance voltage division circuit unit first PMOS transistor 102 gate external interface V2 is 0V, the second resistance voltage division circuit unit second PMOS transistor 103 gate external interface V3 voltage is VDDL, the first resistance voltage division circuit unit second PMOS transistor 101 gate external interface V1 voltage is 0V, the second resistance voltage division circuit unit first PMOS transistor 104 gate external interface V4 voltage is VDDH, and the resistance voltage division circuit output voltage VDD _ IN is equal to VDDH.
When SEL is equal to 0, the second PMOS transistor 103 of the second voltage divider circuit unit and the first PMOS transistor 104 of the second voltage divider circuit unit are IN a conducting state, the voltage of the gate external interface V4 of the first PMOS transistor 104 of the second voltage divider circuit unit is 0V, the voltage of the gate external interface V1 of the second PMOS transistor 101 of the first voltage divider circuit unit is VDDH, the voltage of the gate external interface V3 of the second PMOS transistor 103 of the second voltage divider circuit unit is 0V, the voltage of the gate external interface V2 of the first PMOS transistor 102 of the first voltage divider circuit unit is VDDL, and the voltage VDD _ IN of the first voltage divider circuit unit is equal to VDDL.
In order to improve the voltage detection precision and reduce the influence of the on-resistance of the MOS transistor, the sizes of the first resistor voltage-dividing circuit unit, the second PMOS transistor 101, the first resistor voltage-dividing circuit unit, the second PMOS transistor 103, the second resistor voltage-dividing circuit unit, the first PMOS transistor 104, the first resistor voltage-dividing circuit unit, the NMOS transistor 109, and the second resistor voltage-dividing circuit unit, the NMOS transistor 110 are selected as large as possible, and the resistances of the first resistor voltage-dividing circuit unit, the second resistor voltage-dividing circuit unit, the first voltage-dividing resistor 105, the first resistor voltage-dividing circuit unit, the second resistor voltage-dividing circuit unit, the first voltage-dividing resistor 107, and the second resistor voltage-dividing circuit unit, the second voltage-dividing resistor 108 are selected as large as possible.
The application of the invention can facilitate the user to select the output voltage of the circuit independently through the setting of the SEL end level; the design of the dual-power switch PMOS tube and the connection mode of the PMOS tube substrate realize the complete opening and closing of VDD _ IN and VDDH or VDDL, and avoid the electric leakage condition; the voltage detection precision is improved due to the design of the voltage detection resistor, and the adjustment of the comparison voltage can be accurately realized by adjusting the resistance value of the voltage division resistor; the NMOS tube of the resistance switch can be controlled by internal logic, is opened only when voltage is compared, and can be kept in a closed state after comparison is completed, so that the power consumption of the circuit is effectively reduced.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structural changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to other related technical fields, are included in the scope of the present invention.
Claims (4)
1. A voltage selection circuit comprises an analog cross selector, a comparator and a phase inverter, and is characterized by also comprising a resistance voltage division circuit module, wherein the resistance voltage division circuit module is connected with a signal input end of the analog cross selector, a signal output end of the analog cross selector is connected with an input end of the comparator, an output end of the comparator is connected with the resistance voltage division circuit module and an input end of the phase inverter, an output end of the phase inverter is connected with the resistance voltage division circuit module,
the resistance voltage division circuit module comprises a first resistance voltage division circuit unit and a second resistance voltage division circuit unit which are identical in structure, each unit comprises a common output end of the resistance voltage division circuit, a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a first voltage division resistor and a second voltage division resistor, the common output end of the resistance voltage division circuit, the first PMOS tube, the second PMOS tube, the first voltage division resistor and the second voltage division resistor are sequentially connected in series, one end of the second voltage division resistor is connected with a ground wire, the common output end of the resistance voltage division circuit is connected with a drain electrode of the first PMOS tube, the drain electrode of the first PMOS tube is connected with a substrate, a source electrode of the first PMOS tube is connected with the drain electrode of the second PMOS tube, a source electrode of the second PMOS tube is connected with the substrate, and a leading-out port between the second PMOS tube and the first voltage division resistor is connected with an external power supply, a port is led out from the middle of the first voltage-dividing resistor and the second voltage-dividing resistor and is connected with the signal input end of the analog cross selector, the external power supply voltages accessed by the two units are different,
one end of a first voltage dividing resistor of the first voltage dividing circuit unit is connected with a source stage of a second PMOS transistor of the first voltage dividing circuit unit, the other end of the first voltage dividing resistor of the first voltage dividing circuit unit is connected with a second voltage dividing resistor of the first voltage dividing circuit unit, a first port is led out between the first voltage dividing resistor and the second voltage dividing resistor, one end of the first voltage dividing resistor of the second voltage dividing circuit unit is connected with the source stage of the second PMOS transistor of the second voltage dividing circuit unit, the other end of the first voltage dividing resistor of the second voltage dividing circuit unit is connected with a second voltage dividing resistor of the second voltage dividing circuit unit, and a second port is led out between the first voltage dividing resistor and the second voltage dividing resistor;
the analog cross selector comprises two signal input ends which are respectively connected with the first port and the second port, the analog cross selector comprises an external level signal input end which is used for receiving level signals, and two signal output ends of the analog cross selector are respectively connected with two input ends of the comparator;
the two phase inverters comprise a first phase inverter and a second phase inverter, wherein two signal output ends of the comparator are respectively connected with signal input ends of the first phase inverter and the second phase inverter, an input end of the first phase inverter is connected with a grid electrode of a first PMOS (P-channel metal oxide semiconductor) tube of the first resistance voltage division circuit unit and one output end of the comparator, and an output end of the first phase inverter is connected with a grid electrode of a first PMOS tube of the second resistance voltage division circuit unit; the input end of the second inverter is connected with the grid electrode of a second PMOS tube of the second resistance voltage division circuit unit and the other output end of the comparator, and the output end of the second inverter is connected with the grid electrode of the second PMOS tube of the first resistance voltage division circuit unit;
the common output end of the resistance voltage division circuit of the first resistance voltage division circuit unit is connected with the common output end of the resistance voltage division circuit of the second resistance voltage division circuit unit, the first PMOS tube and the second PMOS tube correspond to larger sizes respectively, and the first voltage division resistor and the second voltage division resistor correspond to larger resistance values respectively.
2. The voltage selection circuit of claim 1, wherein the analog cross selector and the comparator operate at the same voltage as one cell of the resistive divider circuit block, and the inverter operates at the same voltage as another cell of the resistive divider circuit block.
3. The voltage selection circuit of claim 1, wherein an NMOS transistor is connected between the second voltage-dividing resistor and ground, the second voltage-dividing resistor is connected to a drain of the NMOS transistor, a gate of the NMOS transistor is connected to the external enable terminal, and a source of the NMOS transistor is connected to ground.
4. The voltage selection circuit according to any one of claims 1 to 3, further comprising a buffer, wherein a signal input terminal of the buffer is externally connected to the voltage selection circuit, a signal output terminal of the buffer is connected to an external enable terminal of the resistor voltage division circuit module, and an operating voltage of the buffer is the same as an operating voltage of the inverter.
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| CN201910718976.5A CN110320957B (en) | 2019-08-05 | 2019-08-05 | Voltage selection circuit |
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| CN201910718976.5A CN110320957B (en) | 2019-08-05 | 2019-08-05 | Voltage selection circuit |
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| CN110320957B true CN110320957B (en) | 2022-01-07 |
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