CN110289834A - A kind of continuously adjustable image intensifier shutter of width time range - Google Patents
A kind of continuously adjustable image intensifier shutter of width time range Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/017—Adjustment of width or dutycycle of pulses
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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Abstract
In order to solve the technical problem that existing booster shutter close speed is slow, cannot achieve direct current is continuously adjusted to 3ns wide time range, the present invention provides a kind of wide time ranges to be continuously adjusted image intensifier shutter, including main switching device Q9, Q10, for driving the first driving circuit of main switching device Q9, and the second driving circuit for driving main switching device Q10；Main switching device Q9, Q10 are all made of field effect transistor；The main function of main switching device Q9 is quickly to be unfolded into shutter pulse high speed failing edge；The main function of main switching device Q10 is quickly to be unfolded into shutter pulse high speed rising edge.Not only it can satisfy the DC operation mode of booster, but also can satisfy booster pulse working mode, and minimum pulse width reaches 3ns, i.e., combined image intensifier that can realize 3ns integration imaging through the invention.
Description
Technical field
The invention belongs to ultrafast diagnostic techniques fields, are related to a kind of continuously adjustable image intensifier shutter of wide time range.
Background technique
For image intensifier as a kind of low-light multiplier device, main function is that faint optical signal is carried out multiplication amplification,
Consequently facilitating people observe or are recorded system record.Image intensifier is usually made of cathode, microchannel plate and fluorescent screen.Its
In, cathode it is main with being to convert incident optical signal to electronics, the main function of microchannel plate is that electronics doubles, glimmering
Optical screen is mainly used for converting visible light for the electronics after multiplication.In some applications, image intensifier was used for the duration
When the target of longer (being greater than 60 seconds) is observed, DC state is worked in, that is, persistently opening state.It answers at other
In, image intensifier needs to be observed duration very short process again, such as blast process, bullet motion process
Deng, and need to observe the state of some fleeting target in Fast Process, this just needs image intensifier to work in gated mode,
I.e. only in the special time period work of target movement.
Since image intensifier is possible to work in always-on, it is also possible to work pulse mode thus need booster
Shutter switches over its operating mode.
Usually only with a switching device, there is following two in existing booster shutter:
1, closing velocity is slow (musec order), too long so as to cause the image intensifier shut-in time, can not be to fast time mistake
Cheng Jinhang nanoseconds differentiate frame imaging.
2, it cannot achieve continuously adjustable from normally opened to 3ns wide time range.
Summary of the invention
In order to solve, existing booster shutter close speed is slow, cannot achieve direct current continuously may be used to 3ns wide time range
The technical issues of tune, is continuously adjusted image intensifier shutter the present invention provides a kind of wide time range, pulse width from direct current to
3ns wide scope is continuously adjustable, not only can satisfy the DC operation mode of booster, but also can satisfy booster pulsed operation mould
Formula, and minimum pulse width reaches 3ns, i.e., combines image intensifier that can realize 3ns integration imaging through the invention.
The technical scheme is that
A kind of continuously adjustable image intensifier shutter of width time range, is characterized in that
Including main switching device Q9, Q10, for driving the first driving circuit of main switching device Q9, and for driving
The second driving circuit of main switching device Q10；
Main switching device Q9, Q10 are all made of field effect transistor；
The main function of main switching device Q9 is quickly to be unfolded into shutter pulse high speed failing edge；
The main function of main switching device Q10 is quickly to be unfolded into shutter pulse high speed rising edge.
Further, main switching device Q9 uses NMOS tube, and grid connects the output of the first driving circuit, and source electrode connects first partially
Circuits, drain electrode connect the output end of entire image intensifier shutter；
Main switching device Q10 uses PMOS tube, and grid connects the output of the second driving circuit, and drain electrode connects the second biasing circuit,
Source electrode connects the output end of entire image intensifier shutter；
First driving circuit includes the coupling of the first fast conducting pulse-generating circuit, the first maintenance turning circuit and parallel connection
Close capacitor C8, C9；First fast conducting pulse-generating circuit includes NMOS tube Q1 and PMOS tube Q2；The grid of NMOS tube Q1 connects control
The drain electrode of signal Push1 processed, NMOS tube Q1 connect one end of coupled capacitor C8, C9, and the source electrode of NMOS tube Q1 meets GND；PMOS tube Q2
Grid meet control signal Pull1, the drain electrode map interlinking image intensifier of PMOS tube Q2 closes voltage, and the source electrode of PMOS tube Q2 meets NMOS
The drain electrode of pipe Q1 and one end of coupled capacitor C8, C9；The grid of another termination main switching device Q9 of coupled capacitor C8, C9；
First maintenance turning circuit includes PMOS tube Q5, resistance R7, R10, R11；The drain electrode of PMOS tube Q5 meets turn-on bias voltage, PMOS
The source electrode of pipe Q5 connects the grid of main switching device Q9 by resistance R7, R10, and the grid of PMOS tube Q5 connects conducting dimension by resistance R3
Hold main signal main；One end of a termination R10 of resistance R11 and the grid of main switching device Q9, another termination of resistance R11
Image intensifier opens voltage；
Second driving circuit includes the second fast conducting pulse-generating circuit, the second maintenance turning circuit and coupled capacitor
Cap1；Second fast conducting pulse-generating circuit includes NMOS tube Q3 and PMOS tube Q4；The grid of NMOS tube Q3 connects control signal
The drain electrode of Push2, NMOS tube Q3 connect one end of coupled capacitor Cap1, and the source electrode of NMOS tube Q3 meets GND；The grid of PMOS tube Q4 connects
Signal Pull2 is controlled, the drain electrode map interlinking image intensifier of PMOS tube Q4 closes voltage, and the source electrode of PMOS tube Q4 connects the leakage of NMOS tube Q3
Pole and one end of coupled capacitor Cap1；The grid of another termination main switching device Q10 of coupled capacitor Cap1；Second maintains to lead
Circuit passband includes NMOS tube Q6, resistance R9, R12；The source electrode of NMOS tube Q6 meets GND, and the drain electrode of NMOS tube Q6 is connect by resistance R9
The grid of the other end of the grid of main switching device Q10, one end of R12 and coupled capacitor Cap1, NMOS tube Q6 passes through resistance
R4 connects conducting and maintains main signal main；One end of a termination R9 of resistance R12 and the grid of main switching device Q10, resistance R12
Other end map interlinking image intensifier close voltage；
It is effective to control signal Push1, Push2 high level；It is effective to control signal Pull1, Pull2 low level；
Control signal Push1 and Pull1 interval 20-50ns；Control signal Push2 and Pull2 interval 20-50ns；Control
The interval signal Push1 and Pull1 is equal with the control interval signal Push2 and Pull2.
Further, the first driving circuit further includes the first filter circuit being made of R1 and C1；A termination PMOS of R1
The drain electrode of pipe Q2, the grid of another termination PMOS tube Q2；The drain electrode of a termination PMOS tube Q2 of C1 and image intensifier close electricity
Pressure, another termination GND.
Further, the second driving circuit further includes the second filter circuit being made of R2 and C2；A termination PMOS of R2
The drain electrode of pipe Q4, the grid of another termination PMOS tube Q4；The drain electrode of a termination PMOS tube Q4 of C2 and image intensifier close electricity
Pressure, another termination GND.
It further, further include the filter regulator circuit in parallel with first biasing circuit；The filter regulator circuit
It is made of capacitor C11, C12 in parallel, one end of capacitor C11, C12 connect the source electrode of main switching device Q9, and the other end connects
GND。
It further, further include the voltage regulator circuit in parallel with second biasing circuit；The voltage regulator circuit is capacitor
The drain electrode of a termination main switching device Q10 of Cap2, capacitor Cap2, another termination GND.
Further, first biasing circuit includes resistance R13, R15 and diode DZ1；A termination master of resistance R13
The source electrode of switching device Q9, one end of another termination R15, another termination GND of R15；The cathode of diode DZ1 connects main switch device
The source electrode of part Q9, positive map interlinking image intensifier open voltage.
Further, second biasing circuit includes resistance R14, R8 and diode DZ2；A termination master of resistance R14
The drain electrode of switching device Q10, one end of another termination R8, another termination GND of R8；The anode of diode DZ2 connects main switch device
The drain electrode of part Q10, cathode map interlinking image intensifier close voltage.
Further, main switching device Q9 uses the NMOS tube of model ZVN4524, and main switching device Q10 uses model
For the PMOS tube of ZVP4525.
Further, signal Push1 and Pull1 interval 40ns is controlled；Control signal Push2 and Pull2 interval 40ns.
Compared to traditional booster shutter, the invention has the following advantages:
1. the present invention realizes that most narrow 3ns shutter pulse is defeated using main switching device Q9 and main switching device Q10 complementation conducting
Out, in which: main switching device Q9 uses NMOS tube, and main function is quickly to be unfolded into shutter pulse high speed failing edge；Master opens
It closes device Q10 and uses PMOS tube, main function is quickly to be unfolded into shutter pulse high speed rising edge.
2. main switching device Q9 and Q10 are field effect transistor, conventional driver circuits are generally square wave driving (such as Fig. 4
It is shown), since driving effect moment (forward position) voltage is lower, conducting capacitor charging speed causes field to be imitated more slowly for square wave driving
Answer transistor opening speed slower, for this problem, the present invention carries out the driving circuit of field effect transistor Q9 and Q10
Fine configuration is realized by driving rising edge to carry out overshoot processing (as shown in Figure 5) square wave to field-effect tube endophyte electricity
Holding quick charge realizes image intensifier shutter pulse width by direct current to 3ns wide so that field effect transistor be made quickly to open
Time range is continuously adjustable, can be applied to direct current conducting scene to make the shutter pulse both, can also be applied to pulse conducting field
Scape.
Detailed description of the invention
Fig. 1 is that wide time range is continuously adjusted image intensifier Gate pulse schematic diagram.
Fig. 2 is 3ns shutter pulse.
Fig. 3 is 1ms shutter pulse.
Fig. 4 is traditional square wave drive waveforms.
Fig. 5 is drive waveforms of the present invention.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
Width time range provided by the present invention is continuously adjusted image intensifier shutter, and the central idea of design is using two
A high speed metal-oxide-semiconductor realizes that shutter pulse is quickly opened and quick closedown, the width of shutter pulse maintain main signal by conducting respectively
The width of main determines.
As shown in Figure 1, width time range provided by the present invention is continuously adjusted image intensifier shutter, including main switching device
Q9, Q10, for driving the first driving circuit of main switching device Q9, and for driving the second of main switching device Q10 to drive
Circuit.
Main switching device Q9 uses NMOS tube, and main function is quickly to be unfolded into shutter pulse high speed failing edge；Master opens
The grid for closing device Q9 connects the output of the first driving circuit, and the source electrode of main switching device Q9 connects by R13, R15 and diode DZ1 structure
At the first biasing circuit and parallel connection capacitor C11 and C12, the drain electrode of main switching device Q9 connects entire image intensifier shutter
Output end (output).Capacitor C11 and C12 are used to carry out pressure stabilizing and filtering to the source electrode of Q9；Main switching device Q10 uses PMOS
Pipe, main function is quickly to be unfolded into shutter pulse high speed rising edge；The grid of main switching device Q10 connects the second driving circuit
Output, the drain electrode of main switching device Q10 connects by R14, R8 and diode DZ2 the second biasing circuit constituted and electric capacity of voltage regulation
Cap2, the source electrode of main switching device Q10 connect the output end (output) of entire booster shutter.
First driving circuit includes the coupling of the first fast conducting pulse-generating circuit, the first maintenance turning circuit and parallel connection
Capacitor C8, C9 and the first filter circuit being made of R1 and C1；First fast conducting pulse-generating circuit includes NMOS tube Q1
With PMOS tube Q2；The grid of NMOS tube Q1 meets control signal Push1, and the drain electrode of NMOS tube Q1 connects one end of coupled capacitor C8, C9,
The source electrode of NMOS tube Q1 meets GND；The grid of PMOS tube Q2 connects control signal Pull1, the drain electrode map interlinking image intensifier of PMOS tube Q2
Voltage (+54.6V), one end of capacitor C1 and one end of resistance R1 are closed, another termination GND of capacitor C1, resistance R1's is another
The grid of one termination PMOS tube Q2, the source electrode of PMOS tube Q2 connect the drain electrode of NMOS tube Q1 and one end of coupled capacitor C8, C9；Coupling
Close the grid of another termination main switching device Q9 of capacitor C8, C9；First maintenance turning circuit include PMOS tube Q5, resistance R7,
R10,R11；The drain electrode of PMOS tube Q5 connects turn-on bias voltage (+5V voltage), and the source electrode of PMOS tube Q5 is connect by resistance R7, R10
The grid of main switching device Q9, the grid of PMOS tube Q5 connect conducting by resistance R3 and maintain main signal main；One end of resistance R11
One end of R10 and the grid of main switching device Q9 are connect, the other end map interlinking image intensifier of resistance R11 opens voltage (- 202V).
Second driving circuit includes the second fast conducting pulse-generating circuit, the second maintenance turning circuit and coupled capacitor
Cap1 and the second filter circuit being made of R2 and C2；Second fast conducting pulse-generating circuit includes NMOS tube Q3 and PMOS
Pipe Q4；The grid of NMOS tube Q3 meets control signal Push2, and the drain electrode of NMOS tube Q3 connects one end of coupled capacitor Cap1, NMOS tube
The source electrode of Q3 meets GND；The drain electrode map interlinking image intensifier that the grid of PMOS tube Q4 meets control signal Pull2, PMOS tube Q4 closes electricity
Pressure (+54.6V), one end of C2 and one end of R2, the grid of another termination PMOS tube Q4 of another termination GND of C2, R2,
The source electrode of PMOS tube Q4 connects the drain electrode of NMOS tube Q3 and one end of coupled capacitor Cap1；Another termination master of coupled capacitor Cap1
The grid of switching device Q10；Second maintenance turning circuit includes NMOS tube Q6, resistance R9, R12；The source electrode of NMOS tube Q6 connects
The drain electrode of GND, NMOS tube Q6 connect the grid of main switching device Q10, one end of R12 and coupled capacitor Cap1's by resistance R9
The other end, the grid of NMOS tube Q6 connect conducting by resistance R4 and maintain main signal main；Resistance R12 one termination R9 one end with
And the grid of main switching device Q10, the other end map interlinking image intensifier of resistance R12 close voltage (+54.6V).
It is effective to control signal Push1, Push2 high level；It is effective to control signal Pull1, Pull2 low level；Control signal
The interval Push1 and Pull1 20-50ns；Control signal Push2 and Pull2 interval 20-50ns；Control signal Push1 and Pull1
Interval is equal with the control interval signal Push2 and Pull2.Preferably, signal Push1 and Pull1 interval 40ns is controlled；Control letter
Number interval Push2 and Pull2 40ns can be such that the control signal for generating control signal Push1, Push2, Pull1, Pull2 generates
Circuit structure is fairly simple.
To realize current limliting and isolation, the invention also includes resistance R5 and R6；The drain electrode of a termination NMOS tube Q3 of R5, PMOS
The source electrode of pipe Q4 and one end of coupled capacitor Cap1, another termination bias voltage Net47.9V of R5；A termination NMOS of R6
The source electrode of the drain electrode of pipe Q1, one end of coupled capacitor C8, C9 and PMOS tube Q2, another termination GND of R6.
Working process and principle of the invention are as follows:
When image intensifier does not work, the output end (output) of booster shutter is needed to export about+50V voltage to hinder
Hinder photoelectron by cathode motion to microchannel plate；When image intensifier work, then the output end of booster shutter is needed to export
About -200V voltage is to accelerate photoelectron to make it from cathode motion to microchannel plate.
According to foregoing description, when image intensifier does not work, main switching device Q10 is in the conductive state, to make to export
It holds (output) and image intensifier to close voltage (+54.6V) to connect, exports about+50V voltage；
When image intensifier needs work, NMOS tube Q6 first quickly ends, to make output end (output) and image
Booster is closed voltage (+54.6V) and is disconnected, and is then responsible for one amplitude of generation by NMOS tube Q1 and PMOS tube Q2 and is more than or equal to
(Q2 has just been connected after so that its source voltage is risen to 45V and is continued 40ns the positive pulse of 45V, pulsewidth less than or equal to 40ns, and Q1 is just
Conducting makes Q2 source voltage drop to ground, to generate a 45V, the positive pulse of 40ns), and coupled by coupled capacitor C8 and C9
To the grid of main switching device Q9, thus make main switching device Q9 in 3ns fast conducting and be responsible for by PMOS tube Q5 the
One maintenance turning circuit tends to remain on, and realizes that output end (output) and image intensifier open voltage (- 202V) and continue
It connects, and then realizes that image intensifier is opened；
When image intensifier needs to close, PMOS tube Q5 first quickly ends, to make output end (output) and image
Booster is opened voltage (- 202V) and is disconnected, and is then responsible for generating pulsewidth less than or equal to 40ns, width by NMOS tube Q3 and PMOS tube Q4
(Q4 has just been connected after so that its source voltage is risen to 45V and is continued 40ns negative pulse of the degree more than or equal to 45V, and Q3, which is just connected, to be made
Q4 source voltage drops to ground, to generate a 45V, the negative pulse of 40ns), and main switch device is coupled to by coupled capacitor C7
The grid of part Q10, thus make main switching device Q10 in 3ns fast conducting and by NMOS tube Q6 be responsible for second maintain lead
Circuit passband tends to remain on, and realizes that output end (output) closes voltage (+54.6V) with image intensifier again and connect, figure
One pulsed operation process of image intensifier terminates.
Experimental verification:
Main switching device Q9 uses the NMOS tube of model ZVN4524, and main switching device Q10 uses model ZVP4525
PMOS tube, simulation result is as shown in Figure 2,3, it can be seen that the present invention can be realized the output of most narrow 3ns, also may be implemented
The output of 1ms.
Claims (10)
1. a kind of width time range is continuously adjusted image intensifier shutter, it is characterised in that:
Including main switching device Q9, Q10, opened for driving the first driving circuit of main switching device Q9, and for driving to lead
Close the second driving circuit of device Q10；
Main switching device Q9, Q10 are all made of field effect transistor；
The main function of main switching device Q9 is quickly to be unfolded into shutter pulse high speed failing edge；
The main function of main switching device Q10 is quickly to be unfolded into shutter pulse high speed rising edge.
2. width time range according to claim 1 is continuously adjusted image intensifier shutter, it is characterised in that: main switching device
Q9 uses NMOS tube, and grid connects the output of the first driving circuit, and source electrode connects the first biasing circuit, and it is fast that drain electrode connects entire image intensifier
The output end of door；
Main switching device Q10 uses PMOS tube, and grid connects the output of the second driving circuit, and drain electrode connects the second biasing circuit, source electrode
Connect the output end of entire image intensifier shutter；
First driving circuit includes the coupling electricity of the first fast conducting pulse-generating circuit, the first maintenance turning circuit and parallel connection
Hold C8, C9；First fast conducting pulse-generating circuit includes NMOS tube Q1 and PMOS tube Q2；The grid of NMOS tube Q1 connects control letter
Number Push1, the drain electrode of NMOS tube Q1 connect one end of coupled capacitor C8, C9, and the source electrode of NMOS tube Q1 meets GND；The grid of PMOS tube Q2
The drain electrode map interlinking image intensifier that pole meets control signal Pull1, PMOS tube Q2 closes voltage, and the source electrode of PMOS tube Q2 meets NMOS tube Q1
Drain electrode and coupled capacitor C8, C9 one end；The grid of another termination main switching device Q9 of coupled capacitor C8, C9；First
Maintaining turning circuit includes PMOS tube Q5, resistance R7, R10, R11；The drain electrode of PMOS tube Q5 meets turn-on bias voltage, PMOS tube Q5
Source electrode the grid of main switching device Q9 is connect by resistance R7, R10, the grid of PMOS tube Q5 connects conducting by resistance R3 and maintains master
Signal main；One end of a termination R10 of resistance R11 and the grid of main switching device Q9, the other end map interlinking picture of resistance R11
Booster opens voltage；
Second driving circuit includes the second fast conducting pulse-generating circuit, the second maintenance turning circuit and coupled capacitor Cap1；
Second fast conducting pulse-generating circuit includes NMOS tube Q3 and PMOS tube Q4；The grid of NMOS tube Q3 meets control signal Push2,
The drain electrode of NMOS tube Q3 connects one end of coupled capacitor Cap1, and the source electrode of NMOS tube Q3 meets GND；The grid of PMOS tube Q4 connects control letter
The drain electrode map interlinking image intensifier of number Pull2, PMOS tube Q4 close voltage, the source electrode of PMOS tube Q4 connect NMOS tube Q3 drain electrode and
One end of coupled capacitor Cap1；The grid of another termination main switching device Q10 of coupled capacitor Cap1；Second maintains turning circuit
Including NMOS tube Q6, resistance R9, R12；The source electrode of NMOS tube Q6 meets GND, and the drain electrode of NMOS tube Q6 connects main switch by resistance R9
The other end of the grid of device Q10, one end of R12 and coupled capacitor Cap1, the grid of NMOS tube Q6 is connect by resistance R4 leads
It is logical to maintain main signal main；One end of a termination R9 of resistance R12 and the grid of main switching device Q10, resistance R12's is another
It terminates image intensifier and closes voltage；
It is effective to control signal Push1, Push2 high level；It is effective to control signal Pull1, Pull2 low level；
Control signal Push1 and Pull1 interval 20-50ns；Control signal Push2 and Pull2 interval 20-50ns；Control signal
The interval Push1 and Pull1 is equal with the control interval signal Push2 and Pull2.
3. width time range according to claim 2 is continuously adjusted image intensifier shutter, it is characterised in that: the first driving electricity
Road further includes the first filter circuit being made of R1 and C1；The drain electrode of a termination PMOS tube Q2 of R1, another termination PMOS tube Q2
Grid；The drain electrode of a termination PMOS tube Q2 of C1 and image intensifier close voltage, another termination GND.
4. width time range according to claim 2 or 3 is continuously adjusted image intensifier shutter, it is characterised in that: second drives
Dynamic circuit further includes the second filter circuit being made of R2 and C2；The drain electrode of a termination PMOS tube Q4 of R2, another termination PMOS
The grid of pipe Q4；The drain electrode of a termination PMOS tube Q4 of C2 and image intensifier close voltage, another termination GND.
5. width time range according to claim 4 is continuously adjusted image intensifier shutter, it is characterised in that: further include and institute
State the filter regulator circuit of the first biasing circuit parallel connection；The filter regulator circuit is made of capacitor C11, C12 in parallel, capacitor
One end of C11, C12 connect the source electrode of main switching device Q9, and the other end meets GND.
6. width time range according to claim 5 is continuously adjusted image intensifier shutter, it is characterised in that: further include and institute
State the voltage regulator circuit of the second biasing circuit parallel connection；The voltage regulator circuit is capacitor Cap2, a termination main switch device of capacitor Cap2
The drain electrode of part Q10, another termination GND.
7. width time range according to claim 2 is continuously adjusted image intensifier shutter, it is characterised in that: described first partially
Circuits include resistance R13, R15 and diode DZ1；The source electrode of a termination main switching device Q9 of resistance R13, another termination
One end of R15, another termination GND of R15；The cathode of diode DZ1 connects the source electrode of main switching device Q9, positive map interlinking image intensifying
Device opens voltage.
8. width time range according to claim 2 is continuously adjusted image intensifier shutter, it is characterised in that: described second partially
Circuits include resistance R14, R8 and diode DZ2；The drain electrode of a termination main switching device Q10 of resistance R14, another termination R8
One end, another termination GND of R8；The anode of diode DZ2 connects the drain electrode of main switching device Q10, cathode map interlinking image intensifier
Close voltage.
9. width time range according to claim 2 is continuously adjusted image intensifier shutter, it is characterised in that: main switching device
Q9 uses the NMOS tube of model ZVN4524, and main switching device Q10 uses the PMOS tube of model ZVP4525.
10. width time range according to claim 2 is continuously adjusted image intensifier shutter, it is characterised in that: control signal
The interval Push1 and Pull1 40ns；Control signal Push2 and Pull2 interval 40ns.
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