CN210120539U - Wide time range continuous adjustable image intensifier shutter - Google Patents
Wide time range continuous adjustable image intensifier shutter Download PDFInfo
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- CN210120539U CN210120539U CN201920954289.9U CN201920954289U CN210120539U CN 210120539 U CN210120539 U CN 210120539U CN 201920954289 U CN201920954289 U CN 201920954289U CN 210120539 U CN210120539 U CN 210120539U
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Abstract
In order to solve the technical problems that the closing speed of the shutter of the existing intensifier is slow and the continuous adjustable of the wide time range from direct current to 3ns cannot be realized, the utility model provides a shutter of the intensifier with the continuous adjustable wide time range, which comprises main switching devices Q9 and Q10, a first driving circuit used for driving the main switching device Q9 and a second driving circuit used for driving the main switching device Q10; the main switching devices Q9 and Q10 both adopt field effect transistors; the main function of the main switching device Q9 is to open quickly to form the high-speed falling edge of the shutter pulse; the main function of the main switching device Q10 is to open quickly to form a high-speed rising edge of the shutter pulse. Both can satisfy the direct current mode of intensifier, can satisfy intensifier pulse mode again to minimum pulse width reaches 3ns, passes through promptly the utility model discloses combine the image intensifier can realize 3ns integral imaging.
Description
Technical Field
The utility model belongs to the technical field of the ultrafast diagnosis, a wide time range shutter of an image intensifier capable of being adjusted in succession is related to.
Background
The image intensifier is used as a micro-light multiplication device and mainly plays a role in multiplying and amplifying a weak light signal, so that people can observe or be recorded by a recording system conveniently. The image intensifier typically consists of a cathode, a microchannel plate, and a phosphor screen. The cathode is mainly used for converting an incident light signal into electrons, the microchannel plate is mainly used for multiplying the electrons, and the fluorescent screen is mainly used for converting the multiplied electrons into visible light. In some applications, the image intensifier operates in a dc state, i.e., a continuously on state, when used to observe a target of longer duration (greater than 60 seconds). In other applications, the image intensifier again requires observation of a short duration process, such as an explosion process, a bullet motion process, etc., and observation of the state of the target at some instant in the rapid process, which requires the image intensifier to operate in gated mode, i.e., only during a specific period of target motion.
The image intensifier may operate in a normally open mode or in a pulsed mode and therefore requires an intensifier shutter to switch its mode of operation.
Existing booster shutters typically use only one switching device, which has two problems:
1. the closing speed is slow (in the order of microseconds), so that the closing time of the image intensifier is too long, and nanosecond time resolution framing imaging cannot be carried out on the fast time process.
2. And the continuous adjustability in a wide time range from normally open to 3ns cannot be realized.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem that the present intensifier shutter closing speed is slow, can't realize direct current to 3ns wide time range continuously adjustable, the utility model provides a wide time range continuously adjustable image intensifier shutter, pulse width is from direct current to 3ns wide range continuously adjustable, both can satisfy the direct current mode of operation of intensifier, can satisfy intensifier pulse mode again to minimum pulse width reaches 3ns, passes through promptly the utility model discloses combine the image intensifier can realize 3ns integral imaging.
The technical scheme of the utility model is that:
a wide time range continuously adjustable image intensifier shutter is characterized in that:
comprises main switching devices Q9, Q10, a first driving circuit for driving the main switching device Q9, and a second driving circuit for driving the main switching device Q10;
the main switching devices Q9 and Q10 both adopt field effect transistors;
the main function of the main switching device Q9 is to open quickly to form the high-speed falling edge of the shutter pulse;
the main function of the main switching device Q10 is to open quickly to form a high-speed rising edge of the shutter pulse.
Furthermore, the main switching device Q9 adopts an NMOS transistor, the gate is connected to the output of the first driving circuit, the source is connected to the first bias circuit, and the drain is connected to the output of the whole image intensifier shutter;
the main switching device Q10 adopts a PMOS tube, the grid electrode is connected with the output of the second driving circuit, the drain electrode is connected with the second biasing circuit, and the source electrode is connected with the output end of the whole image intensifier shutter;
the first driving circuit comprises a first quick-on pulse generating circuit, a first maintaining-on circuit and coupling capacitors C8 and C9 which are connected in parallel; the first fast turn-on pulse generating circuit comprises an NMOS transistor Q1 and a PMOS transistor Q2; the grid electrode of the NMOS tube Q1 is connected with a control signal Push1, the drain electrode of the NMOS tube Q1 is connected with one end of the coupling capacitors C8 and C9, and the source electrode of the NMOS tube Q1 is connected with GND; the grid electrode of the PMOS tube Q2 is connected with a control signal Pull1, the drain electrode of the PMOS tube Q2 is connected with the turn-off voltage of the image intensifier, and the source electrode of the PMOS tube Q2 is connected with the drain electrode of the NMOS tube Q1 and one end of each of the coupling capacitors C8 and C9; the other ends of the coupling capacitors C8 and C9 are connected with the gate of the main switching device Q9; the first maintaining and conducting circuit comprises a PMOS tube Q5, resistors R7, R10 and R11; the drain electrode of the PMOS tube Q5 is connected with a conduction bias voltage, the source electrode of the PMOS tube Q5 is connected with the grid electrode of the main switching element Q9 through resistors R7 and R10, and the grid electrode of the PMOS tube Q5 is connected with a conduction maintaining main signal main through a resistor R3; one end of the resistor R11 is connected with one end of the R10 and the grid of the main switching device Q9, and the other end of the resistor R11 is connected with the image intensifier turn-on voltage;
the second driving circuit comprises a second quick-on pulse generating circuit, a second maintaining-on circuit and a coupling capacitor Cap 1; the second fast turn-on pulse generating circuit comprises an NMOS transistor Q3 and a PMOS transistor Q4; the grid electrode of the NMOS tube Q3 is connected with a control signal Push2, the drain electrode of the NMOS tube Q3 is connected with one end of a coupling capacitor Cap1, and the source electrode of the NMOS tube Q3 is connected with GND; the grid electrode of the PMOS tube Q4 is connected with a control signal Pull2, the drain electrode of the PMOS tube Q4 is connected with the turn-off voltage of the image intensifier, and the source electrode of the PMOS tube Q4 is connected with the drain electrode of the NMOS tube Q3 and one end of a coupling capacitor Cap 1; the other end of the coupling capacitor Cap1 is connected with the gate of the main switching device Q10; the second holding and conducting circuit comprises an NMOS transistor Q6, a resistor R9 and a resistor R12; the source of the NMOS transistor Q6 is connected to GND, the drain of the NMOS transistor Q6 is connected to the gate of the main switching device Q10, one end of the R12 and the other end of the coupling capacitor Cap1 through a resistor R9, and the gate of the NMOS transistor Q6 is connected to the on-state maintaining main signal main through a resistor R4; one end of the resistor R12 is connected with one end of the R9 and the grid of the main switching device Q10, and the other end of the resistor R12 is connected with the image intensifier turn-off voltage;
the high level of the control signals Push1 and Push2 is effective; the low level of the control signals Pull1 and Pull2 is effective;
the control signals Push1 and Pull1 are separated by 20-50 ns; the control signals Push2 and Pull2 are separated by 20-50 ns; the control signals Push1 and Pull1 are spaced equally from the control signals Push2 and Pull 2.
Further, the first drive circuit further includes a first filter circuit composed of R1 and C1; one end of R1 is connected with the drain of PMOS transistor Q2, and the other end is connected with the grid of PMOS transistor Q2; one end of the C1 is connected with the drain of the PMOS tube Q2 and the turn-off voltage of the image intensifier, and the other end is connected with GND.
Further, the second drive circuit further includes a second filter circuit composed of R2 and C2; one end of R2 is connected with the drain of PMOS transistor Q4, and the other end is connected with the grid of PMOS transistor Q4; one end of the C2 is connected with the drain of the PMOS tube Q4 and the turn-off voltage of the image intensifier, and the other end is connected with GND.
Furthermore, the device also comprises a filtering voltage stabilizing circuit connected with the first bias circuit in parallel; the filtering voltage stabilizing circuit is composed of capacitors C11 and C12 which are connected in parallel, one ends of the capacitors C11 and C12 are connected with the source electrode of the main switch device Q9, and the other ends of the capacitors C11 and C12 are connected with GND.
Further, the device also comprises a voltage stabilizing circuit connected with the second bias circuit in parallel; the voltage stabilizing circuit is a capacitor Cap2, one end of the capacitor Cap2 is connected with the drain electrode of the main switching device Q10, and the other end is connected with GND.
Further, the first bias circuit includes resistors R13, R15, and a diode DZ 1; one end of the resistor R13 is connected with the source of the main switching device Q9, the other end is connected with one end of R15, and the other end of R15 is connected with GND; the diode DZ1 has its cathode connected to the source of the main switching device Q9 and its anode connected to the image intensifier turn-on voltage.
Further, the second bias circuit includes resistors R14, R8, and a diode DZ 2; one end of the resistor R14 is connected with the drain of the main switching device Q10, the other end is connected with one end of R8, and the other end of R8 is connected with GND; the anode of the diode DZ2 is connected to the drain of the main switching device Q10, and the cathode is connected to the image intensifier turn-off voltage.
Further, the main switching device Q9 adopts an NMOS transistor with model number ZVN4524, and the main switching device Q10 adopts a PMOS transistor with model number ZVP 4525.
Further, the control signals Push1 and Pull1 are spaced 40ns apart; the control signals Push2 and Pull2 are spaced 40ns apart.
Compare in traditional intensifier shutter, the utility model discloses following beneficial effect has:
1. the utility model discloses utilize main switching device Q9 and the complementary 3ns shutter pulse output that switches on of main switching device Q10 realization narrowest, wherein: the main switching device Q9 adopts an NMOS tube, and is mainly used for quickly opening to form a shutter pulse high-speed falling edge; the main switching device Q10 adopts a PMOS transistor, and mainly functions to open quickly to form a high-speed rising edge of a shutter pulse.
2. Main switch device Q9 and Q10 are field effect transistor, and conventional drive circuit is the square wave drive generally (as shown in fig. 4), and the square wave drive is because drive effect is in the twinkling of an eye (leading edge) voltage is lower, and consequently it is slower to lead to the capacitor charging speed that switches on to lead to field effect transistor opening speed, to this problem, the utility model discloses drive circuit to field effect transistor Q9 and Q10 has carried out meticulous configuration, through rising edge to the square wave drive and has gone up overshoot processing (as shown in fig. 5), realizes the quick charge to the inside parasitic capacitance of field effect transistor to make field effect transistor open fast, realized that the enhancement like ware shutter pulse width is adjustable by direct current to 3ns wide time range in succession, thereby make this shutter pulse both can be applied to the direct current and switch on the scene, also can be applied to the.
Drawings
FIG. 1 is a schematic diagram of a wide time range continuously adjustable image intensifier shutter circuit.
Fig. 2 is a 3ns shutter pulse.
Fig. 3 is a 1ms shutter pulse.
Fig. 4 is a conventional square wave drive waveform.
Fig. 5 shows the driving waveforms of the present invention.
Detailed Description
The present invention will be further explained with reference to the accompanying drawings.
The utility model provides a wide time range can be in succession like image intensifier shutter, the central thought of its design is to adopt two high-speed MOS pipes to realize that the shutter pulse is opened fast and is closed fast respectively, and the width of shutter pulse is decided by the width that switches on and maintain main signal main.
As shown in fig. 1, the present invention provides a wide time range continuously adjustable image intensifier shutter, comprising main switching devices Q9, Q10, a first driving circuit for driving the main switching device Q9, and a second driving circuit for driving the main switching device Q10.
The main switching device Q9 adopts an NMOS tube, and is mainly used for quickly opening to form a shutter pulse high-speed falling edge; the gate of the main switching device Q9 is connected to the output of the first driver circuit, the source of the main switching device Q9 is connected to a first bias circuit consisting of R13, R15 and diode DZ1 and to capacitors C11 and C12 connected in parallel, and the drain of the main switching device Q9 is connected to the output (output) of the entire image intensifier shutter. The capacitors C11 and C12 are used for stabilizing and filtering the source of the Q9; the main switching device Q10 adopts a PMOS tube and is mainly used for quickly opening to form a shutter pulse high-speed rising edge; the gate of the main switching device Q10 is connected to the output of the second driving circuit, the drain of the main switching device Q10 is connected to the second bias circuit formed by R14, R8 and diode DZ2 and the voltage stabilizing capacitor Cap2, and the source of the main switching device Q10 is connected to the output (output) of the entire booster shutter.
The first driving circuit comprises a first quick turn-on pulse generating circuit, a first maintaining turn-on circuit, coupling capacitors C8 and C9 which are connected in parallel, and a first filter circuit consisting of R1 and C1; the first fast turn-on pulse generating circuit comprises an NMOS transistor Q1 and a PMOS transistor Q2; the grid electrode of the NMOS tube Q1 is connected with a control signal Push1, the drain electrode of the NMOS tube Q1 is connected with one end of the coupling capacitors C8 and C9, and the source electrode of the NMOS tube Q1 is connected with GND; the gate of the PMOS transistor Q2 is connected to the control signal Pull1, the drain of the PMOS transistor Q2 is connected to the image intensifier turn-off voltage (+54.6V), one end of the capacitor C1 and one end of the resistor R1, the other end of the capacitor C1 is connected to GND, the other end of the resistor R1 is connected to the gate of the PMOS transistor Q2, and the source of the PMOS transistor Q2 is connected to the drain of the NMOS transistor Q1 and one end of the coupling capacitors C8 and C9; the other ends of the coupling capacitors C8 and C9 are connected with the gate of the main switching device Q9; the first maintaining and conducting circuit comprises a PMOS tube Q5, resistors R7, R10 and R11; the drain electrode of the PMOS tube Q5 is connected with a conduction bias voltage (+5V voltage), the source electrode of the PMOS tube Q5 is connected with the grid electrode of the main switching device Q9 through resistors R7 and R10, and the grid electrode of the PMOS tube Q5 is connected with a conduction maintaining main signal main through a resistor R3; one end of the resistor R11 is connected to one end of the R10 and the gate of the main switching device Q9, and the other end of the resistor R11 is connected to the image intensifier turn-on voltage (-202V).
The second driving circuit comprises a second quick turn-on pulse generating circuit, a second maintaining turn-on circuit, a coupling capacitor Cap1 and a second filter circuit consisting of R2 and C2; the second fast turn-on pulse generating circuit comprises an NMOS transistor Q3 and a PMOS transistor Q4; the grid electrode of the NMOS tube Q3 is connected with a control signal Push2, the drain electrode of the NMOS tube Q3 is connected with one end of a coupling capacitor Cap1, and the source electrode of the NMOS tube Q3 is connected with GND; the grid electrode of the PMOS tube Q4 is connected with a control signal Pull2, the drain electrode of the PMOS tube Q4 is connected with the turn-off voltage (+54.6V) of the image intensifier, one end of the C2 and one end of the R2, the other end of the C2 is connected with GND, the other end of the R2 is connected with the grid electrode of the PMOS tube Q4, and the source electrode of the PMOS tube Q4 is connected with the drain electrode of the NMOS tube Q3 and one end of a coupling capacitor Cap 1; the other end of the coupling capacitor Cap1 is connected with the gate of the main switching device Q10; the second holding and conducting circuit comprises an NMOS transistor Q6, a resistor R9 and a resistor R12; the source of the NMOS transistor Q6 is connected to GND, the drain of the NMOS transistor Q6 is connected to the gate of the main switching device Q10, one end of the R12 and the other end of the coupling capacitor Cap1 through a resistor R9, and the gate of the NMOS transistor Q6 is connected to the on-state maintaining main signal main through a resistor R4; one end of the resistor R12 is connected to one end of the R9 and the gate of the main switching device Q10, and the other end of the resistor R12 is connected to the image intensifier off voltage (+ 54.6V).
The high level of the control signals Push1 and Push2 is effective; the low level of the control signals Pull1 and Pull2 is effective; the control signals Push1 and Pull1 are separated by 20-50 ns; the control signals Push2 and Pull2 are separated by 20-50 ns; the control signals Push1 and Pull1 are spaced equally from the control signals Push2 and Pull 2. Preferably, the control signals Push1 and Pull1 are spaced 40ns apart; the interval between the control signals Push2 and Pull2 is 40ns, so that the control signal generating circuits for generating the control signals Push1, Push2, Pull1 and Pull2 are simpler in structure.
In order to realize current limiting and isolation, the utility model also comprises resistors R5 and R6; one end of the R5 is connected with the drain of the NMOS transistor Q3, the source of the PMOS transistor Q4 and one end of the coupling capacitor Cap1, and the other end of the R5 is connected with a bias voltage Net47.9V; one end of R6 is connected with the drain of NMOS transistor Q1, one end of coupling capacitors C8 and C9 and the source of PMOS transistor Q2, and the other end of R6 is connected with GND.
The utility model discloses a working process and principle as follows:
when the image intensifier is not in operation, the output (output) of the shutter of the intensifier is required to output about +50V voltage to prevent the photoelectrons from moving from the cathode to the microchannel plate; when the image intensifier is in operation, the output of the intensifier shutter is required to output a voltage of about-200V to accelerate the photoelectrons from the cathode to the microchannel plate.
According to the above description, when the image intensifier does not operate, the main switching device Q10 is in a conducting state, so that the output terminal (output) is connected to the image intensifier turn-off voltage (+54.6V), and a voltage of about +50V is output;
when the image intensifier needs to work, firstly, the NMOS transistor Q6 is turned off rapidly, so that the output terminal (output) is disconnected from the image intensifier closing voltage (+54.6V), then the NMOS transistor Q1 and the PMOS transistor Q2 are responsible for generating a positive pulse with the amplitude being greater than or equal to 45V and the pulse width being less than or equal to 40ns (after the Q2 is just turned on, so that the source voltage of the Q2 rises to 45V and lasts for 40ns, the Q1 is turned on, so that the source voltage of the Q2 is dropped to the ground, so that a positive pulse of 45V and 40ns is generated), and the positive pulse is coupled to the gate of the main switching device Q9 through the coupling capacitors C8 and C9, so that the main switching device Q9 is turned on rapidly within 3ns and keeps on state through the first maintaining conducting circuit responsible for the PMOS transistor Q5, so that the output terminal (output) and the image intensifier opening voltage (-202V) are continuously connected, and the image intensifier is opened;
when the image intensifier needs to be closed, firstly, the PMOS transistor Q5 is turned off rapidly, so that the output terminal (output) is disconnected from the image intensifier opening voltage (-202V), then the NMOS transistor Q3 and the PMOS transistor Q4 are responsible for generating a negative pulse with a pulse width of 40ns or less and an amplitude of 45V or more (after the Q4 is turned on to raise the source voltage to 45V and lasts for 40ns, the Q3 is turned on to lower the source voltage of the Q4 to ground, so that a negative pulse of 45V and 40ns is generated), and the negative pulse is coupled to the gate of the main switching device Q10 through the coupling capacitor C7, so that the main switching device Q10 is turned on rapidly within 3ns and is kept in a conducting state through a second conducting circuit responsible for the NMOS transistor Q6, so that the output terminal (output) is turned on again with the image intensifier closing voltage (+54.6V), and the image intensifier finishes a pulse working process.
And (3) experimental verification:
the main switch device Q9 adopts the NMOS pipe that the model is ZVN4524, and main switch device Q10 adopts the PMOS pipe that the model is ZVP4525, and the simulation result is shown in fig. 2, 3, can see the utility model discloses can realize narrowest 3 ns's output, also can realize 1 ms's output.
Claims (10)
1. A wide time range continuously adjustable image intensifier shutter characterized by:
comprises main switching devices Q9, Q10, a first driving circuit for driving the main switching device Q9, and a second driving circuit for driving the main switching device Q10;
the main switching devices Q9 and Q10 both adopt field effect transistors;
the main function of the main switching device Q9 is to open quickly to form the high-speed falling edge of the shutter pulse;
the main function of the main switching device Q10 is to open quickly to form a high-speed rising edge of the shutter pulse.
2. The wide time range continuously adjustable image intensifier shutter as recited in claim 1, further comprising: the main switching device Q9 adopts an NMOS tube, the grid electrode is connected with the output of the first drive circuit, the source electrode is connected with the first bias circuit, and the drain electrode is connected with the output end of the whole image intensifier shutter;
the main switching device Q10 adopts a PMOS tube, the grid electrode is connected with the output of the second driving circuit, the drain electrode is connected with the second biasing circuit, and the source electrode is connected with the output end of the whole image intensifier shutter;
the first driving circuit comprises a first quick-on pulse generating circuit, a first maintaining-on circuit and coupling capacitors C8 and C9 which are connected in parallel; the first fast turn-on pulse generating circuit comprises an NMOS transistor Q1 and a PMOS transistor Q2; the grid electrode of the NMOS tube Q1 is connected with a control signal Push1, the drain electrode of the NMOS tube Q1 is connected with one end of the coupling capacitors C8 and C9, and the source electrode of the NMOS tube Q1 is connected with GND; the grid electrode of the PMOS tube Q2 is connected with a control signal Pull1, the drain electrode of the PMOS tube Q2 is connected with the turn-off voltage of the image intensifier, and the source electrode of the PMOS tube Q2 is connected with the drain electrode of the NMOS tube Q1 and one end of each of the coupling capacitors C8 and C9; the other ends of the coupling capacitors C8 and C9 are connected with the gate of the main switching device Q9; the first maintaining and conducting circuit comprises a PMOS tube Q5, resistors R7, R10 and R11; the drain electrode of the PMOS tube Q5 is connected with a conduction bias voltage, the source electrode of the PMOS tube Q5 is connected with the grid electrode of the main switching element Q9 through resistors R7 and R10, and the grid electrode of the PMOS tube Q5 is connected with a conduction maintaining main signal main through a resistor R3; one end of the resistor R11 is connected with one end of the R10 and the grid of the main switching device Q9, and the other end of the resistor R11 is connected with the image intensifier turn-on voltage;
the second driving circuit comprises a second quick-on pulse generating circuit, a second maintaining-on circuit and a coupling capacitor Cap 1; the second fast turn-on pulse generating circuit comprises an NMOS transistor Q3 and a PMOS transistor Q4; the grid electrode of the NMOS tube Q3 is connected with a control signal Push2, the drain electrode of the NMOS tube Q3 is connected with one end of a coupling capacitor Cap1, and the source electrode of the NMOS tube Q3 is connected with GND; the grid electrode of the PMOS tube Q4 is connected with a control signal Pull2, the drain electrode of the PMOS tube Q4 is connected with the turn-off voltage of the image intensifier, and the source electrode of the PMOS tube Q4 is connected with the drain electrode of the NMOS tube Q3 and one end of a coupling capacitor Cap 1; the other end of the coupling capacitor Cap1 is connected with the gate of the main switching device Q10; the second holding and conducting circuit comprises an NMOS transistor Q6, a resistor R9 and a resistor R12; the source of the NMOS transistor Q6 is connected to GND, the drain of the NMOS transistor Q6 is connected to the gate of the main switching device Q10, one end of the R12 and the other end of the coupling capacitor Cap1 through a resistor R9, and the gate of the NMOS transistor Q6 is connected to the on-state maintaining main signal main through a resistor R4; one end of the resistor R12 is connected with one end of the R9 and the grid of the main switching device Q10, and the other end of the resistor R12 is connected with the image intensifier turn-off voltage;
the high level of the control signals Push1 and Push2 is effective; the low level of the control signals Pull1 and Pull2 is effective;
the control signals Push1 and Pull1 are separated by 20-50 ns; the control signals Push2 and Pull2 are separated by 20-50 ns; the control signals Push1 and Pull1 are spaced equally from the control signals Push2 and Pull 2.
3. The wide time range continuously adjustable image intensifier shutter as recited in claim 2, further comprising: the first drive circuit further comprises a first filter circuit composed of R1 and C1; one end of R1 is connected with the drain of PMOS transistor Q2, and the other end is connected with the grid of PMOS transistor Q2; one end of the C1 is connected with the drain of the PMOS tube Q2 and the turn-off voltage of the image intensifier, and the other end is connected with GND.
4. The wide time range continuously adjustable image intensifier shutter as recited in claim 2 or 3, characterised in that: the second drive circuit further comprises a second filter circuit composed of R2 and C2; one end of R2 is connected with the drain of PMOS transistor Q4, and the other end is connected with the grid of PMOS transistor Q4; one end of the C2 is connected with the drain of the PMOS tube Q4 and the turn-off voltage of the image intensifier, and the other end is connected with GND.
5. The wide time range continuously adjustable image intensifier shutter as recited in claim 4, further comprising: the filter voltage stabilizing circuit is connected with the first bias circuit in parallel; the filtering voltage stabilizing circuit is composed of capacitors C11 and C12 which are connected in parallel, one ends of the capacitors C11 and C12 are connected with the source electrode of the main switch device Q9, and the other ends of the capacitors C11 and C12 are connected with GND.
6. The wide time range continuously adjustable image intensifier shutter as recited in claim 5, further comprising: the voltage stabilizing circuit is connected with the second bias circuit in parallel; the voltage stabilizing circuit is a capacitor Cap2, one end of the capacitor Cap2 is connected with the drain electrode of the main switching device Q10, and the other end is connected with GND.
7. The wide time range continuously adjustable image intensifier shutter as recited in claim 2, further comprising: the first biasing circuit comprises resistors R13, R15 and a diode DZ 1; one end of the resistor R13 is connected with the source of the main switching device Q9, the other end is connected with one end of R15, and the other end of R15 is connected with GND; the diode DZ1 has its cathode connected to the source of the main switching device Q9 and its anode connected to the image intensifier turn-on voltage.
8. The wide time range continuously adjustable image intensifier shutter as recited in claim 2, further comprising: the second biasing circuit comprises resistors R14, R8 and a diode DZ 2; one end of the resistor R14 is connected with the drain of the main switching device Q10, the other end is connected with one end of R8, and the other end of R8 is connected with GND; the anode of the diode DZ2 is connected to the drain of the main switching device Q10, and the cathode is connected to the image intensifier turn-off voltage.
9. The wide time range continuously adjustable image intensifier shutter as recited in claim 2, further comprising: the main switching device Q9 adopts an NMOS transistor with the model number ZVN4524, and the main switching device Q10 adopts a PMOS transistor with the model number ZVP 4525.
10. The wide time range continuously adjustable image intensifier shutter as recited in claim 2, further comprising: the control signals Push1 and Pull1 are separated by 40 ns; the control signals Push2 and Pull2 are spaced 40ns apart.
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| CN201920954289.9U CN210120539U (en) | 2019-06-24 | 2019-06-24 | Wide time range continuous adjustable image intensifier shutter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110289834A (en) * | 2019-06-24 | 2019-09-27 | 中国科学院西安光学精密机械研究所 | A kind of continuously adjustable image intensifier shutter of width time range |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110289834A (en) * | 2019-06-24 | 2019-09-27 | 中国科学院西安光学精密机械研究所 | A kind of continuously adjustable image intensifier shutter of width time range |
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