CN110246899B - 一种具有双层侧墙结构的纳米片环栅场效应晶体管 - Google Patents
一种具有双层侧墙结构的纳米片环栅场效应晶体管 Download PDFInfo
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Abstract
本发明公开了一种具有双层侧墙结构的纳米片环栅场效应晶体管,该器件具有两层侧墙,靠近纳米片沟道的侧墙使用低介电常数(简称为low‑k)和高热导率的材料,远离纳米片沟道的侧墙使用介电常数较高(简称为high‑k)的材料。low‑k材料构成的侧墙有利于器件的散热,high‑k材料沟道的侧墙有利于加强器件栅极和沟道之间耦合作用,从而保证器件在较大的开态电流下仍然具有较好的散热作用。此外,通过改变low‑k材料与high‑k材料的厚度比例,可以灵活调控器件的散热能力和直流性能。
Description
技术领域
本发明属于CMOS超大规模集成电路(VLSI)中场效应晶体管逻辑器件技术领域,尤其是一种具有双层侧墙结构的纳米片环栅场效应晶体管及其制备方法。
背景技术
当半导体工艺节点发展到纳米量级,为了满足晶体管特征尺寸缩减的要求,鳍型场效应晶体管(Fin Field-Effect Transistor,简称为FinFET)“fin”的高宽比不断增大,这对FinFET器件的制造工艺和抑制短沟道效应的能力均带来了极大的挑战。为了能够推动半导体器件往更小的工艺节点发展,堆叠式纳米片环栅场效应晶体管(Stacked NanosheetGate-All-Around Field-Effect Transistor,简称为NS-GAAFET)以其优秀的栅控能力和可灵活调节的纳米片沟道宽度,已成为未来5纳米及以下工艺节点的首选器件。然而,由于纳米片结构超薄的厚度,加剧了声子的边界散射作用,使得纳米片材料的热导率远小于本征材料;三维器件结构限制了器件的散热能力;功率密度的增大,加剧了器件的产热。综上分析,NS-GAAFET器件的自热效应(Self-Heating Effect,简称为SHE)加剧。同时,为了进一步增强栅控能力,增强栅极与沟道的耦合作用,增大器件的开态电流,有研究人员指出使用高介电常数的侧墙材料降低源漏寄生电阻。然而,对于二氧化铪等高介电常数材料,其热导率也相对较低,因此使用高介电常数的侧墙材料会进一步加剧器件的自热效应。
发明内容
本发明针对目前已有的使用二氧化铪等高介电常数材料的纳米片环栅场效应晶体管的自热效应严重的问题,在器件仍有较大开态电流的基础上,缓解器件的自热效应,提出了一种具有双层侧墙结构的纳米片环栅场效应晶体管。通过调节双层侧墙结构中低介电常数(low-k)侧墙和高介电常数(high-k)侧墙的厚度,可在对开态电流无明显影响的基础上,有效地缓解器件的自热效应,减轻由自热效应带来的器件可靠性的问题。
实现本发明的具体技术方案是:
一种具有双层侧墙结构的纳米片环栅场效应晶体管,该晶体管包括:纳米片沟道区、栅极介质层、栅极金属层、衬底、抬升源极、抬升漏极、源端low-k侧墙、源端high-k侧墙、漏端low-k侧墙及漏端high-k侧墙,所述纳米片沟道区由垂直堆叠的数个沟道构成,垂直堆叠的各沟道外围沿水平方向依次设置源端low-k侧墙、栅极介质层和漏端low-k侧墙;所述栅极介质层为数层,所述栅极介质层的数量与沟道的数量相同,且各层不接触;所述源端low-k侧墙为数层,所述源端low-k侧墙的数量与沟道的数量相同,且各层不接触;所述漏端low-k侧墙为数层,所述漏端low-k侧墙的数量与沟道的数量相同,且各层不接触;所述栅极金属层设置在栅极介质层各层四周,且与衬底上表面接触;所述抬升源极、抬升漏极分别设于纳米片沟道区两侧,且位于衬底上表面;所述源端high-k侧墙,位于栅极金属层和抬升源极之间、设置于源端low-k侧墙各层四周,且与衬底上表面接触;所述漏端high-k侧墙,位于栅极金属层和抬升漏极之间、设置于漏端low-k侧墙各层四周,且与衬底上表面接触;
所述衬底的结构为体硅、绝缘层上硅(SOI,silicon on isolator)或绝缘层上锗(GOI,germanium on isolator);
所述衬底的材料为硅、锗元素半导体或者其他化合物半导体,例如III-V族化合物半导体GaAs;
所述垂直堆叠纳米片沟道为硅纳米片、锗纳米片、锗硅纳米片、砷化镓纳米片或氧化锌纳米片;
所述源端low-k侧墙和漏端low-k侧墙的厚度和使用的材料类型相同,为低介电常数和高热导率介质材料,为氮化硅或氧化铝。
所述源端high-k侧墙和漏端high-k侧墙的厚度和使用的材料类型相同,为高介电常数材料二氧化铪、氧化钛、五氧化二钽或二氧化锆。
所述抬升源极和抬升漏极为元素半导体硅或锗、半导体合金材料锗硅或III-V族化合物半导体材料GaAs。
所述栅极介质层为二氧化铪、氧化钛、二氧化硅、氮化硅、氧化铝、五氧化二钽或二氧化锆。
所述栅极金属层为氮化钛、铝或多晶硅。
本发明提出的侧墙结构的纳米片环栅场效应晶体管中,所述源端low-k侧墙和漏端low-k侧墙的厚度与所述源端high-k侧墙和漏端high-k侧墙的厚度通过改变沉积次数来控制,从而满足对于器件不同散热能力和直流性能的需求。
本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管中,由于双层侧墙中high-k材料的存在,增强了栅极与沟道的耦合作用,进一步加强了器件的栅控能力,使得器件的开态电流得以提升;同时,由于双层侧墙中low-k材料的存在,有效地降低了器件的热阻,缓解了器件的自热效应。
附图说明
图1为本发明实施例结构示意图;
图2为图1中A-A处截面图;
图3为图1中B-B处截面图;
图4为图1中C-C处截面图;
图5为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤一所制造的成品示意图;
图6为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤二所制造的成品示意图;
图7为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤三所制造的成品示意图;
图8为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤四所制造的成品示意图;
图9为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤五所制造的成品示意图;
图10为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤六所制造的成品示意图;
图11为依照本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的方法步骤七所制造的成品示意图;
图12为本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的核心工艺步骤平面示意图;
图13为本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管与传统单层high-k侧墙结构的纳米片环栅场效应晶体管的性能对比图。
具体实施方式
以下结合附图及实施例对本发明进行详细描述。
实施例
本实施例以沟道区为垂直堆叠三层为例。
参考图1到图4,本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管包含以下结构:纳米片沟道区3a、3b、3c、栅极介质层11a、11b、11c、栅极金属层12、衬底1、抬升源极10a、抬升漏极10b、源端low-k侧墙8a、8c、8e、源端high-k侧墙9a、漏端low-k侧墙8b、8d、8f及漏端high-k侧墙9b,所述纳米片沟道区3a、3b、3c由垂直堆叠的三个沟道构成,垂直堆叠的各沟道外围沿水平方向依次设置源端low-k侧墙8a、8c、8e、栅极介质层11a、11b、11c和漏端low-k侧墙8b、8d、8f;所述栅极介质层11a、11b、11c为三层,且各层不接触;所述源端low-k侧墙8a、8c、8e为三层,且各层不接触;所述漏端low-k侧墙8b、8d、8f为三层,且各层不接触;所述栅极金属层12设置在栅极介质层11a、11b、11c各层四周,且与衬底1上表面接触;所述抬升源极10a、抬升漏极10b分别设于纳米片沟道区3a、3b、3c两侧,且位于衬底1上表面;所述源端high-k侧墙9a,位于栅极金属层12和抬升源极10a之间、设置于源端low-k侧墙8a、8c、8e各层四周,且与衬底1上表面接触;所述漏端high-k侧墙9b,位于栅极金属层12和抬升漏极10b之间、设置于漏端low-k侧墙8b、8d、8f各层四周,且与衬底1上表面接触;。
关于本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的详细工艺制造步骤请参阅图5~11,该器件所需的核心工艺步骤详见图12,具体步骤如下:
步骤一:如图5所示,形成锗硅2a、硅3a、锗硅2b、硅3b、锗硅2c、硅3c鳍型堆叠结构和多晶硅临时栅4。该步工艺的具体实施步骤为:①在衬底1上依次沉积半导体材料锗硅2a、硅3a、锗硅2b、硅3b、锗硅2c、硅3c;②在顶部硅层3c上沉积掩膜,并对掩膜进行光刻、刻蚀,保留所需鳍型堆叠结构区域上方的掩膜;③利用步骤②中保留的掩膜,对步骤①中沉积的半导体材料进行刻蚀,形成锗硅2a、硅3a、锗硅2b、硅3b、锗硅2c、硅3c鳍型堆叠结构,其中硅层3a、3b、3c后续作为沟道使用;④刻蚀去除顶部硅层3c上的掩膜;⑤在顶部硅层3c上沉积一层多晶硅;⑥在多晶硅上沉积掩膜,并对掩膜进行光刻、刻蚀,保留沟道区域上方的多晶硅;⑦利用步骤⑥中保留的掩膜,对多晶硅进行刻蚀,去除两侧多余的多晶硅材料,形成多晶硅临时栅4;⑧刻蚀去除多晶硅临时栅4上的掩膜。本发明选用体硅材料作为衬底,也可以选用绝缘层上硅(SOI)作为衬底。
步骤二:如图6所示,形成顶部地介电常数(low-k)侧墙5a、5b和顶部高介电常数(high-k)侧墙6a、6b,并形成牺牲层7a、7b、7c。该步工艺的具体实施步骤为:①在顶部硅层的上方、多晶硅临时栅4两侧沉积一层侧墙,其材质为氮化硅等介电常数较低和热导率较高的材料,形成顶部low-k侧墙5a、5b;②在上述第①步中形成的low-k侧墙5a、5b的上方、多晶硅临时栅4两侧衬底一层侧墙,其材质为二氧化铪等高介电常数的材料;③通过化学机械抛光(Chemical Mechanical Polish,CMP)工艺方法,去除多晶硅临时栅4上方多余的高介电常数材料,从而形成顶部high-k侧墙6a、6b,并保证顶部high-k侧墙6a、6b与多晶硅临时栅4等高;④沉积掩膜,对掩膜进行光刻、刻蚀,使得掩膜的形状与鳍型堆叠结构相同,即保留鳍型堆叠结构上方的掩膜;⑤利用掩膜对顶部low-k侧墙和顶部high-k侧墙进行刻蚀,去除鳍型堆叠结构两侧多余low-k和high-k材料,使得顶部low-k侧墙和顶部high-k侧墙的边界与鳍型堆叠结构的边界平齐;⑥刻蚀去除掩膜;⑦通过各向异性选择性刻蚀的方法,将鳍型堆叠结构中的部分锗硅材料选择性刻蚀,刻蚀深度与顶部low-k侧墙5a、5b和顶部high-k侧墙6a、6b的宽度相等,形成牺牲层7a、7b、7c。
步骤三:如图7所示,形成源端low-k侧墙8a、8c、8e和漏端low-k侧墙8b、8d、8f。该步工艺的具体实施步骤为:①在顶部low-k侧墙5a、5b下方,在沟道硅层3a、3b、3c与牺牲层7a、7b、7c的非交叠区,沉积形成包围沟道硅层3a、3b、3c的侧墙,其材质为氮化硅等低介电常数和高热导率的材料,从而形成源端low-k侧墙8a、8b、8c和漏端low-k侧墙8b、8d、8f,此时由于顶部low-k侧墙5a、5b与该步骤中形成的源端low-k侧墙8e和漏端low-k侧墙8f连接,因此之后统一使用8e、8f表示该部分low-k侧墙。
步骤四:如图8所示,形成源端high-k侧墙9a和漏端high-k侧墙9b。该步工艺的具体实施步骤为:①在源漏low-k侧墙8a、8c、8e和漏端low-k侧墙8b、8d、8f四周沉积high-k侧墙,其材质为二氧化铪等高介电常数的材料;②通过CMP工艺方法,去除多晶硅临时栅4上方多余的高介电常数材料,从而high-k侧墙与多晶硅临时栅4等高;③沉积掩膜,对掩膜进行光刻、刻蚀,保留沟道硅层3a、3b、3c与牺牲层7a、7b、7c的非交叠区上下前后四个方向上的高介电常数材料,并保证high-k侧墙的宽度与设计的源极和漏极的宽度相等;④利用掩膜对high-k侧墙进行刻蚀,使得high-k侧墙的边界与鳍型堆叠结构的边界平齐,形成源端high-k侧墙9a和漏端high-k侧墙9b;⑤刻蚀去除掩膜。
步骤五:如图9所示,形成抬升源区10a和抬升漏区10b。该步工艺的具体实施步骤为:①在源端high-k侧墙9a的左侧和漏端high-k侧墙9b的右侧各选择性外延生长一层半导体材料,其材质可以为硅等元素半导体材料,也可为锗硅等半导体合金材料;②沉积掩膜,并对掩膜进行光刻、刻蚀;③利用掩膜对第②步中生长的半导体材料进行刻蚀,形成抬升源区10a和抬升漏区10b;④刻蚀去除掩膜;⑤对抬升源区10a和抬升漏区10b进行掺杂,对于N型器件可使用砷、磷等V族元素原子进行掺杂,对于P型器件可使用硼等III族元素原子进行掺杂;⑥在抬升源区10a和抬升漏区10b上方沉积金属层,其材质可以为镍、钴等金属材料;⑦实行自对准硅化物工艺(Salicide),使抬升源区10a和抬升漏区10b的半导体材料与金属反应形成金属硅化物,随后刻蚀去除未反应的金属层,可得到由金属硅化物构成的抬升源区10a和抬升漏区10b。
步骤六:如图10所示,去除牺牲层7a、7b、7c和多晶硅临时栅4,形成栅介质层11a、11b、11c。该步工艺的具体实施步骤为:①通过各向异性选择性刻蚀的方法,去除牺牲层7a、7b、7c;②刻蚀去除多晶硅临时栅4;③在硅沟道3a、3b、3c的四周沉积栅介质层11a、11b、11c,其材质为二氧化铪等高介电常数的材料。
步骤七:如图11所示,形成栅极金属层12。该步工艺的具体实施步骤为:在源端high-k侧墙9a和漏端high-k侧墙9b之间沉积栅极金属层,其材质可以为铜、铝、氮化钛等金属材料。
上述工艺流程与目前业界普遍使用的后栅工艺(gate-last)制备纳米片环栅场效应晶体管的工艺流程大致相同,主要区别在于步骤二、步骤三、步骤四。图12用为本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管的核心工艺步骤平面示意图。
在使用上述工艺制备器件时,可通过改变沉积过程中的沉积次数来精确控制器件的源端low-k侧墙8a、8c、8e和漏端low-k侧墙8b、8d、8f的厚度,而low-k侧墙的厚度与器件的散热能力和直流性能密切相关。参阅附图13,图中的双层侧墙结构中low-k侧墙的厚度为0.4nm,相较于传统单high-k侧墙结构的纳米片环栅场效应晶体管,本发明提出的具有双层侧墙结构的纳米片环栅场效应晶体管在保持开态电流不变的基础上,热阻约减小了6%。这是由于low-k侧墙的存在,有效地缓解了器件的自热效应。
Claims (2)
1.一种具有双层侧墙结构的纳米片环栅场效应晶体管,其特征在于,该晶体管包括:纳米片沟道区、栅极介质层、栅极金属层、衬底、抬升源极、抬升漏极、源端low-k侧墙、源端high-k侧墙、漏端low-k侧墙及漏端high-k侧墙,所述纳米片沟道区由垂直堆叠的数个沟道构成,垂直堆叠的各沟道外围沿水平方向依次设置源端low-k侧墙、栅极介质层和漏端low-k侧墙;所述栅极介质层为数层,所述栅极介质层的数量与沟道的数量相同,且各层不接触;所述源端low-k侧墙为数层,所述源端low-k侧墙的数量与沟道的数量相同,且各层不接触;所述漏端low-k侧墙为数层,所述漏端low-k侧墙的数量与沟道的数量相同,且各层不接触;所述栅极金属层设置在栅极介质层各层四周,且与衬底上表面接触;所述抬升源极、抬升漏极分别设于纳米片沟道区两侧,且位于衬底上表面;所述源端high-k侧墙,位于栅极金属层和抬升源极之间、设置于源端low-k侧墙各层四周,且与衬底上表面接触;所述漏端high-k侧墙,位于栅极金属层和抬升漏极之间、设置于漏端low-k侧墙各层四周,且与衬底上表面接触;
所述衬底的结构为体硅、绝缘层上硅或绝缘层上锗;
所述垂直堆叠的纳米片沟道为硅纳米片、锗纳米片、锗硅纳米片、砷化镓纳米片或氧化锌纳米片;
所述源端low-k侧墙和漏端low-k侧墙的厚度和使用的材料类型相同,为低介电常数和高热导率介质材料,为氮化硅或氧化铝;
所述源端high-k侧墙和漏端high-k侧墙的厚度和使用的材料类型相同,为高介电常数材料,为二氧化铪、氧化钛、五氧化二钽或二氧化锆;
所述抬升源极和抬升漏极为元素半导体硅或锗、半导体合金材料锗硅或III-V族化合物半导体材料GaAs;
所述栅极介质层为二氧化铪、氧化钛、二氧化硅、氮化硅、氧化铝、五氧化二钽或二氧化锆;
所述栅极金属层为氮化钛、铝或多晶硅。
2.根据权利要求1所述的双层侧墙结构的纳米片环栅场效应晶体管,其特征在于,所述源端low-k侧墙和漏端low-k侧墙的厚度与所述源端high-k侧墙和漏端high-k侧墙的厚度通过改变沉积次数来控制,从而满足对于器件不同散热能力和直流性能的需求。
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