CN110174787A - Array substrate and preparation method thereof and display device - Google Patents
Array substrate and preparation method thereof and display device Download PDFInfo
- Publication number
- CN110174787A CN110174787A CN201910369927.5A CN201910369927A CN110174787A CN 110174787 A CN110174787 A CN 110174787A CN 201910369927 A CN201910369927 A CN 201910369927A CN 110174787 A CN110174787 A CN 110174787A
- Authority
- CN
- China
- Prior art keywords
- electrode
- sub
- public
- pixel
- tft
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Geometry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention proposes embodiment and has supplied a kind of array substrate and preparation method thereof and display device.The array substrate includes underlay substrate and the scan line that is arranged on the underlay substrate, data line, public electrode wire and multiple pixel units, the pixel unit includes thin film transistor (TFT), main pixel electrode, sub-pixel electrode and public electrode, and the region between the main pixel electrode of at least one pixel unit and the sub-pixel electrode of pixel unit adjacent thereto is not provided with public electrode, to reduce interference of the voltage of public electrode to the region between the main pixel electrode of the pixel unit and the sub-pixel electrode of pixel unit adjacent thereto, to solve the problems, such as to generate dark line because liquid crystal is caused to be oriented to disorder for public electrode, improve the light transmittance in the region, and then improve image display quality.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of array substrate and preparation method thereof and display devices.
Background technique
Liquid crystal display at present (Liquid Crystal Display, LCD) device is one of most widely used display,
LCD includes being provided with field a pair of of panel of electrode such as pixel electrode and public electrode occurs and is arranged between two panels
Liquid crystal layer shows up when application voltage and electrode occurs to generate electric field in the liquid crystal layer, and liquid crystal molecule carries out under electric field action
Deflection, it is possible thereby to which the transmission situation for controlling light makes LCD show image.Liquid crystal display includes twisted-nematic (Twisted
Nematic, TN) mode, birefringent (Electrically Controlled Birefringence, the ECB) mould of electronic control
The various modes such as formula, vertical orientation (Vertical Alignment, VA) mode, wherein VA mode is a kind of with high comparison
Degree, wide viewing angle, the common display pattern without advantages such as friction matchings, but pixel would generally be due to liquid crystal molecule in VA mode
It is oriented to bad and generates dark line, seriously affected the light transmission rate of display panel.
In order to promote the performance of panel visual angle, vertical arrangement (the Polmer Stabilized of polymer stabilizing
Vertivally Aligned, PSVA) type pixel is gradually applied to the design of large size TV panel, but in the PSVA type pixel
There are dark lines in design, have seriously affected image quality.
Summary of the invention
Based on this, it is necessary to there is dark line in the design of PSVA type pixel, provide a kind of array substrate and its
Production method and display device.
The present invention provides a kind of array substrate, the array substrate includes underlay substrate and is arranged in the substrate base
Scan line, data line, public electrode wire and multiple pixel units on plate, the pixel unit include that at least two films are brilliant
The scan line is arranged in body pipe, main pixel electrode, sub-pixel electrode and public electrode, at least two thin film transistor (TFT)
Top is electrically connected with the main pixel electrode and the sub-pixel electrode respectively, the main pixel electrode and sub-pixel electricity
Pole is separately positioned on the two sides of the scan line, and the main pixel electrode of at least one pixel unit and adjacent thereto
Region between the sub-pixel electrode of pixel unit is not provided with public electrode.
The public electrode includes that the orthogonal first public sub-electrode and second are public in one of the embodiments,
Sub-electrode, and the first public sub-electrode is parallel with the data line；
In same pixel unit, on the extending direction of the described first public sub-electrode, the first public sub-electrode
Distal end the distal end for sinking to the bottom on substrate projection and the main pixel electrode between the projection on the underlay substrate away from
From being 5~8 μm, wherein the distal end of the first public sub-electrode is one of the described first public sub-electrode far from the scan line
End, the described one end of main pixel electrode far from the scan line in the distal end of the main pixel electrode.
In one of the embodiments, the main pixel electrode and the sub-pixel electrode include peripheral join, it is more
A strip trunk and multiple strip pixel sub-electrodes with the Truck Connection, the trunk include orthogonal horizontal main
The pixel unit is divided into multiple display farmland areas, the picture by dry and vertical trunk, the horizontal trunk and the vertical trunk
Sub-prime electrode is located in the display farmland area；
The trunk of the pixel electrode covers the public electrode, and the distal end of the vertical trunk of the main pixel and therewith
Projector distance of the distal end of the corresponding first public sub-electrode on the underlay substrate is 5~8 μm, wherein the main picture
The distal end of the vertical trunk of element is the vertical trunk of the main pixel far from one end of the scan line.
The distal end of the vertical trunk of the main pixel and corresponding described first public in one of the embodiments,
Projector distance of the distal end of sub-electrode on the underlay substrate is 6 μm.
The pixel unit includes first film transistor, the second thin film transistor (TFT) and in one of the embodiments,
Three thin film transistor (TFT)s；
The source electrode of the first film transistor is connect with the data line, the drain electrode of the first film transistor and institute
Main pixel electrode connection is stated, for providing data drive signal for the main pixel electrode；
The source electrode of second thin film transistor (TFT) is connect with the data line, the drain electrode of second thin film transistor (TFT) and institute
The connection of sub-pixel electrode is stated, for providing data drive signal for the sub-pixel electrode；
The source electrode of the source electrode of the third thin film transistor (TFT) and second thin film transistor (TFT), the third thin film transistor (TFT)
Drain electrode connect with the public electrode wire, for the voltage for the data drive signal on the sub-pixel electrode.
It is the grid of the first film transistor, described in one of the embodiments, in a pixel unit
The grid of second thin film transistor (TFT) connects same scan line with the grid of the third thin film transistor (TFT), and the first film is brilliant
The drain electrode of body pipe connects same data line with the drain electrode of second thin film transistor (TFT).
The conductive ditch of first formed between the source electrode and drain electrode of the first film transistor in one of the embodiments,
Road be it is U-shaped, the second conducting channel formed between the source electrode and drain electrode of second thin film transistor (TFT) be it is U-shaped, the third is thin
The third conducting channel formed between the source electrode and drain electrode of film transistor is "-" type.
Based on the same inventive concept, the embodiment of the invention also provides a kind of production method of array substrate, the methods
Include the steps that forming scan line, data line, public electrode and public electrode wire, form the step of at least two thin film transistor (TFT)s
And the step of forming main pixel electrode and sub-pixel electrode, forming thin film transistor (TFT) includes forming grid, source electrode, draining and have
The step of active layer, wherein the top of the scan line is arranged at least two thin film transistor (TFT), respectively with the main pixel
Electrode and sub-pixel electrode electrical connection, the main pixel electrode and the sub-pixel electrode are separately positioned on the scan line
Two sides, and between the main pixel electrode of at least one pixel unit and the sub-pixel electrode of pixel unit adjacent thereto
Region be not provided with public electrode.
The public electrode includes that the orthogonal first public sub-electrode and second are public in one of the embodiments,
Sub-electrode, and the first public sub-electrode is parallel with the data line；
On the extending direction of the described first public sub-electrode, the distal end of the first public sub-electrode sinks to the bottom base described
Projection is 5~8 μm at a distance from the distal end of the main pixel electrode is between the projection on the underlay substrate on plate, wherein institute
The distal end for stating the first public sub-electrode is described first one end of public sub-electrode far from the scan line, the main pixel electrode
The described one end of main pixel electrode far from the scan line in distal end.
Based on the same inventive concept, the present invention also provides a kind of display device, the display device includes any of the above-described
Array substrate described in claim.
To sum up, the present invention proposes embodiment and has supplied a kind of array substrate and preparation method thereof and display device.The array base
Plate includes underlay substrate and the scan line being arranged on the underlay substrate, data line, public electrode wire and multiple pixels
Unit, the pixel unit includes at least two thin film transistor (TFT)s, main pixel electrode, sub-pixel electrode and public electrode, described
The top of the scan line is arranged at least two thin film transistor (TFT)s, respectively with the main pixel electrode and the sub-pixel electrode
Electrical connection, the main pixel electrode and the sub-pixel electrode are separately positioned on the two sides of the scan line, and at least one
Region between the main pixel electrode of the pixel unit and the sub-pixel electrode of pixel unit adjacent thereto is not provided with public
Electrode.In the present invention, between the main pixel electrode of the pixel unit and the sub-pixel electrode of pixel unit adjacent thereto
Region is not provided with public electrode, therefore reduces the voltage of public electrode to the main pixel electrode of the pixel unit and therewith phase
The interference in the region between the sub-pixel electrode of adjacent pixel unit, to solve because public electrode causes liquid crystal to be oriented to disorder
And dark line is led to the problem of, the light transmittance in the region is improved, and then improve image display quality.
Detailed description of the invention
Fig. 1 is a kind of top view of array substrate provided in an embodiment of the present invention；
Fig. 2 is a kind of the schematic diagram of the section structure of array substrate provided in an embodiment of the present invention；
Fig. 3 is the top view of another array substrate provided in an embodiment of the present invention；
Fig. 4 between adjacent pixel unit provided in an embodiment of the present invention without public electrode when and there are electricity when public electrode
Field pattern schematic diagram.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.Many details are explained in the following description in order to fully understand this hair
It is bright.But the invention can be embodied in many other ways as described herein, those skilled in the art can be not
Similar improvement is done in the case where violating intension of the present invention, therefore the present invention is not limited to the specific embodiments disclosed below.
The embodiment of the invention provides a kind of array substrates, please refer to Fig. 1 and Fig. 2, and the array substrate includes substrate base
Plate 900 and the scan line 100 being arranged on the underlay substrate 900, data line 200, public electrode wire 300 and multiple pictures
Plain unit, the pixel unit include at least two thin film transistor (TFT)s, main pixel electrode 400, sub-pixel electrode 500 and common electrical
The top of the scan line 100 is arranged in pole 600, at least two thin film transistor (TFT), respectively with the main pixel electrode 400
It is electrically connected with the sub-pixel electrode 500, the main pixel electrode 400 and the sub-pixel electrode 500 are separately positioned on described
The two sides of scan line 100, and the main pixel electrode 400 of at least one pixel unit and pixel unit adjacent thereto
Region between sub-pixel electrode 500 is not provided with public electrode 600.
It is appreciated that in the PSVA type pixel design of 3T_8domain, mainly by giving the two of the same sub-pixel
A area's (main (main) pixel region and time (sub) pixel region) applies different voltages, shows the main in the same pixel unit
The rotational angle of the liquid crystal molecule in 4 display farmland areas in the 4 display farmland areas and viewing area sub in area is different, so as to improve color
Inclined problem.But in the design of PSVA type pixel, along the direction that data line 200 extends, between two adjacent pixel units,
Region liquid crystal point between the main pixel electrode 400 and the sub-pixel electrode 500 adjacent with the pixel unit of i.e. one pixel unit
Son is influenced by 600 voltage of public electrode, and generation guiding is bad, to generate dark line.In the present embodiment, by the pixel
Region between the main pixel electrode 400 of unit and the sub-pixel electrode 500 of pixel unit adjacent thereto is not provided with common electrical
Pole 600, to reduce the voltage of public electrode 600 to the liquid crystal molecule between two adjacent pixel units in region
The interference of guiding improves the region to solve the problems, such as that public electrode 600 causes liquid crystal guiding disorder and generates dark line
Interior light transmittance, and then improve image display quality.
Fig. 3 and Fig. 4 are referred in one of the embodiments, and the public electrode 600 includes orthogonal first public
Sub-electrode 610 and the second public sub-electrode (not shown) altogether, and the first public sub-electrode 610 and the data line 200 are flat
Row；In same pixel unit, on the extending direction of the described first public sub-electrode 610, the first public sub-electrode 610
Distal end it is described sink to the bottom projected on substrate with the projection on the underlay substrate 900 of the distal end of the main pixel electrode 400 it
Between distance be 5~8 μm, wherein the distal end of the first public sub-electrode 610 is the described first public sub-electrode 610 far from institute
One end of scan line 100 is stated, the distal end of the main pixel electrode 400 main pixel electrode 400 is far from the scan line 100
One end.
It is appreciated that the array substrate designed for 3T_8domain pixel, passes through the public electrode 600 and the picture
The part of plain electrode crossover forms storage capacitance, and the storage capacitance in the gate off of the thin film transistor (TFT) for maintaining
The driving voltage of pixel unit.The first public sub-electrode 610 corresponds to the main pixel electrode 400 and sub-pixel electricity
Pole 500, thus the sub-pixel electrode 500 of the main pixel electrode 400 of the pixel unit and pixel unit adjacent thereto it
Between region, effect of the liquid crystal molecule by dual common voltage, the bad guiding problem of liquid crystal molecule is serious, and dark line phenomenon also compares
It is more serious.By the way that the distal end of the described first public sub-electrode 610 is inside contracted 5~8 μm in the present embodiment, avoid generating liquid crystal molecule
The phenomenon that by double common voltage, the liquid generated so as to improve the region between the vertical trunk of two adjacent pixel units
The brilliant bad guiding problem of molecule, further increases light transmission rate and image display quality.
The main pixel electrode 400 includes that periphery connects with the sub-pixel electrode 500 in one of the embodiments,
Portion 410, multiple strip trunks 420 and the multiple strip pixel sub-electrodes 430 being connect with the trunk 420, the trunk packet
Include orthogonal horizontal trunk 421 and vertical trunk 422, the horizontal trunk 421 and the vertical trunk 422 are by the picture
Plain unit is divided into multiple display farmland areas, and the pixel sub-electrode 430 is located in the display farmland area.The trunk of the pixel electrode
Cover the public electrode 600, and the distal end of the vertical trunk 422 of the main pixel and the corresponding first public son
Projector distance of the distal end of electrode 610 on the underlay substrate 900 is 5~8 μm, wherein the vertical trunk of the main pixel
422 distal end is the vertical trunk 422 of the main pixel far from one end of the scan line 100.
It is appreciated that the first public sub-electrode 610 described in the present embodiment corresponds to the vertical of the main pixel electrode 400
The vertical trunk 422 of trunk 422 and the sub-pixel electrode 500, therefore in the perpendicular of the main pixel electrode 400 of the pixel unit
Region between the vertical trunk 422 of the sub-pixel electrode 500 of straight trunk 422 and pixel unit adjacent thereto, liquid crystal molecule
By the effect of double common voltage, the bad guiding problem of liquid crystal molecule is than more serious.So can be by public by described first
The distal end of sub-electrode 610 inside contracts 5~8 μm, avoids generating the phenomenon that liquid crystal molecule is by double common voltage, so as to improve adjacent
Two pixel units vertical trunk 422 between region generate the bad guiding problem of liquid crystal molecule, further increase light
Transmitance and image display quality.
The distal end of the vertical trunk 422 of the main pixel and corresponding described first in one of the embodiments,
Projector distance of the distal end of public sub-electrode 610 on the underlay substrate 900 is 6 μm.It is appreciated that public by described first
The distal end of sub-electrode 610 inside contracts 6 μm, and is produced from the region that can effectively reduce between the vertical trunk 422 of two adjacent pixel units
The bad guiding problem of raw liquid crystal molecule, but also main pixel electrode 400 will not be caused because of the first public sub-electrode 610 is too short
Overlapping area between public electrode 600 is too small, causes primary storage capacitor smaller and influences display effect.
The pixel unit includes first film transistor TFT_1, the second thin film transistor (TFT) in one of the embodiments,
TFT_2 and third thin film transistor (TFT) TFT_3；
The source electrode of the first film transistor TFT_1 is connect with the data line 200, the first film transistor
The drain electrode of TFT_1 is connect with the main pixel electrode 400, for providing data drive signal for the main pixel electrode 400；
The source electrode of second thin film transistor (TFT) is connect with the data line 200, the drain electrode of second thin film transistor (TFT)
It is connect with the sub-pixel electrode 500, for providing data drive signal for the sub-pixel electrode 500；
The source electrode of the source electrode of the third thin film transistor (TFT) TFT_3 and the second thin film transistor (TFT) TFT_2, the third
The drain electrode of thin film transistor (TFT) TFT_3 is connect with the public electrode wire 300, for for the data on the sub-pixel electrode 500
The voltage of driving signal.
In one of the embodiments, in a pixel unit, the grid of the first film transistor TFT_1
Pole, the second thin film transistor (TFT) TFT_2 grid connected with the grid of the third thin film transistor (TFT) TFT_3 same scanning
The drain electrode of line 100, the first film transistor TFT_1 connects same with the drain electrode of the second thin film transistor (TFT) TFT_2
Data line 200.
During display, primary storage capacitor, sub-pixel electrode are formed between main pixel electrode 400 and public electrode 600
Time storage capacitance is formed between 500 and public electrode 600.When scan line 100 is opened, first film transistor TFT_1, second
Thin film transistor (TFT) TFT_2 and third thin film transistor (TFT) TFT_3 are opened simultaneously, and data line 200 is to main pixel electrode 400 and sub-pixel
Electrode 500 is filled with data drive signal.Meanwhile third thin film transistor (TFT) TFT_3 is by a part of charge on sub-pixel electrode 500
It is transmitted on public electrode wire 300, so that the voltage at primary storage capacitor both ends is greater than the voltage at the storage capacitance both ends,
And then make the brightness of 500 corresponding region of sub-pixel electrode lower than the brightness of main 400 corresponding region of pixel electrode.Also, main pixel
400 corresponding region of electrode and the deflection angle of liquid crystal molecule in 500 corresponding region of sub-pixel electrode are also different, so as to improve VA
The big visual angle color offset phenomenon of type liquid crystal display.
First formed between the source electrode and drain electrode of the first film transistor TFT_1 in one of the embodiments,
Conducting channel be it is U-shaped, the second conducting channel formed between the source electrode and drain electrode of the second thin film transistor (TFT) TFT_2 be it is U-shaped,
The third conducting channel formed between the source electrode and drain electrode of the third thin film transistor (TFT) TFT_3 is "-" type.In specific design,
The source electrode of the source electrode of the first film transistor TFT_1 and the second thin film transistor (TFT) TFT_2 can be designed as it is U-shaped,
To realize the U-shaped design of thin film transistor (TFT), the source of first film transistor TFT_1 and the second thin film transistor (TFT) TFT_2 are reduced
Pole and drain electrode are in the length on 100 extending direction of scan line, i.e., the width of reduction conducting channel is along 100 side of extension of scan line
Upward distance realizes the narrow frame design of display panel to reduce the required space of wiring.
It is conductive to be greater than described second for the width of first conducting channel and the ratio of length in one of the embodiments,
The width of channel and the ratio of length.It is appreciated that the characteristic of thin film transistor (TFT) and the width of the conducting channel and length
Ratio is related, and the width of conducting channel and the ratio of length are bigger, and the performance of thin film transistor (TFT) is better, therefore can be by designing institute
The width of the width of the first conducting channel and the ratio of length and second conducting channel and the ratio of length are stated, time picture is made
The brightness of plain 500 corresponding region of electrode is lower than the brightness of main 400 corresponding region of pixel electrode, further improves the liquid crystal display of VA type
The big visual angle color offset phenomenon of device.
The array substrate further includes gate insulation layer 700 and passivation layer 800 in one of the embodiments, and the grid are exhausted
In between layers, the passivation layer 800 is set for the source electrode and drain electrode institute that the grid of thin film transistor (TFT) is arranged in edge layer 700 and same layer is arranged
Set layer where the main pixel electrode and sub-pixel electrode and source electrode and drain electrode institute between layers.
Based on the same inventive concept, the embodiment of the invention also provides a kind of production method of array substrate, the methods
Include the steps that forming scan line 100, data line 200, public electrode 600 and public electrode wire 300, form thin film transistor (TFT)
The step of step and the main pixel electrode 400 of formation and sub-pixel electrode 500, forming thin film transistor (TFT) includes forming grid, source
The step of pole, drain electrode and active layer, wherein the top of the scan line 100 is arranged at least two thin film transistor (TFT), point
It is not electrically connected with the main pixel electrode 400 and the sub-pixel electrode 500, the main pixel electrode 400 and the sub-pixel
Electrode 500 is separately positioned on the two sides of the scan line 100, and 400 He of main pixel electrode of at least one pixel unit
Region between the sub-pixel electrode 500 of pixel unit adjacent thereto is not provided with public electrode 600.
The public electrode 600 includes the orthogonal first public sub-electrode 610 and the in one of the embodiments,
Two public sub-electrodes, and the first public sub-electrode 610 is parallel with the data line 200；In same pixel unit, described
On the extending direction of first public sub-electrode 610, the distal end of the first public sub-electrode 610 projects on substrate in described sink to the bottom
It is 5~8 μm at a distance from the distal end of the main pixel electrode 400 is between the projection on the underlay substrate 900, wherein described
The distal end of first public sub-electrode 610 is described first one end of public sub-electrode 610 far from the scan line 100, the master
The described one end of main pixel electrode 400 far from the scan line 100 in the distal end of pixel electrode 400.
It is appreciated that avoiding producing by the way that the distal end of the described first public sub-electrode 610 is inside contracted 5~8 μm in the present embodiment
The phenomenon that raw liquid crystal molecule is by double common voltage, so as to improve between the vertical trunk 422 of two adjacent pixel units
Region generate the bad guiding problem of liquid crystal molecule, further increase light transmission rate and image display quality.
By taking the PSVA type array substrate of above-mentioned 3T_8domain pixel design as an example, the production method of the array substrate has
Body following steps:
Step 1 forms the public electrode 600, the public electrode wire 300, the first film on underlay substrate 900
The grid of transistor TFT_1, the grid of the second film crystal, the grid of third thin film transistor (TFT) TFT_3 and the scan line
100.It is described that the public electrode 600, public electrode wire 300, the grid are formed on underlay substrate 900 in the present embodiment
The step of with scan line 100, comprising: deposit one layer of metallic film on underlay substrate 900, then pass through first time composition
Process, formed comprising scan line 100, grid, public electrode 600 and public electrode wire 300 figure, the scan line
100, grid and public electrode 600 are separated by setting.The public electrode 600 includes the orthogonal first public sub-electrode 610
With the second public sub-electrode, and the first public sub-electrode 610 is parallel with the data line 200；In same pixel unit,
On the extending direction of the first public sub-electrode 610, the distal end of the first public sub-electrode 610 is sunk to the bottom on substrate described
Projection is 5~8 μm at a distance from the distal end of the main pixel electrode 400 is between the projection on the underlay substrate 900, wherein
The distal end of the first public sub-electrode 610 is described first one end of public sub-electrode 610 far from the scan line 100, institute
State the described one end of main pixel electrode 400 far from the scan line 100 in distal end of main pixel electrode 400.
In the present invention, patterning processes can only include photoetching process, or, including photoetching process and etch step, simultaneously
It can also include other techniques for being used to form predetermined pattern such as printing, ink-jet；Photoetching process refers to including film forming, exposure, shows
The technique for forming figure using photoresist, mask plate, exposure machine etc. of the technical process such as shadow.Can according to the present invention formed in
The corresponding patterning processes of structure choice.
Step 2 is forming the public electrode 600, the public electrode wire 300, first film transistor TFT_1
Grid, the grid of the second thin film transistor (TFT) TFT_2, the grid of third thin film transistor (TFT) TFT_3 and the scan line 100 substrate
Gate insulation layer is formed on substrate 900.In the present embodiment, the deposited silicon nitride (SiNx) on the underlay substrate 900 for completing step 1
Or silica (SiOx) layer, form gate insulation layer.First through hole, the third thin film transistor (TFT) are provided in the gate insulation layer
The drain electrode of TFT_3 is electrically connected with the public electrode 600 by first through hole realization.
Step 3 forms the active layer on the underlay substrate 900 for forming the gate insulation layer.In the present embodiment, lead to
Plasma enhanced chemical vapor deposition method or other similar method are crossed, forms amorphous thin Film layers in the top of gate insulation layer,
Then by technical process such as laser annealing technique or solid phase crystallizations, so that recrystallized amorphous silicon, forms polysilicon membrane
Layer, and the figure comprising low-temperature polysilicon silicon active layer is formed by second of patterning processes processing.
Step 4 forms the data line 200, the first film crystal on the underlay substrate 900 for forming the active layer
The source electrode and drain electrode of pipe TFT_1, the source electrode and drain electrode of the second thin film transistor (TFT) TFT_2 and third thin film transistor (TFT) TFT_3
Source electrode and drain electrode.In the present embodiment, the metal layer of source electrode and drain electrode and data line 200 is deposited first, using photoresist gluing
After mask exposure, then pass through the pattern that etching forms data line 200, source electrode and drain electrode.The method wherein etched can be dry
Method etching or wet etching, method is without limitation.Formed between the source electrode and drain electrode of the first film transistor TFT_1
One conducting channel be it is U-shaped, the second conducting channel formed between the source electrode and drain electrode of the second thin film transistor (TFT) TFT_2 be U
Type, the third conducting channel formed between the source electrode and drain electrode of the third thin film transistor (TFT) TFT_3 are "-" type.
Step 5, it is brilliant forming the data line 200, the source electrode and drain electrode of first film transistor TFT_1, the second film
It is formed on the underlay substrate 900 of the source electrode and drain electrode of the source electrode and drain electrode and third thin film transistor (TFT) TFT_3 of body pipe TFT_2 blunt
Change layer, and forms the second through-hole and third through-hole for running through the passivation layer, the main pixel electrode 400 and the first film
The drain electrode of transistor TFT_1 realizes electrical connection by second through-hole, and the sub-pixel electrode 500 and second film are brilliant
The drain electrode of body pipe TFT_2 realizes electrical connection by the third through-hole.In the present embodiment, described the is protected by the passivation layer
One thin film transistor (TFT) TFT_1, the second thin film transistor (TFT) TFT_2 and third thin film transistor (TFT) TFT_3, prevent first film transistor
TFT_1, the second thin film transistor (TFT) TFT_2 and third thin film transistor (TFT) TFT_3 are corroded.
Step 6 forms the main pixel electrode 400 and sub-pixel electricity on the underlay substrate 900 for forming the passivation layer
Pole 500.That is, depositing indium oxide layer tin on the passivation layer using magnetron sputtering method on the underlay substrate 900 for completing step 5
Transparent conductive film, by patterning processes, i.e., after coated photoresist and exposure development, then after carrying out wet etching, removing, shape
At the figure including pixel electrode；Filled with the conductive material for being used to form the pixel electrode, the pixel in the through-hole
Electrode is electrically connected by the through-hole with drain electrode.By above-mentioned steps, that is, form array substrate provided in an embodiment of the present invention.This
In embodiment, the main pixel electrode 400 and the sub-pixel electrode 500 include peripheral join 410, multiple strip trunks
And multiple strip pixel sub-electrodes 430 with the Truck Connection, the trunk include orthogonal 421 He of horizontal trunk
The pixel unit is divided into multiple display farmland areas, institute by vertical trunk 422, the horizontal trunk 421 and the vertical trunk 422
Pixel sub-electrode 430 is stated to be located in the display farmland area.
Based on the same inventive concept, the present invention also provides a kind of display device, the display device includes any of the above-described
Array substrate described in embodiment.Wherein, the display device can be with are as follows: liquid crystal display panel, Electronic Paper, oled panel, mobile phone, flat
Any product having a display function such as plate computer, television set, display, laptop, Digital Frame, navigator or portion
Part.
To sum up, the present invention proposes embodiment and has supplied a kind of array substrate and preparation method thereof and display device.The array base
Plate includes underlay substrate 900 and the scan line 100 being arranged on the underlay substrate 900, data line 200, public electrode wire
300 and multiple pixel units, the pixel unit include thin film transistor (TFT), main pixel electrode 400,500 and of sub-pixel electrode
Public electrode 600, and the secondary picture of the main pixel electrode 400 of at least one pixel unit and pixel unit adjacent thereto
Region between plain electrode 500 is not provided with public electrode 600.In the present invention, the main pixel electrode 400 of the pixel unit and with
Adjacent pixel unit sub-pixel electrode 500 between region be not provided with public electrode 600, therefore reduce public electrode
600 voltage is between the main pixel electrode 400 of the pixel unit and the sub-pixel electrode 500 of pixel unit adjacent thereto
Region interference, thus solve the problems, such as public electrode 600 cause liquid crystal guiding disorder and generate dark line, improve the area
Light transmittance in domain, and then improve image display quality.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of array substrate, which is characterized in that including underlay substrate and the scan line being arranged on the underlay substrate, number
According to line, public electrode wire and multiple pixel units, the pixel unit includes at least two thin film transistor (TFT)s, main pixel electricity
The top of the scan line is arranged in pole, sub-pixel electrode and public electrode, at least two thin film transistor (TFT), respectively with institute
Main pixel electrode and sub-pixel electrode electrical connection are stated, the main pixel electrode and the sub-pixel electrode are separately positioned on institute
State the two sides of scan line, and the secondary picture of the main pixel electrode of at least one pixel unit and pixel unit adjacent thereto
Region between plain electrode is not provided with public electrode.
2. array substrate as described in claim 1, which is characterized in that the public electrode includes orthogonal first public
Sub-electrode and the second public sub-electrode, and the first public sub-electrode is parallel with the data line；
In same pixel unit, on the extending direction of the described first public sub-electrode, the distal end of the first public sub-electrode
Projection is sunk to the bottom on substrate at a distance from the distal end of the main pixel electrode is between the projection on the underlay substrate is 5 described
~8 μm, wherein the distal end of the first public sub-electrode is described first one end of public sub-electrode far from the scan line, institute
State the described one end of main pixel electrode far from the scan line in distal end of main pixel electrode.
3. array substrate as claimed in claim 2, which is characterized in that the main pixel electrode and the sub-pixel electrode wrap
Including peripheral join, multiple strip trunks and multiple strip pixel sub-electrodes with the Truck Connection, the trunk includes
The pixel unit is divided into multiple by orthogonal horizontal trunk and vertical trunk, the horizontal trunk and the vertical trunk
Show farmland area, the pixel sub-electrode is located in the display farmland area；
The trunk of the pixel electrode covers the public electrode, and the distal end of the vertical trunk of the main pixel and is corresponding to it
Projector distance of the distal end on the underlay substrate of the described first public sub-electrode be 5~8 μm, wherein the main pixel
The distal end of vertical trunk is the vertical trunk of the main pixel far from one end of the scan line.
4. array substrate as claimed in claim 3, which is characterized in that the distal end of the vertical trunk of the main pixel and right therewith
Projector distance of the distal end for the described first public sub-electrode answered on the underlay substrate is 6 μm.
5. array substrate as described in claim 1, which is characterized in that the pixel unit includes first film transistor,
Two thin film transistor (TFT)s and third thin film transistor (TFT)；
The source electrode of the first film transistor is connect with the data line, the drain electrode of the first film transistor and the master
Pixel electrode connection, for providing data drive signal for the main pixel electrode；
The source electrode of second thin film transistor (TFT) is connect with the data line, the drain electrode of second thin film transistor (TFT) and described time
Pixel electrode connection, for providing data drive signal for the sub-pixel electrode；
The source electrode of the source electrode of the third thin film transistor (TFT) and second thin film transistor (TFT), the leakage of the third thin film transistor (TFT)
Pole is connect with the public electrode wire, for the voltage for the data drive signal on the sub-pixel electrode.
6. array substrate as claimed in claim 5, which is characterized in that in a pixel unit, the first film
The grid of transistor, second thin film transistor (TFT) grid connected with the grid of the third thin film transistor (TFT) same scanning
The drain electrode of line, the first film transistor connects same data line with the drain electrode of second thin film transistor (TFT).
7. array substrate as claimed in claim 5, which is characterized in that between the source electrode and drain electrode of the first film transistor
The first conducting channel formed is U-shaped, the second conducting channel formed between the source electrode and drain electrode of second thin film transistor (TFT)
To be U-shaped, the third conducting channel formed between the source electrode and drain electrode of the third thin film transistor (TFT) is "-" type.
8. a kind of production method of array substrate, which is characterized in that including forming scan line, data line, public electrode and public
The step of electrode wires, forms the step of at least two thin film transistor (TFT)s and forms the step of main pixel electrode and sub-pixel electrode
Suddenly, it forms thin film transistor (TFT) to include the steps that forming grid, source electrode, drain electrode and active layer, wherein at least two film is brilliant
The top of the scan line is arranged in body pipe, is electrically connected respectively with the main pixel electrode and the sub-pixel electrode, the master
Pixel electrode and the sub-pixel electrode are separately positioned on the two sides of the scan line, and the master of at least one pixel unit
Region between pixel electrode and the sub-pixel electrode of pixel unit adjacent thereto is not provided with public electrode.
9. the production method of array substrate as claimed in claim 8, which is characterized in that the public electrode includes being mutually perpendicular to
The first public sub-electrode and the second public sub-electrode, and the first public sub-electrode is parallel with the data line；
On the extending direction of the described first public sub-electrode, the distal end of the first public sub-electrode is sunk to the bottom on substrate described
Projection is 5~8 μm at a distance from the distal end of the main pixel electrode is between the projection on the underlay substrate, wherein described the
The distal end of one public sub-electrode be described first one end of public sub-electrode far from the scan line, the main pixel electrode it is remote
Hold the described one end of main pixel electrode far from the scan line.
10. a kind of display device, which is characterized in that the display device includes the battle array as described in any claim of claim 1~7
Column substrate.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910369927.5A CN110174787B (en) | 2019-05-06 | 2019-05-06 | Array substrate, manufacturing method thereof and display device |
| PCT/CN2020/088775 WO2020224591A1 (en) | 2019-05-06 | 2020-05-06 | Array substrate and manufacturing method therefor, and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910369927.5A CN110174787B (en) | 2019-05-06 | 2019-05-06 | Array substrate, manufacturing method thereof and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110174787A true CN110174787A (en) | 2019-08-27 |
| CN110174787B CN110174787B (en) | 2021-11-30 |
Family
ID=67690880
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910369927.5A Active CN110174787B (en) | 2019-05-06 | 2019-05-06 | Array substrate, manufacturing method thereof and display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN110174787B (en) |
| WO (1) | WO2020224591A1 (en) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111077711A (en) * | 2019-12-30 | 2020-04-28 | Tcl华星光电技术有限公司 | Short-circuit bar structure, array substrate and display device |
| CN111474779A (en) * | 2020-05-13 | 2020-07-31 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and liquid crystal display panel |
| WO2020224591A1 (en) * | 2019-05-06 | 2020-11-12 | 惠科股份有限公司 | Array substrate and manufacturing method therefor, and display device |
| CN112068371A (en) * | 2020-09-10 | 2020-12-11 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and display panel |
| CN113064299A (en) * | 2021-03-16 | 2021-07-02 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel, preparation method thereof and liquid crystal display device |
| CN113192984A (en) * | 2021-04-22 | 2021-07-30 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
| WO2021179370A1 (en) * | 2020-03-12 | 2021-09-16 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN113485051A (en) * | 2021-06-30 | 2021-10-08 | 惠科股份有限公司 | Array substrate and display panel |
| CN113692553A (en) * | 2020-03-17 | 2021-11-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| WO2021232490A1 (en) * | 2020-05-18 | 2021-11-25 | 深圳市华星光电半导体显示技术有限公司 | Low-delay thin film transistor, array substrate, and display panel |
| WO2022048003A1 (en) * | 2020-09-03 | 2022-03-10 | Tcl华星光电技术有限公司 | Display panel and display device |
| US20230273486A1 (en) * | 2020-11-17 | 2023-08-31 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Display panel and display device |
| WO2023184599A1 (en) * | 2022-03-28 | 2023-10-05 | 深圳市华星光电半导体显示技术有限公司 | Display module and manufacturing method therefor, and electronic terminal |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230258989A1 (en) * | 2020-12-04 | 2023-08-17 | Beijing Boe Display Technology Co., Ltd. | Array substrate and display panel |
| CN113655649B (en) * | 2021-07-22 | 2023-10-24 | 京东方科技集团股份有限公司 | Display panel, preparation method thereof, display device, display system and display method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104865763A (en) * | 2015-06-12 | 2015-08-26 | 深圳市华星光电技术有限公司 | Array substrate |
| CN105929610A (en) * | 2016-07-01 | 2016-09-07 | 上海中航光电子有限公司 | Array substrate and liquid crystal display panel comprising array substrate |
| CN106249490A (en) * | 2016-09-09 | 2016-12-21 | 京东方科技集团股份有限公司 | Array base palte, display floater and display device |
| US20170184927A1 (en) * | 2015-12-29 | 2017-06-29 | Innolux Corporation | Display device |
| CN109188813A (en) * | 2018-10-09 | 2019-01-11 | 京东方科技集团股份有限公司 | Dot structure, array substrate, display panel |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120124011A (en) * | 2011-05-02 | 2012-11-12 | 삼성디스플레이 주식회사 | Liquid crystal display |
| CN107065352B (en) * | 2017-04-17 | 2019-11-05 | 深圳市华星光电半导体显示技术有限公司 | Eight farmland dot structures |
| CN109634015A (en) * | 2018-12-29 | 2019-04-16 | 惠科股份有限公司 | Array substrate and its display panel |
| CN110174787B (en) * | 2019-05-06 | 2021-11-30 | 惠科股份有限公司 | Array substrate, manufacturing method thereof and display device |
-
2019
- 2019-05-06 CN CN201910369927.5A patent/CN110174787B/en active Active
-
2020
- 2020-05-06 WO PCT/CN2020/088775 patent/WO2020224591A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104865763A (en) * | 2015-06-12 | 2015-08-26 | 深圳市华星光电技术有限公司 | Array substrate |
| US20170184927A1 (en) * | 2015-12-29 | 2017-06-29 | Innolux Corporation | Display device |
| CN105929610A (en) * | 2016-07-01 | 2016-09-07 | 上海中航光电子有限公司 | Array substrate and liquid crystal display panel comprising array substrate |
| CN106249490A (en) * | 2016-09-09 | 2016-12-21 | 京东方科技集团股份有限公司 | Array base palte, display floater and display device |
| CN109188813A (en) * | 2018-10-09 | 2019-01-11 | 京东方科技集团股份有限公司 | Dot structure, array substrate, display panel |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020224591A1 (en) * | 2019-05-06 | 2020-11-12 | 惠科股份有限公司 | Array substrate and manufacturing method therefor, and display device |
| CN111077711A (en) * | 2019-12-30 | 2020-04-28 | Tcl华星光电技术有限公司 | Short-circuit bar structure, array substrate and display device |
| WO2021179370A1 (en) * | 2020-03-12 | 2021-09-16 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| US11537017B2 (en) | 2020-03-12 | 2022-12-27 | Tcl China Star Optoelectronics Technology Co., Ltd. | Array substrate and display panel |
| CN113692553B (en) * | 2020-03-17 | 2023-10-20 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN113692553A (en) * | 2020-03-17 | 2021-11-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN111474779A (en) * | 2020-05-13 | 2020-07-31 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and liquid crystal display panel |
| WO2021232490A1 (en) * | 2020-05-18 | 2021-11-25 | 深圳市华星光电半导体显示技术有限公司 | Low-delay thin film transistor, array substrate, and display panel |
| WO2022048003A1 (en) * | 2020-09-03 | 2022-03-10 | Tcl华星光电技术有限公司 | Display panel and display device |
| CN112068371A (en) * | 2020-09-10 | 2020-12-11 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and display panel |
| US20230273486A1 (en) * | 2020-11-17 | 2023-08-31 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Display panel and display device |
| US11977304B2 (en) * | 2020-11-17 | 2024-05-07 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Display panel and display device |
| CN113064299A (en) * | 2021-03-16 | 2021-07-02 | 深圳市华星光电半导体显示技术有限公司 | Liquid crystal display panel, preparation method thereof and liquid crystal display device |
| CN113192984A (en) * | 2021-04-22 | 2021-07-30 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
| CN113485051A (en) * | 2021-06-30 | 2021-10-08 | 惠科股份有限公司 | Array substrate and display panel |
| CN113485051B (en) * | 2021-06-30 | 2023-09-01 | 惠科股份有限公司 | Array substrate and display panel |
| WO2023184599A1 (en) * | 2022-03-28 | 2023-10-05 | 深圳市华星光电半导体显示技术有限公司 | Display module and manufacturing method therefor, and electronic terminal |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020224591A1 (en) | 2020-11-12 |
| CN110174787B (en) | 2021-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110174787A (en) | Array substrate and preparation method thereof and display device | |
| CN107479287B (en) | Array substrate and manufacturing method thereof | |
| US8525964B2 (en) | Array substrate, method of manufacturing the same, display panel having the same, and liquid crystal display apparatus having the same | |
| US7605897B2 (en) | Multi-domain vertical alignment liquid crystal displays with improved angular dependent gamma curves | |
| US10790306B2 (en) | Display substrate, manufacturing method thereof and display device | |
| TWI383504B (en) | Apparatus and method for a thin film transistor (tft) array panel | |
| CN102881688B (en) | Array substrate, display panel and array substrate manufacturing method | |
| CN101847641B (en) | Array substrate, manufacturing method thereof and wide-viewing angle liquid crystal display | |
| CN100362414C (en) | Plane switching mode liquid crystal display device and fabrication method thereof | |
| KR100848095B1 (en) | Thin film transistor array panel, liquid crystal display and manufacturing method of the thin film transistor array panel | |
| CN102629046A (en) | Array substrate, manufacturing method of array substrate and liquid crystal display device | |
| CN110221490A (en) | Array substrate and preparation method thereof and display device | |
| US20070024770A1 (en) | Liquid crystal display device and method of fabricating the same | |
| KR20070000582A (en) | Fringe field switching mode liquid crystal display device and fabrication method thereof | |
| US7709850B2 (en) | Pixel structure and fabrication method thereof | |
| KR20070080052A (en) | Liquid crystal display and manufacturing method thereof | |
| CN101825815A (en) | TFT (Thin Film Transistor)-LCD (Liquid Crystal Display) array baseplate and manufacturing method thereof | |
| US20100020257A1 (en) | Liquid crystal display device and manufacturing method thereof | |
| KR102054000B1 (en) | Thin film transistor substrate and manufacturing method therrof | |
| WO2015021720A1 (en) | Array substrate and manufacturing method thereof, and display device | |
| US20080068527A1 (en) | Liquid crystal display | |
| US8867003B2 (en) | Liquid crystal display device | |
| CN101666949B (en) | IPS type TFT-LCD array substrate and manufacturing method thereof | |
| CN202183002U (en) | Array substrate and liquid crystal display device | |
| US20060244889A1 (en) | Liquid crystal display and manufacturing method of the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |