CN101666949B - IPS type TFT-LCD array substrate and manufacturing method thereof - Google Patents
IPS type TFT-LCD array substrate and manufacturing method thereof Download PDFInfo
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- CN101666949B CN101666949B CN200810119323A CN200810119323A CN101666949B CN 101666949 B CN101666949 B CN 101666949B CN 200810119323 A CN200810119323 A CN 200810119323A CN 200810119323 A CN200810119323 A CN 200810119323A CN 101666949 B CN101666949 B CN 101666949B
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Abstract
The invention relates to an IPS type TFT-LCD array substrate and a manufacturing method thereof. The array substrate comprises a grid wire, a data wire, public electrodes, pixel electrodes and a thin-film transistor, wherein the grid wire and the data wire are of fold line shapes and are arranged in an insulating crossed mode, and the public electrodes and the pixel electrodes are of a plurality of rhombuses which are nested with one another and are arranged at intervals. The manufacturing method comprises the following steps: forming the grid wire, a grid electrode, the public electrodes, the data wire, a source electrode, a drain electrode and a TFT channel region pattern on the substrate, wherein the grid wire and the data wire are of fold line shapes, and the public electrodes and the pixel electrodes are of the plurality of rhombuses which are nested with one another; and depositing a transparent conductive film, and forming a plurality of rhombic pixel electrode patterns, wherein the pixel electrodes and the public electrodes are nested with one another and are arranged at intervals. Because the public electrodes and the pixel electrodes are set in the plurality of rhombuses which are nested with one another and are arranged at intervals, a four-domain structure is formed in a pixel region, the visual angles in four directions are increased, the color distortion can be better avoided, and the color purity can be enhanced.
Description
Technical field
The present invention relates to a kind of LCD and manufacturing approach thereof, particularly a kind of IPS type TFT-LCD array base palte and manufacturing approach thereof.
Background technology
At present, portable electronic equipment (like mobile phone, palm PC, notebook computer) etc. all needs various flat-panel monitors.LCD (LCD), Plasmia indicating panel (PDP), field-causing electron emission display (FED), vacuum fluorescent display screen flat-panel monitors such as (VFD) all have been developed and have developed and come into operation.Wherein, because LCD possesses skills simple and advantage such as is easy to realize, drive pattern is simple and easy, display quality is outstanding, obtained widespread use at present.
LCD has the plurality of liquid crystals alignment mode, wherein Thin Film Transistor-LCD (be called for short TFT-LCD) have the response time fast, driving voltage is low, gray scale shows that characteristics such as good are generally used.TFT-LCD comprises the array base palte of box and color membrane substrates is provided with liquid crystal therebetween.The original state of liquid crystal is parallel to array base palte, adds liquid crystal distortion behind the voltage, controls the degreeof tortuosity of liquid crystal through the control voltage swing, thereby realizes the purpose of modulation transmitance (display gray scale).Because the optical anisotropy of liquid crystal molecule; There is the narrow defective of screen viewing angle; Therefore prior art has proposed a kind of novel liquid crystal drive pattern that can widen the visual angle; Be that in-plane changes (In-Plane Switching is called for short IPS) pattern, also claim lateral electric field mode Thin Film Transistor-LCD (being called for short IPS type TFT-LCD).
Figure 25 is the floor map of prior art IPS type TFT-LCD array base palte.Shown in figure 25; Be formed with grid line 11 and data line 12 on the prior art IPS type TFT-LCD array base palte; Adjacent grid line 11 has defined pixel region with data line 12; Each pixel region is formed with a thin film transistor (TFT) (TFT), pixel electrode 9 and public electrode 2, and wherein public electrode 2 spaces of the pixel electrode 9 of strip and strip are provided with and are parallel, are " people " font and are arranged in the pixel region.During work; Approximate pixel electrode and the public electrode (shown in dotted line among Figure 25) of being parallel to of liquid crystal molecule initial orientation; When data line behind the pixel electrode applied signal voltage; Form a horizontal component of electric field between public electrode and the pixel electrode, one of this horizontal component of electric field direction and the formation of liquid crystal molecule initial orientation direction is greater than 45 ° angle, thereby makes liquid crystal molecule in same plane, reverse (shown in solid line among Figure 25) along the horizontal component of electric field direction.Through the size of adjustment signal voltage, can control the degree of reversing of liquid crystal molecule, and then can reach the effect of modulation transmitance.But prior art IPS type TFT-LCD array base palte can only form the wide visual angle of left and right directions, when when above-below direction is watched, phenomenons such as irregular colour is even then can occur.
Summary of the invention
The purpose of this invention is to provide a kind of IPS type TFT-LCD array base palte and manufacturing approach thereof, have the comprehensive wide visual angle of upper and lower, left and right, and colour purity is strong.
To achieve these goals; The invention provides a kind of IPS type TFT-LCD array base palte; Comprise grid line, data line, public electrode, pixel electrode and a thin film transistor (TFT) of being formed in the pixel region; Said grid line and data line are broken line shape and insulate arranged in a crossed manner; Said public electrode is several rhombuses mutually nested and that be provided with at interval with pixel electrode, is positioned at the said data line of said rhombus the same side and moves towards the spacing that identical part keeps 2um-10um with contiguous with it grid line wiring.
The grid line of said broken line shape laterally be formed on said pixel region above or below, the data line of the gate electrode of rectilinear form and broken line shape is formed on a side of said pixel region.Said public electrode is identical with the quantity of pixel electrode rhombus.
On the technique scheme basis, the corner of the grid line of said broken line shape is a trapezoidal shape, and the spacing between the adjacent grid line is 5 μ m～15 μ m.
To achieve these goals, the present invention also provides a kind of IPS type TFT-LCD manufacturing method of array base plate, comprising:
Wherein, in a pixel region, be formed with a thin film transistor (TFT); Said grid line and data line are broken line shape and insulate arranged in a crossed manner; Said public electrode is several rhombuses mutually nested and that be provided with at interval with pixel electrode, is positioned at the said data line of said rhombus the same side and moves towards the spacing that identical part keeps 2um-10um with contiguous with it grid line wiring.
The invention provides a kind of IPS type TFT-LCD array base palte; Through public electrode and pixel electrode are arranged to rhombus; Grid line is horizontally installed on the below of pixel electrode with broken line shape, and data line vertically is arranged on the right side of pixel electrode with broken line shape, and thin film transistor (TFT) is arranged on the positive right side of pixel electrode; And the at interval setting mutually nested with pixel electrode of the public electrode of rhombus makes IPS type TFT-LCD array base palte of the present invention in a pixel region, form four domain structures.When making alive not; The long axis direction of liquid crystal can be arranged according to angle of orientation direction, when making alive, produces horizontal component of electric field between pixel electrode and the adjacent public electrode; Because the horizontal component of electric field direction that forms between pixel electrode and the public electrode is perpendicular to the four edges of rhombus; Therefore the liquid crystal long axis direction in the pixel region will can obtain required images displayed at the upper and lower, left and right four direction along four different directions deflections, increase the visual angle of above-mentioned four direction; And can better offset chromatic variation of distortion, strengthen colour purity.
Through accompanying drawing and embodiment, technical scheme of the present invention is done further detailed description below.
Description of drawings
Fig. 1 is the floor map of IPS type TFT-LCD array base palte first embodiment of the present invention;
Fig. 2 be among Fig. 1 A-A to cut-open view;
Fig. 3 is the planimetric map after IPS type TFT-LCD array base palte first embodiment composition technology first time of the present invention;
Fig. 4 be among Fig. 3 B-B to sectional view;
Fig. 5 is the planimetric map after IPS type TFT-LCD array base palte first embodiment composition technology second time of the present invention;
Fig. 6 be among Fig. 5 C-C to sectional view;
Fig. 7 is IPS type TFT-LCD array base palte first embodiment of the present invention planimetric map after the composition technology for the third time;
Fig. 8 be among Fig. 7 D-D to sectional view;
Fig. 9 is the planimetric map after the 4th composition technology of IPS type TFT-LCD array base palte first embodiment of the present invention;
Figure 10 be among Fig. 9 E-E to sectional view;
Figure 11 is the floor map of IPS type TFT-LCD array base palte second embodiment of the present invention;
Figure 12 be among Figure 11 F-F to cut-open view;
Figure 13 is the planimetric map after IPS type TFT-LCD array base palte second embodiment composition technology first time of the present invention;
Figure 14 be among Figure 13 G-G to sectional view;
Figure 15 is the planimetric map after IPS type TFT-LCD array base palte second embodiment composition technology second time of the present invention;
Figure 16 be among Figure 15 H-H to sectional view;
Figure 17 is IPS type TFT-LCD array base palte second embodiment of the present invention planimetric map after the composition technology for the third time;
Figure 18 be among Figure 17 I-I to sectional view;
The synoptic diagram of liquid crystal rotation when Figure 19 works for IPS type TFT-LCD array base palte of the present invention;
Figure 20 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate of the present invention;
Figure 21 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate first embodiment of the present invention;
Figure 22 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate second embodiment of the present invention;
Figure 23 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate the 3rd embodiment of the present invention;
Figure 24 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate the 4th embodiment of the present invention;
Figure 25 is the floor map of prior art IPS type TFT-LCD array base palte.
Description of reference numerals:
The 1-gate electrode; The 2-public electrode; The 3-gate insulation layer;
The 4-semiconductor layer; The 5-doping semiconductor layer; 6-source electrode;
The 7-drain electrode; The 8-passivation layer; The 9-pixel electrode;
The 10-substrate; The 11-grid line; The 12-data line;
The 81-passivation layer via hole.
Embodiment
Fig. 1 is the floor map of IPS type TFT-LCD array base palte first embodiment of the present invention, Fig. 2 be among Fig. 1 A-A to cut-open view.Like Fig. 1, shown in Figure 2; Present embodiment IPS type TFT-LCD array base palte comprises the grid line 11 that is formed on broken line shape in the pixel region, the data line 12 of broken line shape, public electrode 2, rhombic pixel electrode 9 and the thin film transistor (TFT) of rhombus; The grid line 11 of its middle polyline shape laterally is formed on the below of single pixel region; The data line 12 of broken line shape vertically is formed on the right side of pixel region, intersects with grid line 11 insulation, and the quantity of public electrode 2 rhombuses is identical with the quantity of pixel electrode 9 rhombuses; The public electrode 2 of rhombus and pixel electrode 9 mutually nested and settings at interval; Be each rhombic pixel electrode 9 (except pixel electrode of outermost edges) between the public electrode 2 of two rhombuses, the material of public electrode 2 and pixel electrode 9 is tin indium oxide (ITO) or indium zinc oxide (IZO), or other macromolecule transparent material.Thin film transistor (TFT) is arranged on the positive right side of pixel region; Comprise gate electrode 1; Be formed on the gate electrode 1 and cover the gate insulation layer 3 of whole base plate 10; Be formed on the gate insulation layer 3 and be positioned at the semiconductor layer 4 and the doping semiconductor layer (ohmic contact layer) 5 of gate electrode 1 top, be formed on source electrode 6 and drain electrode 7 on the doping semiconductor layer 5, form the TFT channel region between source electrode 6 and the drain electrode 7; Be formed on source electrode 6 and the drain electrode 7 and cover the passivation layer 8 of whole base plate, the passivation layer 8 of drain electrode 7 positions is formed with the passivation layer via hole that pixel electrode 9 is connected with drain electrode 7.Wherein, gate electrode 1 is a rectilinear form, is formed on the right side of pixel region and is connected with grid line 11, and source electrode 6 is connected with data line 12, and drain electrode 7 is connected with pixel electrode 9 through passivation layer via hole.In fact, the grid line of broken line shape also can be formed on the top of pixel region, and the data line of broken line shape also can vertically be formed on the left side of pixel region, and correspondingly, thin film transistor (TFT) is arranged on the positive left side of pixel region.
Fig. 3～Figure 10 prepares the synoptic diagram of process for IPS type TFT-LCD array base palte first embodiment of the present invention; Further specify the technical scheme of present embodiment below through the preparation process of this embodiment; In following explanation; Technology such as the alleged composition technology of the present invention comprises photoresist coating, mask, exposure, etching, peel off, wherein photoresist is example with the positive photoresist.
Fig. 3 is IPS type TFT-LCD array base palte first embodiment of the present invention planimetric map after the composition technology for the first time, Fig. 4 be among Fig. 3 B-B to sectional view.Adopt magnetron sputtering, thermal evaporation or other film build method; Deposition layer of transparent conductive film on substrate 10; Substrate 10 can adopt glass substrate or quartz base plate; Thickness is 0.5 μ m～1.1 μ m, and the material of transparent conductive film can use tin indium oxide (ITO) or indium zinc oxide (IZO), or other macromolecule transparent material.Use the normal masks plate through the first time composition technology carry out composition, on substrate, form common pattern of electrodes.Common pattern of electrodes comprises the public electrode 2 of connection electrode and several nested successively diamond shaped; The public electrode 2 of several diamond shaped is formed in the single pixel region; Nested successively, interconnect in a side, and be connected with the connection electrode of both sides; Connection electrode is used to make adjacent public electrode to connect into an integral body, like Fig. 3 and shown in Figure 4.
Fig. 5 is IPS type TFT-LCD array base palte first embodiment of the present invention planimetric map after the composition technology for the second time, Fig. 6 be among Fig. 5 C-C to sectional view.On the substrate of accomplishing above-mentioned figure; Adopt magnetron sputtering, thermal evaporation or other film build method; Deposition one deck grid metallic film on substrate 10; The grid thickness of metal film is 0.1 μ m～0.3 μ m, and material can use metals such as molybdenum, aluminium, aluminium neodymium alloy, tungsten, chromium, copper, or the multilayer film of above metal composition.For example, though use aluminum comparatively reasonable as grid line, aluminum is lower in the thermotolerance of free state, therefore can be at aluminum laminated some thermotolerance metal such as metals such as chromium, molybdenum, or on the aluminum surface with the anodic oxidation additional oxide layer.Use the normal masks plate through the second time composition technology carry out composition; On substrate, form grid line 11 and gate electrode 1 figure; Wherein grid line 11 is broken line shape (a Zigzag shape), laterally is formed on the below of single pixel region, and gate electrode 1 is a rectilinear form; Be formed on the right side of single pixel region, like Fig. 5 and shown in Figure 6.
Fig. 7 is IPS type TFT-LCD array base palte first embodiment of the present invention planimetric map after the composition technology for the third time, Fig. 8 be among Fig. 7 D-D to sectional view.On the substrate of accomplishing above-mentioned figure, adopt chemical vapor deposition or other film build method to deposit gate insulation layer 3, semiconductor layer 4 and doping semiconductor layer (ohmic contact layer) 5 successively, wherein semiconductor layer 4 is formed active layer with doping semiconductor layer 5.Adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film then.The thickness that metallic film is leaked in the source is 0.4 μ m～0.6 μ m, and material can use metals such as molybdenum, aluminium, aluminium neodymium alloy, tungsten, chromium, copper, or the multilayer film of above metal composition.For example, the source leak metallic film can be metals such as titanium, chromium, molybdenum about thickness 0.1 μ m as heat resistant metal layer, the aluminum metal about thickness 0.3 μ m is as the low resistance wiring layer, the titanium about thickness 0.1 μ m is as intermediate conductive layer.The thickness of gate insulation layer 3 is 0.2 μ m～0.3 μ m; Material can be silicon nitride (SiNx) etc.; The thickness of semiconductor layer 4 is 0.4 μ m～0.6 μ m; Material can be amorphous silicon (a-Si) etc., and the thickness of doping semiconductor layer 5 is 0.04 μ m～0.06 μ m, and material can be amorphous silicon of Doping Phosphorus etc.Adopt shadow tone or gray mask plate metallic film to be leaked in semiconductor layer, doping semiconductor layer and source and carry out composition through composition technology for the third time; On substrate, form data line 12, source electrode 6, drain electrode 7 and TFT channel region figure; Wherein the doping semiconductor layer 5 between source electrode 6 and the drain electrode 7 is etched away fully, exposes semiconductor layer 4, and data line 12 is broken line shape (a Zigzag shape); Vertically be formed on the right side of pixel region, like Fig. 7 and shown in Figure 8.For making thin film transistor (TFT) not become bias voltage (offset) structure, source electrode 6 will overlap with gate electrode 1.Because this overlapping electricity effect, so can 2 μ m be arranged to be less than or equal in the overlapping region in actual the use with stray capacitance.
Fig. 9 is the planimetric map after the 4th composition technology of IPS type TFT-LCD array base palte first embodiment of the present invention, Figure 10 be among Fig. 9 E-E to sectional view.Accomplish on the substrate of above-mentioned figure, adopt chemical vapor deposition or other film build method deposition one deck passivation layer 8, thickness is 0.2 μ m～0.4 μ m, and material can be for silicon nitride (SiNx) etc.Use the normal masks plate passivation layer to be carried out composition, form passivation layer via hole 81 figures in drain electrode 7 positions, like Fig. 9 and shown in Figure 10 through the 4th composition technology.
At last; On the substrate of accomplishing above-mentioned figure; Adopt magnetron sputtering, thermal evaporation or other film build method deposition layer of transparent conductive film, the material of transparent conductive film can use tin indium oxide (ITO) or indium zinc oxide (IZO), or other macromolecule transparent material.Use the normal masks plate to form pixel electrode 9 figures at pixel region through the 5th composition technology; Pixel electrode 9 is connected with drain electrode 7 through passivation layer via hole 81; Wherein pixel electrode 9 is several nested successively rhombuses, and the quantity of rhombus is identical with the quantity of public electrode 2 rhombuses, pixel electrode 9 and public electrode 2 mutually nested and settings at interval; Each rhombic pixel electrode 9 is (except the pixel electrode of outermost edges) between the public electrode 2 of two rhombuses, and is as depicted in figs. 1 and 2.In addition, outermost overlaps with grid line 11 near the pixel electrode 9 of grid line 11, forms MM CAP, to pixel electrode sufficient voltage is provided.
Figure 11 is the floor map of IPS type TFT-LCD array base palte second embodiment of the present invention, Figure 12 be among Figure 11 F-F to cut-open view.Like Figure 11, shown in Figure 12, the agent structure of present embodiment IPS type TFT-LCD array base palte is identical with the aforementioned first embodiment major part, and difference is that the material of public electrode 2 is identical with the material of grid line.
Figure 13 is IPS type TFT-LCD array base palte second embodiment of the present invention planimetric map after the composition technology for the first time, Figure 14 be among Figure 13 G-G to sectional view.Deposition one deck grid metallic film on substrate 10, thickness, material and the deposition process of substrate, grid metallic film is identical with aforementioned first embodiment.Use the normal masks plate through the first time composition technology carry out composition, on substrate, form grid line 11, gate electrode 1 and common pattern of electrodes, wherein grid line 11 is a broken line shape; Laterally be formed on the below of single pixel region, gate electrode 1 is a rectilinear form, is formed on the right side of single pixel region; Common pattern of electrodes comprises the public electrode 2 of connection electrode and several nested successively diamond shaped, and the public electrode 2 of several rhombuses is formed in the single pixel region, and is nested successively; Interconnect in a side; And be connected with the connection electrode of both sides, connection electrode is used to make adjacent public electrode to connect into an integral body, like Figure 13 and shown in Figure 14.
Figure 15 is IPS type TFT-LCD array base palte second embodiment of the present invention planimetric map after the composition technology for the second time, Figure 16 be among Figure 15 H-H to sectional view.On the substrate of accomplishing above-mentioned figure, deposit gate insulation layer 3, semiconductor layer 4, doping semiconductor layer 5 and source successively and leak metallic film.Thickness, material and deposition process that metallic film is leaked in gate insulation layer, semiconductor layer, doping semiconductor layer and source are identical with aforementioned first embodiment.Adopt shadow tone or gray mask plate through the second time composition technology metallic film leaked in semiconductor layer, doping semiconductor layer and source carry out composition; On substrate, form data line 12, source electrode 6, drain electrode 7 and TFT channel region figure; Wherein the doping semiconductor layer 5 between source electrode 6 and the drain electrode 7 is etched away fully, exposes semiconductor layer 4, and wherein data line 12 is broken line shape (a Zigzag shape); Vertically be formed on the right side of pixel region, like Figure 15 and shown in Figure 16.
Figure 17 is IPS type TFT-LCD array base palte second embodiment of the present invention planimetric map after the composition technology for the third time, Figure 18 be among Figure 17 I-I to sectional view.On the substrate of accomplishing above-mentioned figure, deposition one deck passivation layer 8, the thickness of passivation layer, material and deposition process are identical with aforementioned first embodiment.Use the normal masks plate passivation layer to be carried out composition, form passivation layer via hole 81 figures in drain electrode 7 positions, like Figure 17 and shown in Figure 180 through composition technology for the third time.
At last; On the substrate of accomplishing above-mentioned figure, deposition layer of transparent conductive film uses the normal masks plate to form pixel electrode 9 figures through the 4th composition technology at pixel region; Pixel electrode 9 is connected with drain electrode 7 through passivation layer via hole 81; Wherein pixel electrode 9 is several nested successively rhombuses, and the quantity of rhombus is identical with the quantity of public electrode 2 rhombuses, pixel electrode 9 and public electrode 2 mutually nested and settings at interval; Each rhombic pixel electrode 9 is (except the pixel electrode of outermost edges) between the public electrode 2 of two rhombuses, like Figure 11 and shown in Figure 12.In addition, outermost overlaps with grid line 11 near the pixel electrode 9 of grid line 11, forms MM CAP, to pixel electrode sufficient voltage is provided.Because the public electrode of present embodiment adopts and the grid line identical materials, therefore can reduce composition technology one time, relatively be suitable for the less demanding LCD of pairs of openings rate.
In the preparation process of above-mentioned two example I PS type TFT-LCD array base paltes, wherein active layer, source electrode, drain electrode and TFT channel region figure preparation technology have adopted the multistep etching technics.Particularly; At first leak and apply one deck photoresist on the metallic film in the source; Use shadow tone or gray mask board to explosure, make photoresist form complete exposure area (being that photoresist is removed the zone fully), partial exposure area (being photoresist part reserve area) and unexposed area (being the complete reserve area of photoresist), data line, source electrode and drain electrode position are unexposed area; Zone between source electrode and the drain electrode is a partial exposure area, and remainder all is a complete exposure area; After the development treatment, the photoresist of complete exposure area is removed fully, and the photoresist of partial exposure area is removed by part, and the photoresist of unexposed area keeps fully; Through the etching technics formation first time data line, source electrode and drain electrode figure, after the ashing treatment, through etching technics formation second time TFT channel region figure.In actual use; IPS type TFT-LCD array base palte of the present invention also can adopt and prepare active layer and TFT channel region graphical method respectively; Particularly; At first adopt chemical vapor deposition or other film build method to deposit gate insulation layer, semiconductor layer and doping semiconductor layer successively, use the normal masks plate that semiconductor layer and doping semiconductor layer are carried out composition, form active layer pattern.Adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film afterwards, use the normal masks plate that metallic film is leaked in the source and carry out composition, form data line, source electrode, drain electrode and TFT channel region figure.
In addition, the process that forms public electrode, grid line and gate electrode figure among first embodiment also can adopt composition technology one time.Particularly; At first adopt magnetron sputtering, thermal evaporation or other film build method deposit transparent conductive film and grid metallic film successively on substrate, adopt shadow tone or gray mask plate that photoresist is made public then, after the development treatment; Through the first time etching technics formation grid line and gate electrode figure; After the ashing treatment, through etching technics formation second time common pattern of electrodes, wherein grid line and gate electrode below remains with transparent conductive film.
The synoptic diagram of liquid crystal rotation when Figure 19 works for IPS type TFT-LCD array base palte of the present invention.Shown in figure 19, IPS type TFT-LCD array base palte of the present invention is through being arranged to diamond structure with pixel electrode, and mutually nested with the public electrode of rhombus and be provided with at interval, therefore in a pixel region, formed four domain structures.When making alive not, the long axis direction of liquid crystal can be arranged according to angle of orientation direction, like the dotted line among Figure 19.When making alive, produce horizontal component of electric field between adjacent pixel electrodes and the public electrode, liquid crystal will be according to the rotation of arrow e direction, like the solid line among Figure 19.Because the horizontal component of electric field direction that forms between pixel electrode and the public electrode in four domain structures is respectively perpendicular to the four edges of rhombus; Represent four horizontal component of electric field directions like the arrow a among Figure 19, arrow b, arrow c and arrow d, so the liquid crystal in the pixel region will be respectively along four different directions deflections.Through the anglec of rotation of control liquid crystal, can reach the effect of modulation gray scale, and can see display image at the upper and lower, left and right four direction, increase the visual angle of above-mentioned four direction, and can better offset chromatic variation of distortion, strengthen colour purity.
Can find out that from technique scheme of the present invention the structure and the prior art of thin film transistor (TFT) are basic identical in the IPS type TFT-LCD array base palte of the present invention.Data line is formed on the right side of single pixel region with broken line shape, and promptly data line is formed between each viewing area with broken line shape, keeps equidistance with adjacent pixel electrodes, to reduce the stray capacitance that produces between pixel electrode and data line.Grid line is formed on the below of single pixel region with broken line shape, and the grid line corner part is a trapezoidal shape, keeps the spacing of 5 μ m～15 μ m with adjacent grid line, avoids the phenomenon that is short-circuited; Data line and contiguous grid line keep the spacing of 2 μ m～10 μ m, to guarantee can not produce the stray capacitance that causes because of overlapping.
The invention provides a kind of IPS type TFT-LCD array base palte; Through public electrode and pixel electrode are arranged to rhombus, grid line is horizontally installed on the below of pixel electrode with broken line shape, and data line vertically is arranged on the right side of pixel electrode with broken line shape; Thin film transistor (TFT) is arranged on the positive right side of pixel electrode; And the at interval setting mutually nested with pixel electrode of the public electrode of rhombus makes IPS type TFT-LCD array base palte of the present invention in a pixel region, form four domain structures, thereby can play the effect that increases full visual angle, upper and lower, left and right; And can better offset chromatic variation of distortion, strengthen colour purity.
Need to prove that the IPS technology of prior art is introduced two domain modes by the single domain pattern, adopts " people " the font pixel electrode, purpose is to reverse phenomenon in order to improve the IPS pattern at the GTG of some special angle.Orientation principle in its pair farmland is in a pixel region; The yawing moment of top and lower part liquid crystal becomes symmetric figure with following polarised direction; When arriving color membrane substrates through liquid crystal modulation back with the assurance incident polarized light; The amplitude and the phase place that go up polarization relatively are consistent, and have guaranteed that therefore single pixel region internal upper part divides and the homogeneity of lower part emergent light intensity and gray scale.And because in a pixel region, liquid crystal molecule has double orientation, relative single domain pattern can play increase LOOK LEFT and LOOK RIGHT, strengthen the effect of colour purity.Technique scheme of the present invention is on the basis of the two domain modes of prior art; Two domain modes are expanded to four domain modes; Make the liquid crystal molecule in the single pixel region that four orientations arranged, not only can increase full visual angle, and on all directions, all have the color contrast better than two domain modes.Specifically; In technique scheme of the present invention; The yawing moment of liquid crystal molecule is with respect to last polarization, the equal symmetry of polarised direction down in the single pixel region, thus by the incident polarized light after the polarization modulation down through behind the layer of liquid crystal molecule of different orientation, emergent light has still kept the consistent of intensity and gray scale; Therefore the present invention need not change the basic structure and the material of existing array base palte, like liquid crystal, upward polarization, following polarization and backlight etc.
Figure 20 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate of the present invention, specifically comprises:
Further specify the technical scheme of IPS type TFT-LCD manufacturing method of array base plate of the present invention below through specific embodiment.
Figure 21 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate first embodiment of the present invention, specifically comprises:
Adopt magnetron sputtering, thermal evaporation or other film build method; Deposition layer of transparent conductive film on substrate; Substrate can adopt glass substrate or quartz base plate; Thickness is 0.5 μ m～1.1 μ m, and the material of transparent conductive film can use tin indium oxide (ITO) or indium zinc oxide (IZO), or other macromolecule transparent material.Use the normal masks plate transparent conductive film to be carried out composition, on substrate, form common pattern of electrodes through composition technology.Common pattern of electrodes comprises the public electrode of connection electrode and several nested successively diamond shaped; The public electrode of several diamond shaped is formed in the single pixel region; Nested successively; Interconnect in a side, and be connected with the connection electrode of both sides, connection electrode is used to make adjacent public electrode to connect into an integral body.
On the substrate of accomplishing above-mentioned figure; Adopt magnetron sputtering, thermal evaporation or other film build method; Deposition one deck grid metallic film on substrate; The grid thickness of metal film is 0.1 μ m～0.3 μ m, and material can use metals such as molybdenum, aluminium, aluminium neodymium alloy, tungsten, chromium, copper, or the multilayer film of above metal composition.For example, though use aluminum comparatively reasonable as grid line, aluminum is lower in the thermotolerance of free state, therefore can be at aluminum laminated some thermotolerance metal such as metals such as chromium, molybdenum, or on the aluminum surface with the anodic oxidation additional oxide layer.Use the normal masks plate grid metallic film to be carried out composition through composition technology; On substrate, form grid line and gate electrode figure, wherein grid line is a broken line shape, laterally is formed on the below of single pixel region; Gate electrode is a rectilinear form, is formed on the right side of single pixel region.
On the substrate of accomplishing above-mentioned figure, adopt chemical vapor deposition or other film build method to deposit gate insulation layer, semiconductor layer and doping semiconductor layer (ohmic contact layer) successively, wherein semiconductor layer and doping semiconductor layer are formed active layer.Adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film then.The thickness that metallic film is leaked in the source is 0.4 μ m～0.6 μ m, and material can use metals such as molybdenum, aluminium, aluminium neodymium alloy, tungsten, chromium, copper, or the multilayer film of above metal composition.For example, the source leak metallic film can be metals such as titanium, chromium, molybdenum about thickness 0.1 μ m as heat resistant metal layer, the aluminum metal about thickness 0.3 μ m is as the low resistance wiring layer, the titanium about thickness 0.1 μ m is as intermediate conductive layer.The thickness of gate insulation layer is 0.2 μ m～0.3 μ m; Material can be silicon nitride (SiNx) etc., and the thickness of semiconductor layer is 0.4 μ m～0.6 μ m, and material can be amorphous silicon (a-Si) etc.; The thickness of doping semiconductor layer is 0.04 μ m～0.06 μ m, and material can be amorphous silicon of Doping Phosphorus etc.Adopt shadow tone or gray mask plate metallic film to be leaked in semiconductor layer, doping semiconductor layer and source and carry out composition through composition technology; On substrate, form data line, source electrode, drain electrode and TFT channel region figure; Wherein the doping semiconductor layer between source electrode and the drain electrode is etched away fully; Expose semiconductor layer, data line is a broken line shape, vertically is formed on the right side of pixel region.This composition process has adopted the multistep etching technics.Leak in the source earlier and apply one deck photoresist on the metallic film; Use shadow tone or gray mask board to explosure; Make photoresist form complete exposure area (being that photoresist is removed the zone fully), partial exposure area (being photoresist part reserve area) and unexposed area (being the complete reserve area of photoresist); Data line, source electrode and drain electrode position are unexposed area, and the zone between source electrode and the drain electrode is a partial exposure area, and remainder all is a complete exposure area; After the development treatment, the photoresist of complete exposure area is removed fully, and the photoresist of partial exposure area is removed by part, and the photoresist of unexposed area keeps fully; Through the etching technics formation first time data line, source electrode and drain electrode figure, after the ashing treatment, through etching technics formation second time TFT channel region figure.
Accomplish on the substrate of above-mentioned figure, adopt chemical vapor deposition or other film build method deposition one deck passivation layer, the thickness of passivation layer is 0.2 μ m～0.4 μ m, and material can be for silicon nitride (SiNx) etc.Use the normal masks plate to carry out composition, form the passivation layer via hole figure in the drain electrode position through composition technology.
At last; On the substrate of accomplishing above-mentioned figure; Adopt magnetron sputtering, thermal evaporation or other film build method deposition layer of transparent conductive film, the material of transparent conductive film can use tin indium oxide (ITO) or indium zinc oxide (IZO), or other macromolecule transparent material.Use the normal masks plate to form the pixel electrode figure at pixel region through composition technology; Pixel electrode is connected with drain electrode through passivation layer via hole; Wherein pixel electrode is several nested successively rhombuses; The quantity of rhombus is identical with the quantity of public electrode rhombus, pixel electrode and at interval setting mutually nested with public electrode, and each rhombic pixel electrode is (except the pixel electrode of outermost edges) between the public electrode of two rhombuses.In addition, outermost overlaps with grid line 11 near the pixel electrode 9 of grid line 11, forms MM CAP.
Figure 22 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate second embodiment of the present invention, specifically comprises:
The main flow process of the present embodiment and first embodiment is basic identical, and difference has been to adopt the technology for preparing active layer and TFT channel region figure respectively, and the step 113 that is about among aforementioned first embodiment is divided into two composition technologies.Particularly; After forming gate electrode, grid line and common pattern of electrodes; Adopt chemical vapor deposition or other film build method to deposit gate insulation layer, semiconductor layer and doping semiconductor layer successively earlier, use the normal masks plate that semiconductor layer and doping semiconductor layer are carried out composition, form active layer pattern.Adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film afterwards, use the normal masks plate that metallic film is leaked in the source and carry out composition, form data line, source electrode, drain electrode and TFT channel region figure.Other manufacture process is identical with aforementioned first embodiment, repeats no more.
Figure 23 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate the 3rd embodiment of the present invention, specifically comprises:
At first on substrate, deposit one deck grid metallic film, thickness, material and the deposition process of substrate, grid metallic film is identical with aforementioned first embodiment.Use the normal masks plate to carry out composition through composition technology, on substrate, form grid line, gate electrode and common pattern of electrodes, wherein grid line is a broken line shape; Laterally be formed on the below of single pixel region, gate electrode is a rectilinear form, is formed on the right side of single pixel region; Common pattern of electrodes comprises the public electrode of connection electrode and several nested successively diamond shaped; The public electrode of several diamond shaped is formed in the single pixel region, and is nested successively, interconnects in a side; And be connected with the connection electrode of both sides, connection electrode is used to make adjacent public electrode to connect into an integral body.
On the substrate of accomplishing above-mentioned figure, deposit gate insulation layer, semiconductor layer, doping semiconductor layer and source successively and leak metallic film afterwards.The thickness of gate insulation layer, semiconductor layer, doping semiconductor layer and source leakage metallic film, material are with identical with aforementioned first embodiment of deposition process.Adopt shadow tone or gray mask plate metallic film to be leaked in semiconductor layer, doping semiconductor layer and source and carry out composition through composition technology; On substrate, form data line, source electrode, drain electrode and TFT channel region figure; Wherein the doping semiconductor layer between source electrode and the drain electrode is etched away fully; Expose semiconductor layer, wherein data line is broken line shape (a Zigzag shape), vertically is formed on the right side of pixel region.
On the substrate of accomplishing above-mentioned figure, deposit one deck passivation layer subsequently, the thickness of passivation layer, material and deposition process are identical with aforementioned first embodiment.Use the normal masks plate passivation layer to be carried out composition, form the passivation layer via hole figure in the drain electrode position through composition technology.
At last, on the substrate of accomplishing above-mentioned figure, adopt magnetron sputtering, thermal evaporation or other film build method deposition layer of transparent conductive film.Use the normal masks plate to form the pixel electrode figure at pixel region through composition technology; Pixel electrode is connected with drain electrode through passivation layer via hole; Wherein pixel electrode is several nested successively rhombuses; The quantity of rhombus is identical with the quantity of public electrode rhombus, and the at interval setting mutually nested of said pixel electrode with said public electrode, and each rhombic pixel electrode is (except the pixel electrode of outermost edges) between the public electrode of two rhombuses.In addition, outermost overlaps with grid line 11 near the pixel electrode 9 of grid line 11, forms MM CAP.
Figure 24 is the process flow diagram of IPS type TFT-LCD manufacturing method of array base plate the 4th embodiment of the present invention, specifically comprises:
Step 141, on substrate deposition one deck grid metallic film, on substrate, form the common pattern of electrodes of the grid line of gate electrode, the transverse crease lines shape rhombus mutually nested with several through composition technology;
Step 142, on the substrate of completing steps 141 depositing semiconductor layers and doping semiconductor layer successively, adopt the normal masks plate through composition technology, on substrate, form active layer pattern;
Step 143, metallic film is leaked in deposition one deck source on the substrate of completing steps 142, adopts the normal masks plate through composition technology, on substrate, forms the data line figure of source electrode, drain electrode, TFT channel region figure and longitudinal broken line shape;
Step 144, on the substrate of completing steps 143 deposition one deck passivation layer, form the passivation layer via hole figure in the drain electrode position through composition technology;
Step 145, on the substrate of completing steps 144 deposition layer of transparent conductive film; Form several rhombic pixel electrode patterns through composition technology; Said pixel electrode is mutually nested with said public electrode and be provided with at interval, and is connected with drain electrode through passivation layer via hole.
The main flow process of present embodiment and the 3rd embodiment is basic identical; Difference has been to adopt the technology for preparing active layer and TFT channel region figure respectively; The step 132 that is about among aforementioned the 3rd embodiment is divided into two composition technologies, and two composition technologies are explained in aforementioned second embodiment.
The invention provides a kind of IPS type TFT-LCD manufacturing method of array base plate; Through forming public electrode and pixel electrode, the grid line of transverse crease lines shape and the data line of longitudinal broken line shape of diamond shape; And the public electrode of diamond shape is mutually nested with pixel electrode and setting at interval; Make the IPS type TFT-LCD array base palte of manufacturing of the present invention in a pixel region, form four domain structures; Thereby can play the effect that increases full visual angle, upper and lower, left and right, and can better offset chromatic variation of distortion, strengthen colour purity.
What should explain at last is: above embodiment is only unrestricted in order to technical scheme of the present invention to be described; Although the present invention is specified with reference to preferred embodiment; Those of ordinary skill in the art is to be understood that; Can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and the scope of technical scheme of the present invention.
Claims (10)
1. IPS type TFT-LCD array base palte; Comprise grid line, data line, public electrode, pixel electrode and a thin film transistor (TFT) of being formed in the pixel region; It is characterized in that; Said grid line and data line are broken line shape and insulate arranged in a crossed mannerly that said public electrode and pixel electrode are several rhombuses mutually nested and that be provided with at interval, are positioned at the spacing that identical part maintenance 2um-10um is moved towards in the said data line of said rhombus the same side and contiguous with it grid line wiring.
2. IPS type TFT-LCD array base palte according to claim 1; It is characterized in that; The grid line of said broken line shape laterally be formed on said pixel region above or below, the data line of the gate electrode of rectilinear form and broken line shape is formed on a side of said pixel region.
3. IPS type TFT-LCD array base palte according to claim 1 is characterized in that said public electrode is identical with the quantity of pixel electrode rhombus.
4. according to the described IPS type of arbitrary claim TFT-LCD array base palte in the claim 1～3, it is characterized in that the corner of the grid line of said broken line shape is a trapezoidal shape, and the spacing between the adjacent grid line is 5 μ m～15 μ m.
5. an IPS type TFT-LCD manufacturing method of array base plate is characterized in that, comprising:
Step 1, on substrate, form grid line, gate electrode, public electrode, data line, source electrode, drain electrode and TFT channel region figure, wherein grid line and data line are broken line shape, and public electrode is several mutually nested rhombuses;
Step 2, on the substrate of completing steps 1 deposition one deck passivation layer, form the passivation layer via hole figure in the drain electrode position through composition technology;
Step 3, on the substrate of completing steps 2 deposition layer of transparent conductive film; Form several rhombic pixel electrode patterns through composition technology; Said pixel electrode is mutually nested with said public electrode and be provided with at interval, and is connected with drain electrode through passivation layer via hole;
Wherein, in a pixel region, be formed with a thin film transistor (TFT); Said grid line and data line are broken line shape and insulate arranged in a crossed manner; Said public electrode is several rhombuses mutually nested and that be provided with at interval with pixel electrode, is positioned at the said data line of said rhombus the same side and moves towards the spacing that identical part keeps 2um-10um with contiguous with it grid line wiring.
6. IPS type TFT-LCD manufacturing method of array base plate according to claim 5 is characterized in that said step 1 specifically comprises:
Step 11, on substrate, form grid line, gate electrode and common pattern of electrodes, wherein grid line is a broken line shape, public electrode is several mutually nested rhombuses;
Step 12, on the substrate of completing steps 11, form data line, source electrode, drain electrode and TFT channel region figure, wherein data line is a broken line shape.
7. IPS type TFT-LCD manufacturing method of array base plate according to claim 6; It is characterized in that; Said step 11 specifically comprises: deposition layer of transparent conductive film on substrate, through the common pattern of electrodes of several mutually nested rhombuses of composition technology formation; Deposit one deck grid metallic film, on substrate, form the grid line figure of gate electrode and transverse crease lines shape through composition technology.
8. IPS type TFT-LCD manufacturing method of array base plate according to claim 6; It is characterized in that; Said step 11 specifically comprises: deposition one deck grid metallic film on substrate forms the common pattern of electrodes of the grid line of gate electrode, the transverse crease lines shape rhombus mutually nested with several on substrate through composition technology.
9. IPS type TFT-LCD manufacturing method of array base plate according to claim 6; It is characterized in that; Said step 12 specifically comprises: metallic film is leaked in depositing semiconductor layers, doping semiconductor layer and source successively on the substrate of completing steps 11; Adopt shadow tone or gray mask plate through composition technology, on substrate, form the data line figure of source electrode, drain electrode, TFT channel region and longitudinal broken line shape.
10. IPS type TFT-LCD manufacturing method of array base plate according to claim 6; It is characterized in that; Said step 12 specifically comprises: depositing semiconductor layers and doping semiconductor layer successively on the substrate of completing steps 11; Adopt the normal masks plate through composition technology, on substrate, form active layer pattern; Metallic film is leaked in deposition one deck source, adopts the normal masks plate through composition technology, on substrate, forms the data line figure of source electrode, drain electrode, TFT channel region and longitudinal broken line shape.
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| CN103217842B (en) * | 2012-01-20 | 2016-06-08 | 群康科技(深圳)有限公司 | Dot structure |
| CN102981337B (en) * | 2012-12-07 | 2016-01-13 | 京东方科技集团股份有限公司 | Tft-lcd display panel and display device |
| CN102983103B (en) * | 2012-12-10 | 2015-09-16 | 京东方科技集团股份有限公司 | Make the method for thin-film transistor array base-plate, array base palte and display unit |
| CN103680325A (en) * | 2013-12-17 | 2014-03-26 | 京东方科技集团股份有限公司 | Display substrate, display panel and stereoscopic display device |
| CN110780500A (en) * | 2019-11-15 | 2020-02-11 | 京东方科技集团股份有限公司 | Array substrate, light control panel and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6297866B1 (en) * | 1997-09-08 | 2001-10-02 | Lg. Philips Lcd Co., Ltd. | In-plane switching mode liquid crystal display device |
| CN1470907A (en) * | 2002-07-24 | 2004-01-28 | Nec液晶技术株式会社 | Active-matrix liquid crystal display device and making method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6297866B1 (en) * | 1997-09-08 | 2001-10-02 | Lg. Philips Lcd Co., Ltd. | In-plane switching mode liquid crystal display device |
| CN1470907A (en) * | 2002-07-24 | 2004-01-28 | Nec液晶技术株式会社 | Active-matrix liquid crystal display device and making method thereof |
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