KR20070080052A - Liquid crystal display and manufacturing method thereof - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a method for manufacturing the same are provided to prevent texture defect even though column spacers are moved, by forming at least one of a storage protrusion and a bridge electrode connected to the storage protrusion to be parallel with a side of a pixel electrode so as to form a fringe field. A gate lines(21) and a data line cross each other to define a pixel region. A pixel electrode(100) is formed within the pixel region. The pixel electrode has a sloping side adjacent to a crossing portion of the gate line and the data line. A storage line(22) is formed in parallel with the gate line to supply a storage voltage. A storage protrusion(23) is protruded from the storage line, wherein the storage protrusion overlaps one side of the pixel electrode adjacent to the data line. One side of the storage protrusion is formed in parallel with the sloping side of the pixel electrode.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF}

1 is a plan view illustrating a thin film transistor substrate according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a cross section taken along line II ′ of the thin film transistor substrate illustrated in FIG. 1.

3A to 3E are cross-sectional views sequentially illustrating a method of manufacturing a thin film transistor substrate according to a first embodiment of the present invention.

4 is an enlarged plan view illustrating a thin film transistor substrate according to a second exemplary embodiment of the present invention.

5 is a cross-sectional view illustrating a cross section taken along line II-II ′ of the thin film transistor substrate illustrated in FIG. 4.

6A through 6E are cross-sectional views illustrating a method of manufacturing a thin film transistor substrate according to a second exemplary embodiment of the present invention.

<Brief Description of Drawings>

10 substrate 20 gate electrode

21: gate line 22: storage line

23: storage protrusion 30: gate insulating film

31: semiconductor layer 32: ohmic contact layer

40: drain electrode 50: source electrode

60: data line 70: pixel contact hole

80, 81: first and second contact holes 90: protective film

100: pixel electrode 101, 102: slit

110: bridge electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method of manufacturing the same, which prevent display defects due to texture defects around the edges of pixel electrodes due to movement of column spacers.

In general, a liquid crystal display (LCD), which is one of flat panel displays, has advantages such as small size, light weight, and low power consumption compared to cathode ray tube (CRT). It is widely used in TVs and the like, and the demand for liquid crystal display devices is continuously increasing.

A liquid crystal display generally injects liquid crystal between a color filter substrate on which a common electrode and a color filter are formed, and a color filter substrate on which a thin film transistor and a pixel electrode are formed, and applies different potentials to the pixel electrode and the common electrode. By forming an electric field to change the arrangement of the liquid crystal molecules, and through this to adjust the transmittance of light to express the image.

Among them, the vertical alignment mode liquid crystal display in which the long axis of the liquid crystal molecules are arranged perpendicular to the upper and lower substrates without an electric field is applied, and thus, the contrast ratio is large and the wide viewing angle is easily realized.

Means for implementing a wide viewing angle in a vertical alignment mode liquid crystal display include a method of forming an incision pattern on the electrode and a method of forming protrusions. All of these are methods of securing a wide viewing angle by forming a fringe field and evenly dispersing the tilting direction of the liquid crystal in four directions. Among these, the patterned vertically aligned (PVA) mode, which forms an incision pattern on the electrode, is recognized as a wide viewing angle technology that can replace the in plane switching (IPS) mode.

In addition, the PVA mode has relatively fast response characteristics compared to the twisted nematic (TN) method because the liquid crystal molecules do not twist and move only by the elasticity that is splayed or bent in the direction perpendicular to the electric field direction.

However, when the column spacer formed to maintain the cell gap between the upper substrate on which the color filter is formed and the lower substrate on which the thin film transistor is formed is moved by an external physical impact, the liquid crystal display device is poor due to texture control failure in the corner region of the pixel electrode. Poor display occurs. In particular, when a shock is applied to the column spacer adjacent to the blue pixel region, such texture defects occur. Even when the column spacer is restored to its original position, the blue pixel region does not restore the texture defect and the luminance decreases, so that the yellow line is recognized as a horizontal defect and yellow. Wish (Yellowish) occurs.

Accordingly, an aspect of the present invention provides a liquid crystal display device which prevents display defects by modifying a shape of a storage protrusion of a region where a column spacer is formed or a bridge electrode connecting a storage protrusion and a storage line. It is to provide a method for producing the same.

In order to achieve the above object, the present invention provides a pixel electrode having a gate line and a data line defining a pixel region in an intersecting structure, and a pixel electrode formed in the pixel region and having one side of the gate line and the data line adjacent to an intersection of the gate line and the data line inclined. And a storage line formed in parallel with the gate line to supply a storage voltage, and a storage protrusion protruding from the storage line to overlap one side of the pixel electrode adjacent to the data line, and one side of the storage protrusion. A side of the pixel electrode is provided in parallel with the inclined side of the pixel electrode.

The liquid crystal display according to the present invention further includes a bridge electrode electrically connected to the storage protrusion and the next storage line.

Here, one side of the bridge electrode is formed in parallel with the inclined one side of the pixel electrode.

In addition, the pixel electrode further includes a plurality of slits.

In order to achieve the above object, a method of manufacturing a liquid crystal display device according to the present invention comprises the steps of forming a gate line and a data line defining a pixel region in an intersecting structure, formed in the pixel region, the gate line and Forming a pixel electrode in which one side of the data line is inclined adjacent to an intersection of the data line, forming a storage line formed in parallel with the gate line to supply a storage voltage, and one side of the storage protrusion of the pixel electrode And a storage protrusion formed to be parallel to one side of the inclined side and protruding from the storage line to overlap one side of the pixel electrode adjacent to the data line.

The method may further include forming a bridge electrode connecting the storage protrusion and the next storage line.

The method may further include forming one side of the bridge electrode in parallel with an inclined side of the pixel electrode.

The forming of the pixel electrode may further include forming a plurality of slits in the pixel electrode.

Other objects and advantages of the present invention in addition to the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view illustrating a thin film transistor substrate according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along a line II ′ of the thin film transistor substrate illustrated in FIG. 1.

1 and 2, the thin film transistor substrate according to the first exemplary embodiment of the present invention is formed in the pixel region with the gate line 21 and the data line 60 defining the pixel region in an intersecting structure, and the gate One side of the line electrode adjacent to the intersection of the line 21 and the data line 60 is formed to be inclined, and the storage line 22 and the storage line are formed in parallel with the gate line 21 to supply a storage voltage. A storage protrusion 23 protruding from the data line 60 and overlapping with one side of the pixel electrode 100 adjacent to the data line 60, and one side of the storage protrusion 23 is inclined to the pixel electrode 100. It is formed parallel to the sides.

Specifically, the gate line 21 supplies a scan signal, and the data line 60 supplies an image data signal. The gate line 21 and the data line 60 cross each other with the gate insulating layer 30 therebetween to define a pixel area. In the pixel region, a thin film transistor connected to the gate line 21 and the data line 60 is formed.

The thin film transistor includes a gate electrode 20 connected to the gate line 21, a source electrode 50 connected to the data line 60, a drain electrode 40 connected to the pixel electrode 100, and a gate electrode 20. And a semiconductor layer 31 overlapping with the gate insulating layer 30 therebetween to form a channel between the source electrode 50 and the drain electrode 40. In addition, the thin film transistor further includes an ohmic contact layer 32 for ohmic contact between the source electrode 50 and the drain electrode 40 and the semiconductor layer 31. The thin film transistor supplies the image data signal of the data line 60 to the pixel electrode 100 in response to the scan signal of the gate line 21.

The pixel electrode 100 is formed on the passivation layer 90 covering the thin film transistor and is connected to the drain electrode 40 via the pixel contact hole 70 passing through the passivation layer 90. When the image data signal from the thin film transistor is supplied, the pixel electrode 100 drives the liquid crystal with a voltage difference from the common electrode of the color filter substrate to adjust the light transmittance. The pixel electrode 100 includes a plurality of slits 101 and 102 to divide the pixel region into a plurality of domains. The plurality of slits include first and second slits 101 and 102 which are symmetrically disposed at upper and lower sides with respect to the short axis direction of the pixel electrode 100 and have an inclination angle. In this case, the first and second slits 101 and 102 are formed perpendicular to each other. The first and second slits 101 and 102 distribute the directions of the fringe field evenly in a plurality of directions to form a plurality of domains in one pixel. Here, the pixel electrode 100 is formed such that one side of the pixel electrode 100 adjacent to the intersection of the gate line 21 and the data line 60 is inclined. That is, one side of the corner portion of the pixel electrode 100 is formed to be inclined to avoid overlapping of the bridge protrusion 110 connecting the storage protrusion 23 and the next storage line 22 and avoid overlapping of the thin film transistor. .

The storage line 22 is formed in parallel with the gate line 21 to supply a storage voltage. And a storage protrusion 23 protruding from the storage line 22 to be parallel to the data line 60. The storage line 22 and the storage protrusion overlap the pixel electrode 100.

The storage protrusion 23 overlaps one side of the pixel electrode 100 adjacent to the data line 60 and is formed to be parallel to the data line 60. The end of the storage protrusion 23 is connected to the next storage line 22 and the bridge electrode 110. Here, one side of the storage protrusion 23 is formed in parallel with the inclined side of the pixel electrode 100 to form a fringe field between the pixel electrodes 100. Accordingly, even when a flow of the column spacer due to an external physical impact occurs in the area A where the column spacer is formed, the fringe field is formed between one side of the end of the storage protrusion and one side of the corner of the pixel electrode 100. There is no texture defect. As a result, the display quality of the liquid crystal display device is improved. In particular, the column spacer is positioned adjacent to the blue pixel, and yellowish occurrence due to the movement of the column spacer can be prevented.

 The end of the storage protrusion 23 further includes a first contact hole 80 for connection with the next storage line 22 and a second contact hole 81 in a predetermined region of the next storage line 22. Equipped. The storage protrusion 23 and the next storage line 22 are electrically connected to each other through the bridge electrode 110.

The bridge electrode 110 is connected to the storage protrusion 23 and the next storage line 22 via the first and second contact holes 80 and 81. The bridge electrode 110 is formed of a transparent electrode such as indium tin oxide (ITO) or indium zinc oxide (IZO).

3A through 3E are cross-sectional views sequentially illustrating a method of manufacturing a thin film transistor substrate according to an exemplary embodiment of the present invention.

Referring to FIG. 3A, a first line including a gate line 21, a gate electrode 20, a storage line 22, and a storage protrusion 23 having one side side inclined on the substrate 10 through a first mask process. A conductive pattern group is formed.

Specifically, the first conductive layer is formed on the substrate 10 through a deposition method such as sputtering. The first conductive layer is formed of a single layer of metals or alloys thereof, such as aluminum, chromium, copper, molybdenum, and the like, or a multi-layer structure composed of a combination thereof. Subsequently, the first conductive layer includes the gate line 21, the gate electrode 20, the storage line 22, and the storage protrusion 23 by patterning the first conductive layer by a photolithography process and an etching process using the first mask. A pattern group is formed. In particular, the storage protrusion 23 is formed such that an end thereof has one side parallel to an inclined side of the pixel electrode 100 to be formed later.

Referring to FIG. 3B, the gate insulating layer 30, the semiconductor layer, and the ohmic contact layer are sequentially stacked on the substrate on which the first conductive pattern group is formed through the second mask process.

Specifically, the gate insulating film 30, the amorphous silicon layer, and the high concentration doped on the substrate 10 on which the gate line 21, the gate electrode 20, the storage line 22, and the storage protrusion 23 are formed. An amorphous silicon layer is sequentially deposited through a deposition method such as plasma enhanced chemical vapor deposition (PEVCD). Subsequently, the semiconductor layer and the ohmic contact layer are formed by patterning the amorphous silicon layer and the heavily doped amorphous silicon layer by a photolithography process and an etching process using the second mask. As the gate insulating film 30, an inorganic insulating material such as SiNx or SiOx is used.

Referring to FIG. 3C, a second conductive pattern group including a data line 60, a source electrode 50, and a drain electrode 40 on a gate insulating layer 30 on which a semiconductor layer and an ohmic contact layer are formed through a third mask process. Is formed.

In detail, the data line 60 is formed on the gate insulating layer 30 in parallel with the storage protrusion 23, and the drain electrode 40 is formed on the gate insulating layer having the semiconductor layer 31 and the ohmic contact layer 32 formed thereon. The source electrode 50 is formed on the gate insulating layer 30 formed on the semiconductor layer 31 and the ohmic contact layer 32 to protrude from the data line 60 to face the drain electrode 40. The second conductive pattern group is formed by forming a second conductive layer through a deposition method such as sputtering, and then patterning the second conductive layer by a photolithography process and an etching process using a third mask process. As the second conductive layer, metals such as aluminum, chromium, copper and molybdenum or alloys thereof are formed in a single layer or in a multi-layer structure composed of a combination thereof.

Referring to FIG. 3D, the passivation layer 90 having the pixel contact hole 70 and the first and second contact holes 80 and 81 on the gate insulating layer 30 on which the second conductive pattern group is formed through the fourth mask process. Is formed.

In detail, the passivation layer 90 is formed on the substrate on which the second conductive pattern group is formed through a deposition method such as PECVD or spin coating, and penetrates the passivation layer 90 by a photolithography process and an etching process using a fourth mask. The pixel contact hole 70 exposing the drain electrode 40, the first contact hole 80 exposing the end of the storage protrusion 23 through the gate insulating layer 30 and the passivation layer 90, and the next end. The second contact hole 81 is formed in a predetermined region of the storage line 22. As the protective film 90, an inorganic insulating material such as the gate insulating film 30 is used, or an organic insulating material is used.

Referring to FIG. 3E, the pixel electrode 100 and the bridge electrode 110 are formed on the passivation layer 90 through a fifth mask process.

Specifically, the pixel electrode 100 and the bridge electrode 110 are formed on the passivation layer 90 by sputtering or the like, and then pattern the transparent conductive layer by photolithography and etching using a fifth mask. Is formed. At this time, the first and second slits 101 and 102 are patterned in the pixel electrode 100. The bridge electrode 110 connecting the end of the storage protrusion 23 and the next storage line 22 is patterned. Here, each side of the pixel electrode 100 is formed to be inclined at one side to avoid overlapping with the thin film transistor and the bridge electrode 110. As the transparent conductive layer, transparent conductive materials such as indium tin oxide (ITO), indium zinc oxide (IZO), and tin oxide (TO) are used. The pixel electrode 100 is connected to the drain electrode 40 through the pixel contact hole 70, and the bridge electrode is connected to the storage protrusion 23 and the next storage line through the first and second contact holes 80 and 81. And 22, respectively.

4 is a plan view illustrating a thin film transistor substrate according to a second exemplary embodiment of the present invention, and FIG. 5 is a cross-sectional view illustrating a cross section taken along line II-II ′ of the thin film transistor substrate illustrated in FIG. 4.

4 and 5 have the same components except that the shape of the bridge electrode 110 that is connected to the end of the storage protrusion 23 in contrast to FIGS. 1 and 2 has the same components, thus overlapping the same components. The description will be omitted.

4 and 5, the thin film transistor substrate according to the second exemplary embodiment of the present invention is formed in the pixel region with the gate line 21 and the data line 60 defining the pixel region in an intersecting structure, and the gate One side of the line electrode adjacent to the intersection of the line 21 and the data line 60 is formed to be inclined, and the storage line 22 and the storage line are formed in parallel with the gate line 21 to supply a storage voltage. And a storage protrusion 23 protruding from the data line 60 and overlapping one side of the pixel electrode 100 adjacent to the data line 60, and connecting the storage protrusion 23 and the next storage line 22 to each other. An electrode 110 is provided, and one side of the bridge electrode 110 is formed in parallel with the inclined one side of the pixel electrode 100.

In detail, the bridge electrode 110 electrically connects the storage protrusion 23 and the next storage line 22. The bridge electrode 110 is formed of the same transparent metal as the pixel electrode 100. One side of the pixel electrode 100 adjacent to the intersection of the gate line 21 and the data line 60 is inclined. In this case, the bridge electrode 110 is formed to have one side side in parallel with the inclined side of the pixel electrode 100. Accordingly, a fringe field is formed between the bridge electrode 110 and the pixel electrode 100 to control the liquid crystal formed in the corner portion of the pixel electrode 100.

Subsequently, in the liquid crystal display, a column spacer is positioned in an area A overlapping the gate line 21 and the bridge electrode 110. At this time, even if the external physical shock occurs, even if the column spacer moves, a fringe field is formed between the bridge electrode 110 and the pixel electrode 100 to prevent the occurrence of abnormal texture, thereby displaying the liquid crystal display device. The quality is improved. In particular, the column spacer is positioned adjacent to the blue pixel, and yellowish occurrence due to the movement of the column spacer can be prevented.

6A through 6E are cross-sectional views sequentially illustrating a method of manufacturing a thin film transistor substrate according to a second exemplary embodiment of the present invention.

6A to 6E illustrate one end of the bridge electrode 110 without forming the end of the storage protrusion 23 in parallel with the edge of the pixel electrode 100 as compared with FIGS. 3A to 3E. Since it is manufactured by the method except that it is formed to be parallel to the edges, duplicate descriptions will be omitted.

Referring to FIG. 6A, a first conductive pattern group including a gate line 21, a gate electrode 20, a storage line 22, and a storage protrusion 23 on a substrate 10 through a first mask process. Is formed.

Specifically, the first conductive layer is formed on the substrate 10 through a deposition method such as sputtering. The first conductive layer is formed of a single layer of metals or alloys thereof, such as aluminum, chromium, copper, molybdenum, and the like, or a multi-layer structure composed of a combination thereof. Subsequently, the first conductive layer includes the gate line 21, the gate electrode 20, the storage line 22, and the storage protrusion 23 by patterning the first conductive layer by a photolithography process and an etching process using the first mask. A pattern group is formed.

6B to 6D are the same as the above-described process, and thus a detailed description thereof will be omitted.

Referring to FIG. 6E, the pixel electrode 100 and the bridge electrode 110 are formed on the passivation layer 90 through a fifth mask process.

Specifically, the pixel electrode 100 and the bridge electrode 110 are formed on the passivation layer 90 by sputtering or the like, and then pattern the transparent conductive layer by photolithography and etching using a fifth mask. Is formed. At this time, the first and second slits 101 and 102 are patterned in the pixel electrode 100. Here, the corners of the pixel electrode 100 are formed in a diagonal cut shape to avoid overlapping with the bridge electrode 110. The bridge electrode 110 connecting the end of the storage protrusion 23 and the next storage line 22 is patterned. In particular, one side of the bridge electrode 110 is patterned to be parallel to the edge of the pixel electrode 100. As a result, a fringe field is formed between the bridge electrode 110 and the pixel electrode 100. Here, as the transparent conductive layer, a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (TO), or the like is used. The pixel electrode 100 is connected to the drain electrode 40 through the pixel contact hole 70, and the bridge electrode 110 is connected to the storage protrusion 23 and the next through the first and second contact holes 80 and 81. However, they are connected to the storage lines 22, respectively.

As described above, the liquid crystal display according to the exemplary embodiment of the present invention and a manufacturing method thereof according to the present invention include at least one of a storage protrusion or a bridge electrode connected to the pixel electrode in a vertical alignment liquid crystal display, which is formed side by side at the edge of the pixel electrode. By forming the field, poor texture can be prevented even in the flow of the column spacer, thereby improving display quality.

The present invention described above will be capable of various substitutions, modifications and changes by those skilled in the art to which the present invention pertains. Therefore, the present invention should not be limited to the above-described embodiments and the accompanying drawings, and the rights thereof should be determined by the claims.

Claims (8)

A gate line and a data line defining the pixel region in an intersection structure; A pixel electrode formed in the pixel region, the one side of the pixel electrode being inclined adjacent to the intersection of the gate line and the data line; A storage line formed in parallel with the gate line to supply a storage voltage; And A storage protrusion protruding from the storage line and overlapping with one side of the pixel electrode adjacent to the data line; Wherein one side of the storage protrusion is formed parallel to the one side of the pixel electrode. The method of claim 1, And a bridge electrode electrically connected to the storage protrusion and the next storage line. The method of claim 2, Wherein one side of the bridge electrode is formed in parallel with the inclined side of the pixel electrode. The method of claim 3, wherein And the pixel electrode further comprises a plurality of slits. Forming a gate line and a data line defining a pixel region in an intersection structure; Forming a pixel electrode formed in the pixel region, the one side of which is inclined adjacent to the intersection of the gate line and the data line; Forming a storage line formed in parallel with the gate line to supply a storage voltage; Forming a storage protrusion formed on one side of the storage protrusion in parallel with an inclined side of the pixel electrode and protruding from the storage line to overlap one side of the pixel electrode adjacent to the data line; Liquid crystal display device characterized in that. The method of claim 5, And forming a bridge electrode connecting the storage protrusion and the next storage line. The method of claim 6, And forming one side of the bridge electrode in parallel with an inclined side of the pixel electrode. The method of claim 5, Forming the pixel electrode And forming a plurality of slits in the pixel electrode.

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