CN110164894A - A kind of bonding method - Google Patents
A kind of bonding method Download PDFInfo
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- CN110164894A CN110164894A CN201910450592.XA CN201910450592A CN110164894A CN 110164894 A CN110164894 A CN 110164894A CN 201910450592 A CN201910450592 A CN 201910450592A CN 110164894 A CN110164894 A CN 110164894A
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- 238000000034 method Methods 0.000 title claims abstract description 49
- 239000011248 coating agent Substances 0.000 claims abstract description 48
- 238000000576 coating method Methods 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 238000002161 passivation Methods 0.000 claims abstract description 28
- 238000000137 annealing Methods 0.000 claims abstract description 11
- 230000008569 process Effects 0.000 claims abstract description 11
- 239000000126 substance Substances 0.000 claims abstract description 6
- 238000005498 polishing Methods 0.000 claims abstract description 5
- 238000000151 deposition Methods 0.000 claims abstract description 4
- 238000003701 mechanical milling Methods 0.000 claims abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 48
- 239000000377 silicon dioxide Substances 0.000 claims description 24
- 235000012239 silicon dioxide Nutrition 0.000 claims description 22
- 230000002209 hydrophobic effect Effects 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 239000010410 layer Substances 0.000 claims 12
- 239000011247 coating layer Substances 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 12
- 230000003287 optical effect Effects 0.000 abstract description 7
- 239000011148 porous material Substances 0.000 abstract description 3
- 235000012431 wafers Nutrition 0.000 description 18
- 230000001678 irradiating effect Effects 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000008901 benefit Effects 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical group CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 150000002927 oxygen compounds Chemical class 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000012163 sequencing technique Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/1469—Assemblies, i.e. hybrid integration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
- H01L2224/83375—Bonding interfaces of the semiconductor or solid state body having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
- H01L2224/83379—Material
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The present invention provides a kind of bonding methods, comprising: provides the first substrate as carrying tablet, deposits the first oxide skin(coating) on first substrate；The second substrate is provided, and in the second substrate surface depositing second oxide layer, and surface polishing is carried out by chemical mechanical milling tech；One layer of passivation dielectric layer is deposited on second oxide skin(coating)；Third oxide skin(coating) is deposited on the passivation dielectric layer；Using plasma irradiates first oxide skin(coating) and the third oxide layer surface, and first oxide skin(coating) and the third oxide skin(coating) are fitted to together；First substrate, the first oxide skin(coating), the second substrate, the second oxide skin(coating), passivation dielectric layer and third oxide skin(coating) are subjected to annealing process.So that will not be reacted with wafer during subsequent anneal and generate the steam being gathered at bonded interface, Residual Pores quantity in back-illuminated type CMOS optical sensor bonding technology is reduced to reach, improves bond strength.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly, to a kind of bonding method.
Background technique
With the raising of CMOS technology level, CMOS optical sensor by it is low in energy consumption, at low cost, small in size, can be random
The series of advantages such as reading, realize the extensive use in field of consumer electronics such as tablet computer, smart phones.Back side illuminaton
Technology (BSI) is to aid in one of the key factor that CMOS optical sensor realizes breakthrough performance.It is tied in traditional positive illuminated (FSI)
In structure, incident light will reach photodiode and be absorbed, it is necessary first to across the light of at least 2~3 layers of dielectric composition
Road " tunnel " and metal wiring layer.During this period, portions incident photon is by the reflection by front insulating layer and metal wiring layer
And in returning air, cause the decrease of sensitivity under the reduction and low illumination of fill factor.BSI technology is exactly tied relative to FSI
Structure and propose.Script is hindered the metal of optical path by just will integrally overturn according to device layer in structure with metal layer by the structure
Wiring layer is moved to the optical path other side, and incident light can directly reach photodiode by the back side of substrate, so significantly reduce
Diffraction and crosstalk of the metal wiring layer to photon, the improvement of these performances is so that BSI has become in CMOS optical sensor
Mainstream dot structure.
However the processing step of BSI structure is more complicated, one of step is exactly the device that will have photodiode
After wafer overturning, the bonding technology being combined into one with tabula rasa carrying tablet, to ensure device wafer in subsequent reduction process
Mechanical strength.The technique is two panels mirror finish silicon wafer (oxidation or not aoxidizing) through surface clean and pretreatment
Afterwards, it directly fits at room temperature, improves bond strength using annealing, and then two wafers are combined into an entirety
Technology.Its process performance index includes two broad aspects: energy to failure (2.5J/m2) of the bond strength close to silicon base material；Two,
Without residual bubbles (hole) between the bonded interface of wafer, these two aspects index will directly affect the final performance of device finished product.
The characteristics of process of wafer current bonding mainstream the most is room-temperature plasma activated bond method, this method be
After the mirror finish wafer surface cleaning of above-mentioned two panels, using plasma irradiating crystal column surface (or being referred to as to activate), and
Afterwards two wafers are bonded to together in advance again, sufficiently high bond strength is reached after low-temperature annealing.Due to the production of plasma
Raw and whole bonding process can all carry out under rough vacuum environment or atmosphere, not need high vacuum system, it is easy to operate and
Advantage of lower cost receives the attention of researcher and industry.But the technique is the problem is that during low-temperature annealing,
Often occurs a large amount of bubble among the bonded interface of two wafers, these annealing bubbles seriously reduce the quality of device and reliable
Property.
Summary of the invention
The purpose of the present invention is to provide a kind of bonding methods, can provide bonding performance, to improve CMOS optics biography
The q&r of sensor.
In order to achieve the above object, the present invention provides a kind of bonding methods, comprising:
The first substrate is provided as carrying tablet, deposits the first oxide skin(coating) on first substrate；
The second substrate is provided, and in the second substrate surface depositing second oxide layer, and passes through chemical mechanical grinding
Technique carries out surface polishing；
One layer of passivation dielectric layer is deposited on second oxide skin(coating)；
Third oxide skin(coating) is deposited on the passivation dielectric layer；
Using plasma irradiates first oxide skin(coating) and the third oxide layer surface, and by described first
Oxide skin(coating) and the third oxide skin(coating) fit to together；
By first substrate, the first oxide skin(coating), the second substrate, the second oxide skin(coating), passivation dielectric layer and third oxygen
Compound layer carries out annealing process.
Optionally, in the bonding method, the passivation dielectric layer is with hydrophobic media coating.
Optionally, in the bonding method, the material of the passivation dielectric layer includes doped silicon carbide film.
Optionally, in the bonding method, the passivation dielectric layer with a thickness of 5nm~50nm.
Optionally, in the bonding method, the plasma can be O2、N2、H2Or the gas ionizations such as Ar are produced
Raw plasma.
Optionally, in the bonding method, second substrate is the crystalline substance for having formed detected pixel point functional structure
Circle.
Optionally, in the bonding method, first substrate is the wafer with alignment patterns.
Optionally, in the bonding method, the temperature of the annealing process is 200 DEG C~400 DEG C.
Optionally, in the bonding method, the temperature of first oxide skin(coating) and second oxide skin(coating) fitting
Degree is 16 DEG C~26 DEG C.
Optionally, in the bonding method, first oxide skin(coating), second oxide skin(coating) and the third
Oxide skin(coating) is silicon dioxide layer.
In bonding method provided by the invention, increase between the second oxide skin(coating) and third oxide skin(coating) of the second substrate
One layer has hydrophobic passivation dielectric layer, by the second oxide skin(coating) described in plasma irradiating and the third oxide skin(coating) table
The superfluous water molecule generated when face isolates from except the first substrate (wafer), so that will not be anti-with wafer during subsequent anneal
It answers and generates the steam being gathered at bonded interface, reduce remnants in back-illuminated type CMOS optical sensor bonding technology to reach
Stomata quantity improves bond strength.
Detailed description of the invention
Fig. 1 is the flow chart of the bonding method of the embodiment of the present invention；
Fig. 2 to Fig. 4 is the diagrammatic cross-section of the bonding method of the embodiment of the present invention；
In figure: the first substrate of 110-, the first silicon dioxide layer of 120-, the second substrate of 210-, the second silicon dioxide layer of 220-,
230- passivation dielectric layer, 240- third silicon dioxide layer.
Specific embodiment
A specific embodiment of the invention is described in more detail below in conjunction with schematic diagram.According to following description and
Claims, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified form and
Using non-accurate ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
Hereinafter, term " first " " second " etc. is used between similar element distinguish, and is not necessarily for retouching
State certain order or time sequencing.It is appreciated that in the appropriate case, these terms so used are replaceable.Similar, if
Method described herein includes series of steps, and the sequence of these steps presented herein is not necessarily that these can be performed
The unique order of step, and some steps can be omitted and/or some other steps not described herein can be added
To this method.
At present in the bonding technology done, bonded interface is TEOS and Oxide, since TEOS film is easy to absorb steam,
It in after the completion of bonding technology, can be released in bonded interface, to influence the effect of bonding.
Referring to Fig.1, the present invention provides a kind of bonding methods, comprising:
S11: the first substrate is provided as carrying tablet, deposits the first oxide skin(coating) on first substrate；
S12: the second substrate is provided, and in the second substrate surface depositing second oxide layer, and passes through chemical machinery
Grinding technics carries out surface polishing；
S13: one layer of passivation dielectric layer is deposited on second oxide skin(coating)；
S14: third oxide skin(coating) is deposited on the passivation dielectric layer；
S15: using plasma irradiates first oxide skin(coating) and the third oxide layer surface, and will be described
First oxide skin(coating) and the third oxide skin(coating) fit to together；
S16: by first substrate, the first oxide skin(coating), the second substrate, the second oxide skin(coating), passivation dielectric layer and
Trioxide layer carries out annealing process.
Referring to Fig. 2, one first substrate 110 is provided, the first substrate 110 can be the wafer for there are alignment patterns, in institute
State one first silicon dioxide layer 120 of formation on the first substrate 110.
Referring to Fig. 3, one second substrate 210 is provided, the second substrate 210 can be one and form detection picture on surface
The wafer of the CIS device of vegetarian refreshments functional structure forms the second oxide skin(coating) 220 on the second substrate 210, and passes through chemical machinery
Grinding technics carries out surface polishing to the second silicon dioxide layer 220, and one layer of passivation is deposited in second silicon dioxide layer 220
Dielectric layer 230, the material of the passivation dielectric layer 220 are doped silicon carbide film, passivation dielectric layer with a thickness of 5nm~
50nm, the passivation dielectric layer 230 have hydrophobicity, and third silicon dioxide layer 240 is formed on the passivation dielectric layer 230.
Referring to Fig. 4, using plasma irradiates first silicon dioxide layer 120 and the third silicon dioxide layer 240
Surface, plasma can be O2、N2、H2Or plasma caused by the gas ionizations such as Ar.By the first silicon dioxide layer 120
It is opposite with third silicon dioxide layer 240 to fit together, after such first dioxide layer 120 and the bonding of third dioxide layer 240,
It can be by the first substrate 110, the first silicon dioxide layer 120, the second substrate 210, the second silicon dioxide layer 220, dielectric passivation
Layer 230 and third silicon dioxide layer 240 are combined together.In the prior art, the first silicon dioxide layer described in plasma irradiating
In the third silica layer surface, can generate extra moisture continue during subsequent anneal infiltration and it is anti-with wafer
It answers, a large amount of moisture convergences of generation form bonded interface bubble, influence bond strength, the final quality for influencing product and reliable
Property.
Adding one layer in inventive embodiments has hydrophobic passivation dielectric layer 230, by described in plasma irradiating first
The superfluous water molecule absorption generated when silicon dioxide layer 120 and 240 surface of third silicon dioxide layer, so that in subsequent anneal
It will not be reacted in the process with wafer and generate the steam being gathered at bonded interface, passed to reach and reduce back-illuminated type CMOS optics
Residual Pores quantity in sensor bonding technology improves bond strength.
To sum up, in bonding method provided in an embodiment of the present invention, in the second silicon dioxide layer and third of the second substrate
Increasing by one layer between silicon dioxide layer has hydrophobic passivation dielectric layer, by the first silicon dioxide layer described in plasma irradiating
It is isolated from except the first substrate (wafer) with the superfluous water molecule generated when the third silica layer surface, so that subsequent
It will not be reacted with wafer in annealing process and generate the steam being gathered at bonded interface, reduce back-illuminated type CMOS light to reach
Residual Pores quantity in sensor bonding technology is learned, bond strength is improved.
The above is only a preferred embodiment of the present invention, does not play the role of any restrictions to the present invention.Belonging to any
Those skilled in the art, in the range of not departing from technical solution of the present invention, to the invention discloses technical solution and
Technology contents make the variation such as any type of equivalent replacement or modification, belong to the content without departing from technical solution of the present invention, still
Within belonging to the scope of protection of the present invention.
Claims (10)
1. a kind of bonding method characterized by comprising
The first substrate is provided as carrying tablet, deposits the first oxide skin(coating) on first substrate；
The second substrate is provided, and in the second substrate surface depositing second oxide layer, and passes through chemical mechanical milling tech
Carry out surface polishing；
One layer of passivation dielectric layer is deposited on second oxide skin(coating)；
Third oxide skin(coating) is deposited on the passivation dielectric layer；
Using plasma irradiates first oxide skin(coating) and the third oxide layer surface, and described first is aoxidized
Nitride layer and the third oxide skin(coating) fit to together；
By first substrate, the first oxide skin(coating), the second substrate, the second oxide skin(coating), passivation dielectric layer and third oxide
Layer carries out annealing process.
2. bonding method as described in claim 1, which is characterized in that the passivation dielectric layer is with hydrophobic deielectric-coating
Layer.
3. bonding method as claimed in claim 2, which is characterized in that the material of the passivation dielectric layer includes doped silicon carbide
Film.
4. bonding method as claimed in claim 2, which is characterized in that the passivation dielectric layer with a thickness of 5nm~50nm.
5. bonding method as described in claim 1, which is characterized in that the plasma can be O2、N2、H2Or the gas such as Ar
Plasma caused by volume ionization.
6. bonding method as described in claim 1, which is characterized in that second substrate is to have formed detected pixel point function
The wafer of structure.
7. bonding method as described in claim 1, which is characterized in that first substrate is the wafer with alignment patterns.
8. bonding method as described in claim 1, which is characterized in that the temperature of the annealing process is 200 DEG C~400 DEG C.
9. bonding method as described in claim 1, which is characterized in that first oxide skin(coating) and second oxide skin(coating)
The temperature of fitting is 16 DEG C~26 DEG C.
10. bonding method as described in claim 1, which is characterized in that first oxide skin(coating), second oxide skin(coating)
It is silicon dioxide layer with the third oxide skin(coating).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910450592.XA CN110164894A (en) | 2019-05-28 | 2019-05-28 | A kind of bonding method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910450592.XA CN110164894A (en) | 2019-05-28 | 2019-05-28 | A kind of bonding method |
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| CN110164894A true CN110164894A (en) | 2019-08-23 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103065945A (en) * | 2013-01-14 | 2013-04-24 | 陆伟 | Image sensor wafer bonding method |
| CN103832970A (en) * | 2012-11-27 | 2014-06-04 | 中国科学院微电子研究所 | Low-temperature wafer bonding method |
| CN105448645A (en) * | 2014-07-07 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Bonding pad processing method |
-
2019
- 2019-05-28 CN CN201910450592.XA patent/CN110164894A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103832970A (en) * | 2012-11-27 | 2014-06-04 | 中国科学院微电子研究所 | Low-temperature wafer bonding method |
| CN103065945A (en) * | 2013-01-14 | 2013-04-24 | 陆伟 | Image sensor wafer bonding method |
| CN105448645A (en) * | 2014-07-07 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Bonding pad processing method |
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