CN110148603B - Method for manufacturing back-illuminated CMOS optical sensor - Google Patents
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- CN110148603B CN110148603B CN201910450868.4A CN201910450868A CN110148603B CN 110148603 B CN110148603 B CN 110148603B CN 201910450868 A CN201910450868 A CN 201910450868A CN 110148603 B CN110148603 B CN 110148603B
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 230000003287 optical effect Effects 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 238000002161 passivation Methods 0.000 claims abstract description 28
- 230000008569 process Effects 0.000 claims abstract description 23
- 238000000137 annealing Methods 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 238000007517 polishing process Methods 0.000 claims abstract description 10
- 239000000126 substance Substances 0.000 claims abstract description 10
- 238000005498 polishing Methods 0.000 claims abstract description 8
- 230000001678 irradiating effect Effects 0.000 claims abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 50
- 235000012239 silicon dioxide Nutrition 0.000 claims description 25
- 239000000377 silicon dioxide Substances 0.000 claims description 25
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 235000012431 wafers Nutrition 0.000 description 22
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 5
- 239000001257 hydrogen Substances 0.000 description 5
- 229910052739 hydrogen Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 230000002209 hydrophobic effect Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000012466 permeate Substances 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000001994 activation Methods 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000000678 plasma activation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14698—Post-treatment for the devices, e.g. annealing, impurity-gettering, shor-circuit elimination, recrystallisation
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- Engineering & Computer Science (AREA)
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Abstract
The invention provides a method for manufacturing a backside-illuminated CMOS optical sensor, which comprises the following steps: providing a first substrate, depositing a first oxide layer on the surface of the first substrate, and carrying out surface polishing through a chemical mechanical polishing process; providing a second substrate as a bearing sheet, and depositing a passivation dielectric layer on the surface of the second substrate; depositing a second oxide layer on the surface of the passivation dielectric layer, and carrying out surface polishing through a chemical mechanical polishing process; irradiating the surfaces of the first oxide layer and the second oxide layer with plasma, and bonding the first oxide layer and the second oxide layer together; and carrying out annealing process on the first substrate, the first oxide layer, the second substrate, the passivation dielectric layer and the second oxide layer. The added passivation layer can reduce the number of residual air holes in the bonding process of the back-illuminated CMOS optical sensor, and finally, the bonding strength is improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a manufacturing method of a back-illuminated CMOS optical sensor.
Background
With the improvement of the CMOS process level, the CMOS optical sensor realizes wide application in the consumer electronics field such as tablet computers and smart phones by virtue of a series of advantages of low power consumption, low cost, small volume, random reading and the like. Backside illumination technology (BSI) is one of the key factors that help CMOS optical sensors achieve performance breakthrough. In a conventional Front Side Illumination (FSI) structure, incident light first needs to pass through a light path "tunnel" and a metal wiring layer, which are formed by at least 2-3 layers of insulating media, in order to reach and be absorbed by a photodiode. During this time, part of the incident photons will be reflected by the front side insulating layer and the metal wiring layer and return to the air, resulting in a decrease in fill factor and a decrease in sensitivity under low light. BSI techniques are proposed with respect to FSI structures. According to the structure, the device layer and the metal layer in the front lighting structure are integrally turned over, the metal wiring layer which originally obstructs a light path is moved to the other side of the light path, incident light can directly reach the photodiode through the back of the substrate, diffraction and crosstalk of the metal wiring layer to photons are greatly reduced, and BSI becomes a mainstream pixel structure in a CMOS optical sensor increasingly due to improvement of the performances.
However, the process steps of the BSI structure are complicated, and one of the steps is a bonding process in which a device wafer with a photodiode is turned over and then integrated with a light plate carrier to ensure the mechanical strength of the device wafer in a subsequent thinning process. The process is a technology that two mirror polished silicon wafers (oxidized or not oxidized) are directly jointed at room temperature after surface cleaning and pretreatment, and then are annealed to improve bonding strength, so that the two wafers are combined into a whole. The process performance index comprises two major aspects: the bonding strength is close to the fracture energy (2.5J/m2) of the silicon parent material; and secondly, residual bubbles (holes) are not generated between bonding interfaces of the wafers, and the indexes of the two aspects directly influence the final performance of a finished device product.
The most popular process method for wafer bonding at present is a room temperature plasma activation bonding method, which is characterized in that after the surfaces of two mirror polished wafers are cleaned, plasma is used for irradiating the surfaces of the wafers (or called as activation), then the two wafers are bonded together in advance, and the bonding strength is high enough after low-temperature annealing. Because the generation of plasma and the whole bonding process can be carried out in a low-vacuum environment or atmosphere, a high-vacuum system is not needed, the operation is convenient, the cost is relatively low, and the importance of researchers and the industry is paid. However, the process has a problem that a large amount of bubbles often appear between bonding interfaces of two wafers in the low-temperature annealing process, and the quality and reliability of the device are seriously reduced by the annealing bubbles.
Disclosure of Invention
The invention aims to provide a manufacturing method of a backside-illuminated CMOS optical sensor, which can provide bonding performance so as to improve the quality and reliability of the CMOS optical sensor.
In order to achieve the above object, the present invention provides a method for manufacturing a backside illuminated CMOS optical sensor, comprising:
providing a first substrate, depositing a first oxide layer on the surface of the first substrate, and carrying out surface polishing through a chemical mechanical polishing process;
providing a second substrate as a bearing sheet, and depositing a passivation dielectric layer on the surface of the second substrate;
depositing a second oxide layer on the surface of the passivation dielectric layer, and carrying out surface polishing through a chemical mechanical polishing process;
irradiating the surfaces of the first oxide layer and the second oxide layer with plasma, and bonding the first oxide layer and the second oxide layer together;
and carrying out annealing process on the first substrate, the first oxide layer, the second substrate, the passivation dielectric layer and the second oxide layer.
Optionally, in the manufacturing method of the backside illuminated CMOS optical sensor, the passivation dielectric layer is a hydrophobic dielectric film layer.
Optionally, in the manufacturing method of the backside illuminated CMOS optical sensor, the material of the passivation dielectric layer includes silicon nitride.
Optionally, in the method for manufacturing a backside illuminated CMOS optical sensor, the thickness of the passivation dielectric layer is 5 μm to 10 μm.
Optionally, in the method for manufacturing a back-illuminated CMOS optical sensor, the plasma may be generated by ionizing a gas such as O2, N2, H2, or Ar.
Optionally, in the manufacturing method of the backside illuminated CMOS optical sensor, the first substrate is a wafer on which a detection pixel functional structure is formed.
Optionally, in the method for manufacturing a backside illuminated CMOS optical sensor, the second substrate is a non-patterned wafer.
Optionally, in the manufacturing method of the back-illuminated CMOS optical sensor, the temperature of the annealing process is 200 to 400 ℃.
Optionally, in the method for manufacturing a back-illuminated CMOS optical sensor, the temperature at which the first oxide layer and the second oxide layer are bonded is 16 to 26 ℃.
Optionally, in the method for manufacturing a back-illuminated CMOS optical sensor, the first oxide layer and the second oxide layer are both silicon dioxide layers.
In the manufacturing method of the back-illuminated CMOS optical sensor, provided by the invention, a passivation medium layer with hydrophobicity is added between a second substrate and a second layer of silicon dioxide, and redundant water molecules generated when plasma irradiates the surfaces of the first oxide layer and the second oxide layer are isolated outside the second substrate, so that hydrogen bubbles gathered at a bonding interface can not be generated due to reaction with the substrate in the subsequent annealing process, and the quantity of residual air holes in the bonding process of the back-illuminated CMOS optical sensor is reduced, and the bonding strength is improved.
Drawings
FIG. 1 is a flow chart of a method of fabricating a backside illuminated CMOS optical sensor of an embodiment of the present invention;
fig. 2 to 4 are schematic cross-sectional views illustrating a method of manufacturing a back-illuminated CMOS optical sensor according to an embodiment of the present invention;
in the figure: 110-a first substrate, 120-a first silicon dioxide layer, 210-a second substrate, 220-a passivation dielectric layer, 230-a second silicon dioxide layer.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The inventors found that plasma irradiation of the silicon dioxide layer surfaces of the two wafers is believed to increase the hydroxyl (-OH) group density per unit area of the surface on the one hand and interaction of the plasma with the surface on the other hand, so that a porous structure formed in a lower layer region on the surface of the wafer can store water and promote diffusion of water molecules at a bonding interface, thereby improving bonding strength macroscopically. But the excessive water molecules can continuously permeate and react with the wafer in the subsequent annealing process, and a large amount of generated hydrogen is gathered to form bonding interface bubbles.
Referring to fig. 1, the present invention provides a method of manufacturing a backside illuminated CMOS optical sensor, including:
s11: providing a first substrate, depositing a first oxide layer on the surface of the first substrate, and carrying out surface polishing through a chemical mechanical polishing process;
s12: providing a second substrate as a bearing sheet, and depositing a passivation dielectric layer on the surface of the second substrate;
s13: depositing a second oxide layer on the surface of the passivation dielectric layer, and carrying out surface polishing through a chemical mechanical polishing process;
s14: irradiating the surfaces of the first oxide layer and the second oxide layer with plasma, and bonding the first oxide layer and the second oxide layer together;
s15: and carrying out annealing process on the first substrate, the first oxide layer, the second substrate, the passivation dielectric layer and the second oxide layer.
Referring to fig. 2, a first substrate 110 is provided, the first substrate 110 may be a wafer of a CIS device having a detection pixel functional structure formed on a surface thereof, a first silicon dioxide layer 120 is formed on the first substrate 110, and the first silicon dioxide layer 120 is surface-polished by a chemical mechanical polishing process.
Referring to fig. 3, a second substrate 210 is provided, which may be a non-patterned wafer, a passivation dielectric layer 220 is formed on the first substrate 210, the passivation dielectric layer 220 is made of silicon nitride, the passivation dielectric layer 220 has hydrophobicity, a second silicon dioxide layer 230 is formed on the passivation dielectric layer 220, and the second silicon dioxide layer 230 is surface-polished by a chemical mechanical polishing process.
Referring to fig. 4, the surfaces of the first silicon dioxide layer 120 and the second silicon dioxide layer 230 are irradiated with plasma, which may be plasma generated by ionization of gas such as O2, N2, H2, or Ar. The first silicon dioxide layer 120 and the second silicon dioxide layer 230 are attached to each other, so that the first silicon dioxide layer 120 and the second silicon dioxide layer 230 are bonded to each other, and then the first substrate 110, the first silicon dioxide layer 120, the second substrate 210, the passivation dielectric layer 220 and the second silicon dioxide layer 230 are bonded together. In the prior art, when plasma irradiates the surfaces of the first silicon dioxide layer and the second silicon dioxide layer, redundant water can be generated to continuously permeate and react with a wafer in the subsequent annealing process, and a large amount of generated hydrogen is gathered to form bonding interface bubbles, so that the bonding strength is influenced, and the quality and the reliability of a product are finally influenced.
In the embodiment of the present invention, a hydrophobic passivation dielectric layer 220 is added to isolate the excess water molecules generated when the plasma irradiates the surfaces of the first silicon dioxide layer 120 and the second silicon dioxide layer 230 from the second substrate 210 (wafer), so that hydrogen bubbles gathered at the bonding interface can not be generated by reaction with the wafer in the subsequent annealing process, thereby reducing the number of residual air holes in the back-illuminated CMOS optical sensor bonding process and improving the bonding strength.
In summary, in the method for manufacturing a backside illuminated CMOS optical sensor according to the embodiments of the present invention, a passivation dielectric layer with hydrophobicity is added between the second substrate and the second silicon dioxide layer, and redundant water molecules generated when the plasma irradiates the surfaces of the first silicon dioxide layer and the second silicon dioxide layer are isolated from the second substrate (wafer), so that hydrogen bubbles accumulated at a bonding interface are not generated by a reaction with the wafer in a subsequent annealing process, thereby reducing the number of residual air holes in a bonding process of the backside illuminated CMOS optical sensor and improving the bonding strength.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. A method of fabricating a backside illuminated CMOS optical sensor, comprising:
providing a first substrate, depositing a first oxide layer on the surface of the first substrate, and carrying out surface polishing through a chemical mechanical polishing process;
providing a second substrate as a bearing sheet, and depositing a passivation dielectric layer on the surface of the second substrate;
depositing a second oxide layer on the surface of the passivation dielectric layer, and carrying out surface polishing through a chemical mechanical polishing process;
irradiating the surfaces of the first oxide layer and the second oxide layer with plasma, and bonding the first oxide layer and the second oxide layer together;
annealing the first substrate, the first oxide layer, the second substrate, the passivation dielectric layer and the second oxide layer;
the passivation dielectric layer is a dielectric film layer with hydrophobicity.
2. The method of fabricating a backside-illuminated CMOS optical sensor according to claim 1, wherein the material of the passivation dielectric layer includes silicon nitride.
3. The method of manufacturing a backside-illuminated CMOS optical sensor according to claim 1, wherein the thickness of the passivation dielectric layer is 5 μm to 10 μm.
4. The method of fabricating a backside-illuminated CMOS optical sensor according to claim 1, wherein the plasma may be O2、 N2、H2Or plasma generated by ionization of Ar gas.
5. The method of claim 1, wherein the first substrate is a wafer having formed probing pixel functional structures.
6. The method of manufacturing a backside-illuminated CMOS optical sensor according to claim 1, wherein the second substrate is a non-patterned wafer.
7. The method of manufacturing a backside-illuminated CMOS optical sensor according to claim 1, wherein the temperature of the annealing process is 200 ℃ to 400 ℃.
8. The method of manufacturing a backside-illuminated CMOS optical sensor according to claim 1, wherein the temperature at which the first oxide layer and the second oxide layer are bonded is 16 ℃ to 26 ℃.
9. The method of manufacturing a backside-illuminated CMOS optical sensor according to claim 1, wherein the first oxide layer and the second oxide layer are both silicon dioxide layers.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103065945A (en) * | 2013-01-14 | 2013-04-24 | 陆伟 | Image sensor wafer bonding method |
| CN103107128A (en) * | 2013-01-14 | 2013-05-15 | 陆伟 | Metal bonding method of three-dimensional chip structure and bonding structure |
| CN103832970A (en) * | 2012-11-27 | 2014-06-04 | 中国科学院微电子研究所 | Low-temperature wafer bonding method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103832970A (en) * | 2012-11-27 | 2014-06-04 | 中国科学院微电子研究所 | Low-temperature wafer bonding method |
| CN103065945A (en) * | 2013-01-14 | 2013-04-24 | 陆伟 | Image sensor wafer bonding method |
| CN103107128A (en) * | 2013-01-14 | 2013-05-15 | 陆伟 | Metal bonding method of three-dimensional chip structure and bonding structure |
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