CN110086469A - A kind of high speed instantaneous floating point amplifier based on lack sampling - Google Patents
A kind of high speed instantaneous floating point amplifier based on lack sampling Download PDFInfo
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- CN110086469A CN110086469A CN201910485468.7A CN201910485468A CN110086469A CN 110086469 A CN110086469 A CN 110086469A CN 201910485468 A CN201910485468 A CN 201910485468A CN 110086469 A CN110086469 A CN 110086469A
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- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 4
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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Abstract
The invention discloses a kind of high speed instantaneous floating point amplifier based on lack sampling, including pre-sampling circuit module, sample circuit module and FPGA unit;Pre-sampling circuit is connect with FPGA unit, and sample circuit is connect with FPGA unit;Pre-sampling circuit includes reference voltage circuit module and exponent generative circuit module, and reference voltage circuit module is connect with exponent generative circuit module;Sample circuit includes the sample circuit and a multichannel AD in multiple channels, and the sample circuit in each channel is provided with a programmable gain amplifier, and programmable gain amplifier is connect with multichannel AD.The present invention breaches the bottleneck of instantaneous floating point amplifier, improves the rate of transient floating point amplification.
Description
Technical field
The present invention relates to amplifier technique fields, more specifically, are related to a kind of high speed transient floating point based on lack sampling
Amplifier.
Background technique
Instantaneous floating point amplifier is one kind based on programmable gain amplifier, according to the absolute value of the signal of input
Size, quickly detection and switched amplifier gain reach optimal and adopt to adjust the most suitable gain amplifier for arriving each sampled point
The purpose of sample effect realizes that block diagram is as shown in Figure 1.
The amplifier of transient floating point has in detection industry to be widely applied very much, especially in signal transients such as earthquake detections
Dynamic range fluctuates very big detection field application, therefore also derives the instantaneous floating point amplifier of multitude of different ways realization,
There are several similar schemes below.
1. floating-point nondestructive pile foundition tester (CN96212322);
2. parallel transient floating point amplifier (CN92110957) etc..
Above several schemes, instantaneous floating point amplifier are all based on the gain controllable feature of the amplifier of gain programmable,
According to the size of input signal, suitable gain output, the sampling of most Zhongdao AD device are adjusted in real time.
In this technique, there are two Primary Components:
1) programmable gain amplifier;
Programmable gain amplifier reaches stable to output signal in modification gain, needs to consume a period of time, this ginseng
Number is named settling time, and what settling time was most fast at present can reach microsecond (us) rank.
2) A/D chip;
The sampling rate of signal link has direct relationship with the sample rate of A/D chip;
Programmable gain amplifier at present, settling time it is most fast can reach microsecond (us) rank, but AD conversion chip
Sample rate is nanosecond (ns) rank nor normal more.
According to " Bucket Principle ", the whole-sample rate of system depends on the minimum device of rate, therefore transient floating point amplifies
The rate of device depends entirely on the settling time of programmable gain amplifier.
Therefore the scheme of above instantaneous floating point amplifier, have the shortcomings that one it is common, sampling can not break through and can compile
The limitation of the settling time of journey gain amplifier.
Summary of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide a kind of, and the high speed transient floating point based on lack sampling is put
Big device breaches the bottleneck of instantaneous floating point amplifier, further improves the rate of transient floating point amplification.
The purpose of the present invention is achieved through the following technical solutions:
A kind of high speed instantaneous floating point amplifier based on lack sampling, including pre-sampling circuit module, sample circuit module and
FPGA unit;The pre-sampling circuit is connect with FPGA unit, and the sample circuit is connect with FPGA unit;The pre-sampling electricity
Road includes reference voltage circuit module and exponent generative circuit module, and reference voltage circuit module and exponent generative circuit module connect
It connects;The sample circuit includes the sample circuit and a multichannel AD in multiple channels, and the sample circuit in each channel is equal
It is provided with a programmable gain amplifier, the programmable gain amplifier is connect with multichannel AD.
Further, the sample circuit includes the sample circuit and a six channel AD in six channels, and six channels
In the sample circuit in each channel be provided with a programmable gain amplifier, six programmable gain amplifiers respectively with
Six channel AD connections.
Further, including signal input part and prefilter, the signal input part are connect with prefilter, institute
Prefilter is stated to connect with sample circuit module.
Further, the exponent generative circuit module includes comparator C1 in the same direction, comparator C2 in the same direction, reversed comparator
C3 and reversed comparator C4;The first end of comparator C1 in the same direction is connect with the first reference voltage output end, comparator C1's in the same direction
Second end is connect with signal input part, and the third end of comparator C1 in the same direction is connect with FPGA unit;The first of comparator C2 in the same direction
End is connect with the second reference voltage output end, and the second end of comparator C2 in the same direction is connect with signal input part, comparator C2 in the same direction
Third end connect with FPGA unit;The first end of reversed comparator C3 is connect with third reference voltage output end, reversed to compare
The second end of device C3 is connect with signal input part, and the third end of reversed comparator C3 is connect with FPGA unit;Reversed comparator C4
First end connect with the 4th reference voltage output end, the second end of reversed comparator C4 is connect with signal input part, reversed to compare
Third end compared with device C3 is connect with FPGA unit.
Further, programmable gain amplifier includes AD8253.
Further, multichannel AD includes ADS8365.
The beneficial effects of the present invention are:
(1) present invention is by pre-sampling circuit module, sample circuit module and FPGA unit etc., using Undersampling technique,
It,, will inside FPGA using multiple channel lack samplings i.e. when signal frequency is higher than the settling time of programmable gain amplifier
Multiple channel data recombination and integrations be a signal, can break through instantaneous floating point amplifier the bottleneck that, further improve
The rate of transient floating point amplification.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention without any creative labor, may be used also for those of ordinary skill in the art
To obtain other drawings based on these drawings.
Fig. 1 is instantaneous floating point amplifier block diagram.
Fig. 2 is the principle of the present invention block diagram.
Fig. 3 is pre-sampling circuit diagram of the invention.
Fig. 4 is AD sampling instant figure of the invention.
Fig. 5 is pre-sampling of embodiment of the present invention circuit diagram.
Fig. 6 is sample circuit of embodiment of the present invention figure.
Fig. 7 is FPGA interface of embodiment of the present invention circuit diagram.
Specific embodiment
Technical solution of the present invention is described in further detail with reference to the accompanying drawing, but protection scope of the present invention is not limited to
It is as described below.All features disclosed in this specification, or implicit disclosed all methods or in the process the step of, in addition to mutual
Other than the feature and/or step of repulsion, it can combine in any way.
Any feature disclosed in this specification (including any accessory claim, abstract and attached drawing), except non-specifically chatting
It states, can be replaced by other alternative features that are equivalent or have similar purpose.That is, unless specifically stated, each feature is only
It is an example in a series of equivalent or similar characteristics.
Specific embodiments of the present invention are described more fully below, it should be noted that the embodiments described herein is served only for illustrating
Illustrate, is not intended to restrict the invention.In the following description, in order to provide a thorough understanding of the present invention, a large amount of spies are elaborated
Determine details.It will be apparent, however, to one skilled in the art that: this hair need not be carried out using these specific details
It is bright.In other instances, in order to avoid obscuring the present invention, well known circuit, software or method are not specifically described.
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Before embodiment is described, need to explain some necessary terms.Such as:
If occurring describing various elements using the terms such as " first ", " second " in the application, but these elements are not answered
It is limited when by these terms.These terms are only used to distinguish an element and another element.Therefore, discussed below
" first " element can also be referred to as " second " element without departing from the teachings of the present invention.It should be understood that if referring to unitary
Part " connection " perhaps " coupled " to another element when it can be directly connected or be directly coupled to another element or can also
With there are intermediary elements.On the contrary, when referring to an element being " directly connected " or " directly coupled " to another element, then not
There are intermediary elements.
The various terms occurred in this application are used only for the purpose of description specific embodiment and are not intended as pair
Restriction of the invention, unless the context clearly indicates otherwise, otherwise singular intention also includes plural form.
When the terms " comprising " and/or " comprising " are used in this specification, these terms specify the feature, whole
The presence of body, step, operations, elements, and/or components, but be also not excluded for more than one other feature, entirety, step, operation,
The presence of component, assembly unit and/or its group and/or additional.
Such as Fig. 1~7, a kind of high speed instantaneous floating point amplifier based on lack sampling, including pre-sampling circuit module, sampling electricity
Road module and FPGA unit;The pre-sampling circuit is connect with FPGA unit, and the sample circuit is connect with FPGA unit;It is described
Pre-sampling circuit includes reference voltage circuit module and exponent generative circuit module, and reference voltage circuit module and exponent generate electricity
The connection of road module;The sample circuit includes the sample circuit and a multichannel AD in multiple channels, and each channel is adopted
Sample circuit is provided with a programmable gain amplifier, and the programmable gain amplifier is connect with multichannel AD.
Further, the sample circuit includes the sample circuit and a six channel AD in six channels, and six channels
In the sample circuit in each channel be provided with a programmable gain amplifier, six programmable gain amplifiers respectively with
Six channel AD connections.
Further, including signal input part and prefilter, the signal input part are connect with prefilter, institute
Prefilter is stated to connect with sample circuit module.
Further, the exponent generative circuit module includes comparator C1 in the same direction, comparator C2 in the same direction, reversed comparator
C3 and reversed comparator C4;The first end of comparator C1 in the same direction is connect with the first reference voltage output end, comparator C1's in the same direction
Second end is connect with signal input part, and the third end of comparator C1 in the same direction is connect with FPGA unit;The first of comparator C2 in the same direction
End is connect with the second reference voltage output end, and the second end of comparator C2 in the same direction is connect with signal input part, comparator C2 in the same direction
Third end connect with FPGA unit;The first end of reversed comparator C3 is connect with third reference voltage output end, reversed to compare
The second end of device C3 is connect with signal input part, and the third end of reversed comparator C3 is connect with FPGA unit;Reversed comparator C4
First end connect with the 4th reference voltage output end, the second end of reversed comparator C4 is connect with signal input part, reversed to compare
Third end compared with device C3 is connect with FPGA unit.
Further, programmable gain amplifier includes AD8253.
Further, multichannel AD includes ADS8365.
The present invention is a instantaneous floating point amplifier based on lack sampling, and its feature is to breach conventional transient floating point to put
The rate limit (settling time of programmable gain amplifier limits) of big device, using lack sampling method, 6 channel timesharing are to defeated
Enter signal sampling, the rate of instantaneous floating point amplifier is made to improve 6 times.Its sample circuit has a 6 road instantaneous floating point amplifiers, and one
The converter in 6 channels is all made of individually controllable programmable gain amplifier per instantaneous floating point amplifier all the way.
Signal processing circuit of the present invention in two sub-sections, pre-sampling circuit and sample circuit.1) pre-sampling circuit includes again
Reference voltage circuit, exponent generative circuit.Reference voltage circuit, provides several groups of normal voltages, and input signal needs to distinguish
It makes comparisons with this several groups of voltages, determines the range of input signal, and export corresponding binary code, give programmable gain amplifier
The foundation of setting gain is provided.
The selection of reference voltage, be in conjunction with the dynamic range of yield value and AD.If the sample range of AD device is-U~+U
(V), gain can control 1,10,100,1000 times (being not used in the present invention to 1000 times), in order to guarantee to amplify using gain
Afterwards, signal without departing from AD device sample range,
1 exponent table of table
Note: C1, C2 are comparator in the same direction, and C3, C4 are reversed comparator.
2) sample circuit
Sample circuit has the sample circuit and a 6 channel AD in 6 channels.Originally when establishing of programmable gain amplifier
Between be Δ T, if only using single channel sample, the most fast sample rate of the system be exactly be 1/ Δ T, in the present invention, use
The AD in a piece of 6 channel, by process control, 6 channel time sharing samplings, as shown in Figure 4.
Relationship corresponding with sampling channel at the time of in Fig. 4, as shown in table 2.
2 time sharing sampling timetable of table
Sampling channel | Time |
Channel 1 | t1、t7 |
Channel 2 | t2 |
Channel 3 | t3 |
Channel 4 | t4 |
Channel 5 | t5 |
Channel 6 | t6 |
It by the data of time sharing sampling inside FPGA, temporally combines, restores original signal.This mode will be original
Settling time limit Δ T be further continued for 6 equal parts of subdivision, be the equal of promoting original sample rate by 6 channel time sharing samplings
6 times.
3) processor circuit
Use FPGA as processor in the present invention, main function is as follows:
A) exponent of input signal is identified;
B) it is controlled according to exponent output gain;
C) control AD device acquires data;
D) integration acquisition data;
Settling time shorter programmable gain amplifier device AD8253, its settling time energy is employed herein
Reach 1.8us, in the programmable gain amplifier that 1-1000 times of same level is amplified, the settling time of the chip is in the prior art
In it is faster horizontal, Fig. 6 is the settling time reference value gone out in AD8253 handbook to me.
Settling time of the AD8253 signal stabilization 0.001%:
The sample rate of A/D chip, having for nanosecond (ns) rank is many optional, so the bottleneck of instantaneous floating point amplifier is also
Come from programmable gain amplifier.
The present invention uses Undersampling technique, when signal frequency is higher than the settling time of programmable gain amplifier, utilizes
Multiple channel data recombination and integrations are a signal, can break through transient floating point and put by multiple channel lack samplings inside FPGA
Big device the bottleneck that, further improve the rate of transient floating point amplification.
It further, in the present invention, the use of the mode of multichannel is to have the area of essence in multichannel and background technique
Not, " parallel transient floating point amplifier " in background technique, when using multichannel, only one final AD sampling channel, though therefore
The mode of multichannel is so used, but there is no the bottlenecks that instantaneous floating point amplifier is promoted by time sharing sampling mode, also simultaneously
The data in multiple channels are not integrated in the way of lack sampling.Therefore, the present invention is the existing frame in instantaneous floating point amplifier
On frame, the method for introducing lack sampling has used the Instantaneous Floating-point Amplifier Circuit in multiple channels, may be programmed when signal frequency is higher than
When the settling time of gain amplifier, makes the lack sampling time sharing sampling of multichannel, obtain the sampled data in each channel, and in software
Middle realization data recombination restores initial data.
Remaining technical characteristic in the present embodiment, those skilled in the art can flexibly be selected according to the actual situation
With with to meet different specific actual demands.It will be apparent, however, to one skilled in the art that: it need not use
These specific details realize the present invention.In other instances, in order to avoid obscuring the present invention, well known calculation is not specifically described
Method, method or system etc. limit within technical protection scope in the claimed technical solution of claims of the present invention.
For the aforementioned method embodiment, for simple description, therefore, it is stated as a series of action combinations, still
Those skilled in the art should understand that the application is not limited by the described action sequence, because according to the application, it is a certain
A little steps can be performed in other orders or simultaneously.Secondly, those skilled in the art should also know that, it is retouched in specification
The embodiment stated belongs to preferred embodiment, necessary to related movement and unit not necessarily the application.
It will be appreciated by those of skill in the art that unit described in conjunction with the examples disclosed in the embodiments of the present disclosure and
Algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually with hard
Part or software mode execute, the specific application and design constraint depending on technical solution.Professional technician can be with
Each specific application is come to realize described function using distinct methods, but this realization should not exceed model of the invention
It encloses.
Disclosed system, module and method, may be implemented in other ways.For example, device described above
Embodiment, only schematically, for example, the division of the unit, can be only a kind of logical function partition, it is practical to realize
When there may be another division manner, such as multiple units or components can be combined or can be integrated into another system, or
Some features can be ignored or not executed.Another point, shown or discussed mutual coupling or direct-coupling or communication
Connection is it may be said that through some interfaces, the indirect coupling or communication connection of device or unit can be electrical property, mechanical or other
Form.
The unit that the discrete parts illustrates can be or can not also receive and is physically separated, shown as a unit
Component can be or can not receive physical unit, it can and it is in one place, or may be distributed over multiple network lists
In member.It can select some or all of unit therein according to the actual needs to realize the purpose of the scheme of the present embodiment.
It, can be with if the function is realized in the form of SFU software functional unit and when sold or used as an independent product
It is stored in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially right in other words
The part of part or the technical solution that the prior art contributes can be embodied in the form of software products, the calculating
Machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be individual
Computer, server or network equipment etc.) it performs all or part of the steps of the method described in the various embodiments of the present invention.And
Storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory
The various media that can store program code such as device (Random Access Memory, RAM), magnetic or disk.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in the method for above-described embodiment, being can
It is completed with instructing relevant hardware by computer program, the program can be stored in computer-readable storage medium
In, the program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, the storage medium can be magnetic
Dish, CD, ROM, RAM etc..
The above is only a preferred embodiment of the present invention, it should be understood that the present invention is not limited to described herein
Form should not be regarded as an exclusion of other examples, and can be used for other combinations, modifications, and environments, and can be at this
In the text contemplated scope, modifications can be made through the above teachings or related fields of technology or knowledge.And those skilled in the art institute into
Capable modifications and changes do not depart from the spirit and scope of the present invention, then all should be in the protection scope of appended claims of the present invention
It is interior.
Claims (6)
1. a kind of high speed instantaneous floating point amplifier based on lack sampling, which is characterized in that including pre-sampling circuit module, sampling electricity
Road module and FPGA unit;The pre-sampling circuit is connect with FPGA unit, and the sample circuit is connect with FPGA unit;It is described
Pre-sampling circuit includes reference voltage circuit module and exponent generative circuit module, and reference voltage circuit module and exponent generate electricity
The connection of road module;The sample circuit includes the sample circuit and a multichannel AD in multiple channels, and each channel is adopted
Sample circuit is provided with a programmable gain amplifier, and the programmable gain amplifier is connect with multichannel AD.
2. a kind of high speed instantaneous floating point amplifier based on lack sampling according to claim 1, which is characterized in that described to adopt
Sample circuit includes the sample circuit and a six channel AD in six channels, and in six channels each channel sample circuit it is equal
It is provided with a programmable gain amplifier, six programmable gain amplifiers are connect with six channel AD respectively.
3. a kind of high speed instantaneous floating point amplifier based on lack sampling according to claim 1 or 2, which is characterized in that packet
Signal input part and prefilter are included, the signal input part is connect with prefilter, the prefilter and sampling
Circuit module connection.
4. a kind of high speed instantaneous floating point amplifier based on lack sampling according to claim 3, which is characterized in that the rank
Code generation circuit module includes comparator C1, comparator C2 in the same direction, reversed comparator C3 and reversed comparator C4 in the same direction;Ratio in the same direction
First end compared with device C1 is connect with the first reference voltage output end, and the second end of comparator C1 in the same direction is connect with signal input part,
The third end of comparator C1 in the same direction is connect with FPGA unit;The first end of comparator C2 in the same direction and the second reference voltage output end connect
It connects, the second end of comparator C2 in the same direction is connect with signal input part, and the third end of comparator C2 in the same direction is connect with FPGA unit;Instead
It is connect to the first end of comparator C3 with third reference voltage output end, the second end and signal input part of reversed comparator C3 connects
It connects, the third end of reversed comparator C3 is connect with FPGA unit;The first end of reversed comparator C4 and the 4th reference voltage export
End connection, the second end of reversed comparator C4 are connect with signal input part, and the third end of reversed comparator C3 and FPGA unit connect
It connects.
5. a kind of high speed instantaneous floating point amplifier based on lack sampling according to claim 4, which is characterized in that programmable to increase
Beneficial amplifier includes AD8253.
6. a kind of high speed instantaneous floating point amplifier based on lack sampling according to claim 1, which is characterized in that multichannel AD
Including ADS8365.
Priority Applications (1)
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CN201910485468.7A CN110086469A (en) | 2019-06-05 | 2019-06-05 | A kind of high speed instantaneous floating point amplifier based on lack sampling |
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CN201910485468.7A CN110086469A (en) | 2019-06-05 | 2019-06-05 | A kind of high speed instantaneous floating point amplifier based on lack sampling |
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Application publication date: 20190802 |