CN110061104B - Method for manufacturing gallium nitride-based light emitting diode epitaxial wafer - Google Patents
Method for manufacturing gallium nitride-based light emitting diode epitaxial wafer Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims description 20
- 230000004888 barrier function Effects 0.000 claims description 10
- 238000011084 recovery Methods 0.000 claims description 10
- 230000000903 blocking effect Effects 0.000 claims description 8
- 230000010287 polarization Effects 0.000 abstract description 17
- 230000005684 electric field Effects 0.000 abstract description 14
- 238000010348 incorporation Methods 0.000 abstract description 12
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 238000006243 chemical reaction Methods 0.000 description 27
- 230000002349 favourable effect Effects 0.000 description 13
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- 239000011777 magnesium Substances 0.000 description 8
- 230000006911 nucleation Effects 0.000 description 6
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- 238000000137 annealing Methods 0.000 description 4
- 230000001276 controlling effect Effects 0.000 description 4
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- 239000004047 hole gas Substances 0.000 description 3
- 238000005286 illumination Methods 0.000 description 3
- 238000004020 luminiscence type Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 229910016920 AlzGa1−z Inorganic materials 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical group [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- ZSWFCLXCOIISFI-UHFFFAOYSA-N endo-cyclopentadiene Natural products C1C=CC=C1 ZSWFCLXCOIISFI-UHFFFAOYSA-N 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- LALRXNPLTWZJIJ-UHFFFAOYSA-N triethylborane Chemical compound CCB(CC)CC LALRXNPLTWZJIJ-UHFFFAOYSA-N 0.000 description 1
- -1 trimethyl ethyl Chemical group 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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Abstract
The invention discloses a method for manufacturing a gallium nitride-based light-emitting diode epitaxial wafer, and belongs to the technical field of semiconductors. The manufacturing method comprises the following steps: the high-temperature P type layer grows, the high-temperature P type layer is composed of a plurality of periods of superlattice structures, each period of superlattice structure comprises an InGaN layer and a BGaN layer, the growth temperature of the InGaN layer is smaller than that of the BGaN layer, and the growth pressure of the InGaN layer is larger than that of the BGaN layer. The manufacturing method provided by the invention can ensure the surface yield of the epitaxial layer and also can ensure the effective incorporation of the In component and the B component In the high-temperature P-type layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field, the hole concentration and the hole mobility In the high-temperature P-type layer are improved, and the luminous efficiency of the LED is finally improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a gallium nitride-based light emitting diode epitaxial wafer.
Background
An LED (Light Emitting Diode) is a semiconductor electronic component capable of Emitting Light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the solid-state illumination light source is rapidly and widely applied, such as traffic signal lamps, automobile interior and exterior lamps, urban landscape illumination, mobile phone backlight sources and the like.
The conventional GaN-based LED epitaxial wafer comprises a substrate, and a low-temperature buffer layer, a three-dimensional nucleating layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer, a high-temperature P-type layer and a P-type contact layer which are sequentially stacked on the substrate. The high-temperature P-type layer is a GaN layer doped with Mg and is grown at a single growth temperature and growth pressure. The hole concentration and hole mobility of the high-temperature P-type layer are important parameters affecting the luminous efficiency of the LED.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
because the nitride belongs to a wide-bandgap semiconductor material and has a large forbidden bandwidth, the energy level position of Mg in the GaN-based material is deep, so that acceptor impurities in the high-temperature P-type layer are difficult to ionize, Mg is difficult to dope into the high-temperature P-type layer, and finally, the hole concentration and the hole mobility of the high-temperature P-type layer are low, so that the luminous efficiency of the LED is affected.
Disclosure of Invention
The embodiment of the invention provides a method for manufacturing a gallium nitride-based light-emitting diode epitaxial wafer, which can improve the hole concentration and the hole mobility of a high-temperature P-type layer so as to improve the light-emitting efficiency of an LED. The technical scheme is as follows:
the invention provides a manufacturing method of a gallium nitride-based light emitting diode epitaxial wafer, which comprises the following steps:
providing a substrate;
growing a low-temperature buffer layer, a three-dimensional nucleating layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer and an electronic barrier layer on the substrate in sequence;
growing a high-temperature P-type layer on the electron blocking layer, wherein the high-temperature P-type layer is composed of a plurality of periods of superlattice structures, each period of superlattice structure comprises an InGaN layer and a BGaN layer, the growth temperature of the InGaN layer is lower than that of the BGaN layer, and the growth pressure of the InGaN layer is higher than that of the BGaN layer;
and growing a P-type contact layer on the high-temperature P-type layer.
Furthermore, the growth temperature of the InGaN layer is 800-1000 ℃.
Furthermore, the growth temperature of the BGaN layer is 900-1100 ℃.
Furthermore, the growth pressure of the InGaN layer is 400-600 torr.
Furthermore, the growth pressure of the BGaN layer is 100-200 torr.
Further, the thickness of the InGaN layer and the BGaN layer are equal.
Further, the thickness of the high-temperature P-type layer is 50-300 nm.
Furthermore, the high-temperature P-type layer comprises n periods of InGaN/BGaN superlattice structures, and n is more than or equal to 2 and less than or equal to 20.
Further, the InGaN layer is InxGa1-xN layer, 0<x<0.2。
Further, the BGaN layer is ByGa1-yN layer, 0.05<y<0.3。
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
by growing the high-temperature P-type layer consisting of the InGaN/BGaN superlattice structures with a plurality of periods, the InGaN/BGaN superlattice structures can generate a strong polarization electric field, so that the valence band of the high-temperature P-type layer is obviously inclined, more acceptor energy levels are located below the Fermi energy level, the ionization of Mg can be improved to the greatest extent, and therefore the hole concentration in the high-temperature P-type layer can be improved. And the strong polarization electric field in the InGaN/BGaN superlattice can obtain high-concentration two-dimensional hole gas which has high hole mobility, so that the hole mobility in the high-temperature P-type layer can be improved, more electrons and holes can perform radiation luminescence in the multi-quantum well layer, and the luminous efficiency of the LED is finally improved. Furthermore, the growth temperature of the InGaN layer is lower than that of the BGaN layer, the low temperature is favorable for improving the incorporation of In the InGaN layer, and the high temperature is favorable for the incorporation of B In the BGaN layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field. The growth pressure of the InGaN layer is greater than that of the BGaN layer, the growth pressure of the InGaN layer is relatively high, the InGaN layer is favorable for biased three-dimensional growth of the InGaN layer, the growth pressure of the BGaN layer is relatively low, and the BGaN layer is favorable for biased two-dimensional growth of the BGaN layer. The surface of the epitaxial layer becomes rough due to the partial three-dimensional growth of the InGaN layer, and the partial two-dimensional growth of the BGaN layer can quickly fill up the three-dimensional appearance of the InGaN layer to obtain a relatively flat surface of the epitaxial layer. Therefore, the manufacturing method provided by the invention can ensure the surface yield of the epitaxial layer and also can ensure the effective incorporation of the In component and the B component In the high-temperature P-type layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field, the hole concentration and the hole mobility In the high-temperature P-type layer are improved, and the luminous efficiency of the LED is finally improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart of a method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention;
fig. 2 is a flowchart of another method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a flowchart of a method for manufacturing a gan-based led epitaxial wafer according to an embodiment of the present invention, where as shown in fig. 1, the method includes:
In the present embodiment, the substrate may be a sapphire substrate.
And 102, growing a low-temperature buffer layer, a three-dimensional nucleating layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer and an electronic barrier layer on the substrate in sequence.
Optionally, the low-temperature buffer layer can be a GaN buffer layer, and the thickness of the low-temperature buffer layer is 20-50 nm. The three-dimensional nucleation layer can be a GaN layer, and the thickness is 400-600 nm. The two-dimensional recovery layer can be a GaN layer, and the thickness is 500-800 nm. The thickness of the undoped GaN layer can be 1-2 um. The N-type layer can be a GaN layer doped with Si and has a thickness of 1-3 um.
Alternatively, the MQW layer may include 6 to 12 periods of superlattice structures each including InbGa1-bN well layer and GaN barrier layer, 0.1<b<1. In thereinbGa1-bOf N-well layersThe thickness can be 3-4 nm, and the thickness of the GaN barrier layer can be 9-20 nm.
Alternatively, the electron blocking layer may be P-type AlzGa1-zN layer, 0.1<z<0.6, and the thickness can be 15-80 nm.
Illustratively, step 102 may further include:
and growing a stress release layer and a preceding multi-quantum well layer between the N-type layer and the multi-quantum well layer.
Optionally, the stress release layer may be composed of a GaN/InGaN superlattice structure with 2-8 periods. The thickness of the GaN layer can be 10-20 nm, the thickness of the InGaN layer can be 1-2 nm, and the In content of the InGaN layer can be 5% -40%.
The preceding-stage multiple quantum well layer can be formed by In with 5-10 periodsaGa1-aComposition of N/GaN superlattice structure, 0<a<0.5. Wherein, InaGa1-aThe thickness of the N layer can be 1-2 nm, and the thickness of the GaN layer can be 8-20 nm.
And 103, growing a high-temperature P-type layer on the electron blocking layer.
The high-temperature P-type layer is composed of a plurality of periodic superlattice structures, each periodic superlattice structure comprises an InGaN layer and a BGaN layer, the growth temperature of the InGaN layer is smaller than that of the BGaN layer, and the growth pressure of the InGaN layer is larger than that of the BGaN layer.
The thickness of the high-temperature P-type layer can be 50-300 nm.
And 104, growing a P-type contact layer on the high-temperature P-type layer.
Optionally, the P-type contact layer can be a heavily Mg-doped GaN layer with a thickness of 10-100 nm.
According to the embodiment of the invention, the high-temperature P-type layer composed of InGaN/BGaN superlattice structures with multiple periods is grown, the InGaN/BGaN superlattice structures can generate a stronger polarization electric field, so that the valence band of the high-temperature P-type layer is obviously inclined, more acceptor energy levels are positioned below the Fermi energy level, Mg ionization can be improved to the greatest extent, and therefore the hole concentration in the high-temperature P-type layer can be improved. And the strong polarization electric field in the InGaN/BGaN superlattice can obtain high-concentration two-dimensional hole gas which has high hole mobility, so that the hole mobility in the high-temperature P-type layer can be improved, more electrons and holes can perform radiation luminescence in the multi-quantum well layer, and the luminous efficiency of the LED is finally improved. Furthermore, the growth temperature of the InGaN layer is lower than that of the BGaN layer, the low temperature is favorable for improving the incorporation of In the InGaN layer, and the high temperature is favorable for the incorporation of B In the BGaN layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field. The growth pressure of the InGaN layer is greater than that of the BGaN layer, the growth pressure of the InGaN layer is relatively high, the InGaN layer is favorable for biased three-dimensional growth of the InGaN layer, the growth pressure of the BGaN layer is relatively low, and the BGaN layer is favorable for biased two-dimensional growth of the BGaN layer. The surface of the epitaxial layer becomes rough due to the partial three-dimensional growth of the InGaN layer, and the partial two-dimensional growth of the BGaN layer can quickly fill up the three-dimensional appearance of the InGaN layer to obtain a relatively flat surface of the epitaxial layer. Therefore, the manufacturing method provided by the invention can ensure the surface yield of the epitaxial layer and also can ensure the effective incorporation of the In component and the B component In the high-temperature P-type layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field, the hole concentration and the hole mobility In the high-temperature P-type layer are improved, and the luminous efficiency of the LED is finally improved.
Fig. 2 is a flowchart of another method for manufacturing an epitaxial wafer of a gallium nitride-based light emitting diode according to an embodiment of the present invention, and as shown in fig. 2, the method includes:
Wherein the substrate can be [0001 ]]Al of crystal orientation2O3A sapphire substrate.
Further, step 201 may further include:
annealing the substrate in a hydrogen atmosphere for 1-10 min to clean the surface of the substrate, then performing nitridation treatment on the substrate, placing the substrate into a reaction chamber of MOCVD (Metal-organic Chemical Vapor Deposition) equipment, then annealing in the hydrogen atmosphere for 1-10 min to clean the surface of the substrate, wherein the annealing temperature is 1000-1200 ℃, and the pressure is 200-500 torr.
It should be noted that the epitaxial layer provided in the embodiment of the present invention includes a low temperature buffer layer, a three-dimensional nucleation layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type layer, a stress release layer, a preceding multi-quantum well layer, a multi-quantum well layer, an electron blocking layer, a high temperature P-type layer, and a P-type contact layer, and each layer in the epitaxial layer may be grown by using an MOCVD method. In particular implementation, the substrate is generally placed on a graphite tray and fed into the reaction chamber of the MOCVD equipment to carry out the growth of the epitaxial material, so that the temperature and pressure controlled in the growth process actually refer to the temperature and pressure in the reaction chamber. Specifically, trimethyl gallium or trimethyl ethyl is used as a gallium source, triethyl boron is used as a boron source, ammonia is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, an N-type dopant is selected from silane, and a P-type dopant is selected from magnesium cyclopentadienyl.
Wherein, the low-temperature buffer layer can be a GaN buffer layer.
Illustratively, the temperature in the reaction chamber is adjusted to 400-600 ℃, the pressure is adjusted to 100-300 torr, and a low-temperature buffer layer with the thickness of 20-50 nm is grown.
And step 203, growing a three-dimensional nucleation layer on the low-temperature buffer layer.
In this embodiment, the three-dimensional nucleation layer may be a GaN layer.
Illustratively, the temperature of the reaction chamber is adjusted to 1000-1080 ℃, the pressure of the reaction chamber is controlled to 250-550 torr, a three-dimensional nucleation layer with the thickness of 400-600 nm is grown, and the growth time is 10-30 min.
And step 204, growing a two-dimensional recovery layer on the three-dimensional nucleation layer.
In this embodiment, the two-dimensional recovery layer may be a GaN layer.
Illustratively, the temperature of the reaction chamber is adjusted to 1050-1150 ℃, the pressure of the reaction chamber is controlled to 100-500 torr, a two-dimensional recovery layer with the thickness of 500-800 nm is grown, and the growth time is 20-40 min.
Illustratively, the temperature of the reaction chamber is adjusted to 1050-1200 ℃, the pressure of the reaction chamber is controlled to 100-500 torr, and an undoped GaN layer with the thickness of 1-2 um is grown.
In this embodiment, the N-type layer may be a Si-doped GaN layer, and the Si doping concentration may be 1018cm-3～1020cm-3。
Illustratively, the temperature of the reaction chamber is adjusted to 1050-1200 ℃, the pressure of the reaction chamber is controlled to 100-500 torr, and an N-type layer with the thickness of 1-3 um is grown.
In the embodiment, the stress release layer may be formed of a GaN/InGaN superlattice structure with 2-8 periods. The thickness of the GaN layer can be 10-20 nm, the thickness of the InGaN layer can be 1-2 nm, and the In content of the InGaN layer can be 5% -40%.
Illustratively, the temperature of the reaction chamber is adjusted to 750-920 ℃, the pressure of the reaction chamber is controlled to 100-300 torr, and a stress release layer is grown.
And step 208, growing a front-stage multi-quantum well layer on the stress release layer.
Wherein the preceding-stage multiple quantum well layer can be formed by In of 5-10 periodsaGa1-aN/GaN and superlattice Structure composition, 0<a<0.5. Wherein, InaGa1-aThe thickness of the N layer can be 1-2 nm, and the thickness of the GaN layer can be 8-20 nm.
Specifically, step 208 may include:
regulating the temperature of the reaction chamber to 770-835 ℃, controlling the pressure of the reaction chamber to 100-300 torr, and growing InaGa1-aAnd N layers.
And adjusting the temperature of the reaction chamber to 820-920 ℃, controlling the pressure of the reaction chamber to 100-300 torr, and growing the GaN layer.
And step 209, growing a multi-quantum well layer on the previous multi-quantum well layer.
Wherein the multiple quantum well layer can comprise 6-12 periods of superlattice structures, and each superlattice structure comprises InbGa1-bN well layer and GaN barrier layer, 0.1<b<1. It is composed ofInbGa1-bThe thickness of the N well layer can be 3-4 nm, and the thickness of the GaN barrier layer can be 9-20 nm.
Specifically, step 209 may include:
adjusting the temperature of the reaction chamber to 750-830 ℃, controlling the pressure of the reaction chamber to 100-500 torr, and growing InbGa1- bAnd an N well layer.
And adjusting the temperature of the reaction chamber to 850-900 ℃, controlling the pressure of the reaction chamber to be 100-500 torr, and growing the GaN barrier layer.
And step 210, growing an electron barrier layer on the multi-quantum well layer.
In the present embodiment, the electron blocking layer may be P-type AlzGa1-zThe thickness of the N layer can be 15-80 nm and is 0.1<z<0.6。
Illustratively, the temperature of the reaction chamber is adjusted to 900-1000 ℃, the pressure of the reaction chamber is controlled to 100-500 torr, and the electron blocking layer is grown.
The high-temperature P-type layer is composed of a plurality of periodic superlattice structures, each periodic superlattice structure comprises an InGaN layer and a BGaN layer, the growth temperature of the InGaN layer is smaller than that of the BGaN layer, and the growth pressure of the InGaN layer is larger than that of the BGaN layer.
Because the more the In content In the InGaN layer and the B content In the BGaN layer are, the stronger the polarization effect between the InGaN layer and the BGaN layer is, and the higher the Mg doping efficiency In the high-temperature P-type layer is. However, the lattice mismatch between InGaN and BGaN is also larger, which results in more dislocations, and the crystal quality of the high-temperature P-type layer is more seriously degraded. Therefore, the In content In the InGaN layer and the B content In the BGaN layer need to be limited to a certain range.
Optionally, the InGaN layer is InxGa1-xN layer, 0<x<0.2. At the moment, a stronger polarization effect can be generated between the InGaN layer and the BGaN layer, and the crystal quality of the high-temperature P-type layer can be ensured.
Further, the BGaN layer is ByGa1-yN layer, 0.05<y<0.3. At this time, InG can be ensuredA stronger polarization effect can be generated between the aN layer and the BGaN layer, and the crystal quality of the high-temperature P-type layer can be ensured.
Optionally, the growth temperature of the InGaN layer is 800-1000 ℃. If the growth temperature of the InGaN layer is lower than 800 c, it may result in poor crystal quality of the formed InGaN layer. If the growth temperature of the InGaN layer is higher than 1000 ℃, incorporation of In the InGaN layer is not facilitated.
Illustratively, the growth temperature of the InGaN layer is 900 ℃.
Optionally, the growth temperature of the BGaN layer is 900-1100 ℃. If the growth temperature of the BGaN layer is lower than 900 ℃, incorporation of B in the BGaN layer is not facilitated. If the growth temperature of the BGaN layer is higher than 1000 ℃, In component In the InGaN layer may be precipitated, thereby weakening the polarization electric field generated by the InGaN/BGaN superlattice.
Illustratively, the BGaN layer growth temperature is 1000 ℃.
Optionally, the growth pressure of the InGaN layer is 400-600 torr. If the growth pressure of the InGaN layer is lower than 400torr, the three-dimensional growth of the InGaN layer is not facilitated. If the growth pressure of the InGaN layer is higher than 600torr, the surface of the InGaN layer becomes too rough and is not easy to fill up, so that the surface of the epitaxial layer is too rough, which affects the crystal quality of the epitaxial layer.
Optionally, the BGaN layer grows under the pressure of 100-200 torr. If the growth pressure of the BGaN layer is lower than 100torr, the growth rate of the BGaN layer is too fast, and more dislocations may be generated when the InGaN layer is filled and leveled, which affects the crystal quality. If the growth temperature of the BGaN layer is higher than 200torr, it is not favorable for the two-dimensional growth of the BGaN layer.
Further, the thickness of the InGaN layer and the BGaN layer are equal to facilitate growth control.
Illustratively, the thickness of each of the InGaN layer and the BGaN layer is 3-5 nm.
Optionally, the thickness of the high-temperature P-type layer is 50-300 nm. If the thickness of the high-temperature P-type layer is less than 50nm, the epitaxial surface is rough, and the crystal quality of the epitaxial layer is poor. If the thickness of the high-temperature P-type layer is greater than 300nm, the light absorption of the high-temperature P-type layer is severe, and thus the light emitting efficiency of the LED is reduced.
Optionally, the high-temperature P-type layer includes n periods of InGaN/BGaN superlattice structures, and n is greater than or equal to 2 and less than or equal to 20.
Wherein, the P-type contact layer can be a heavily Mg-doped GaN layer with a thickness of 10-100 nm.
Illustratively, the temperature of the reaction chamber is regulated to 850-1000 ℃, the pressure of the reaction chamber is controlled to 100-300 torr, and the P-type contact layer is grown.
After the steps are completed, the temperature of the reaction chamber is reduced to 650-850 ℃, annealing treatment is carried out for 5-15 min in a nitrogen atmosphere, then the temperature is gradually reduced to the room temperature, and the epitaxial growth of the light emitting diode is finished.
According to the embodiment of the invention, the high-temperature P-type layer composed of InGaN/BGaN superlattice structures with multiple periods is grown, the InGaN/BGaN superlattice structures can generate a stronger polarization electric field, so that the valence band of the high-temperature P-type layer is obviously inclined, more acceptor energy levels are positioned below the Fermi energy level, Mg ionization can be improved to the greatest extent, and therefore the hole concentration in the high-temperature P-type layer can be improved. And the strong polarization electric field in the InGaN/BGaN superlattice can obtain high-concentration two-dimensional hole gas which has high hole mobility, so that the hole mobility in the high-temperature P-type layer can be improved, more electrons and holes can perform radiation luminescence in the multi-quantum well layer, and the luminous efficiency of the LED is finally improved. Furthermore, the growth temperature of the InGaN layer is lower than that of the BGaN layer, the low temperature is favorable for improving the incorporation of In the InGaN layer, and the high temperature is favorable for the incorporation of B In the BGaN layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field. The growth pressure of the InGaN layer is greater than that of the BGaN layer, the growth pressure of the InGaN layer is relatively high, the InGaN layer is favorable for biased three-dimensional growth of the InGaN layer, the growth pressure of the BGaN layer is relatively low, and the BGaN layer is favorable for biased two-dimensional growth of the BGaN layer. The surface of the epitaxial layer becomes rough due to the partial three-dimensional growth of the InGaN layer, and the partial two-dimensional growth of the BGaN layer can quickly fill up the three-dimensional appearance of the InGaN layer to obtain a relatively flat surface of the epitaxial layer. Therefore, the manufacturing method provided by the invention can ensure the surface yield of the epitaxial layer and also can ensure the effective incorporation of the In component and the B component In the high-temperature P-type layer, so that the InGaN/BGaN superlattice structure can generate a stronger polarization electric field, the hole concentration and the hole mobility In the high-temperature P-type layer are improved, and the luminous efficiency of the LED is finally improved.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent replacements, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A manufacturing method of a gallium nitride-based light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing a low-temperature buffer layer, a three-dimensional nucleating layer, a two-dimensional recovery layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer and an electronic barrier layer on the substrate in sequence;
growing a high-temperature P-type layer on the electron blocking layer, wherein the high-temperature P-type layer is composed of a plurality of periods of superlattice structures, each period of superlattice structure is an InGaN/BGaN superlattice structure, the growth temperature of the InGaN layer is lower than that of the BGaN layer, and the growth pressure of the InGaN layer is higher than that of the BGaN layer;
and growing a P-type contact layer on the high-temperature P-type layer.
2. The method according to claim 1, wherein the growth temperature of the InGaN layer is 800-1000 ℃.
3. The method according to claim 1, wherein the BGaN layer is grown at a temperature of 900 to 1100 ℃.
4. The method of claim 1, wherein the InGaN layer is grown at a pressure of 400to 600 torr.
5. The method according to claim 1, wherein the BGaN layer is grown at a pressure of 100to 200 torr.
6. The manufacturing method according to claim 1, wherein the InGaN layer and the BGaN layer are equal in thickness.
7. The method according to claim 1, wherein the thickness of the high-temperature P-type layer is 50to 300 nm.
8. The manufacturing method according to claim 1, wherein the high-temperature P-type layer comprises n periods of InGaN/BGaN superlattice structures, n is greater than or equal to 2 and less than or equal to 20.
9. The method of claim 1, wherein the InGaN layer is InxGa1-xN layer, 0<x<0.2。
10. The method of manufacture of claim 1, wherein the BGaN layer is ByGa1-yN layer, 0.05<y<0.3。
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