CN109950372B - Light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents
Light emitting diode epitaxial wafer and manufacturing method thereof Download PDFInfo
- Publication number
- CN109950372B CN109950372B CN201910117966.6A CN201910117966A CN109950372B CN 109950372 B CN109950372 B CN 109950372B CN 201910117966 A CN201910117966 A CN 201910117966A CN 109950372 B CN109950372 B CN 109950372B
- Authority
- CN
- China
- Prior art keywords
- sublayer
- layer
- quantum well
- sub
- well layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The invention discloses a light-emitting diode epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The multiple quantum well layer of the light emitting diode epitaxial wafer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately grown, each quantum well layer comprises a first sublayer, a second sublayer and a third sublayer which are sequentially stacked, and the first sublayer, the second sublayer and the third sublayer are all InxGa1‑xAnd x is more than 0 and less than 1, and the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer. The In component of the part, In contact with the quantum barrier layer, of each quantum well layer is low, the polarization effect generated at the interface of the quantum well layer and the quantum barrier layer due to lattice mismatch can be weakened, the radiation recombination rate of electrons and holes is improved, and therefore the light emitting efficiency of the LED is improved. The In component content In the middle of each quantum well layer is high, and the light emitting concentration of the LED can be further improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer and a manufacturing method thereof.
Background
An LED (Light Emitting Diode) is a semiconductor electronic component capable of Emitting Light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the solid-state illumination light source is rapidly and widely applied, such as traffic signal lamps, automobile interior and exterior lamps, urban landscape illumination, mobile phone backlight sources and the like.
The conventional LED epitaxial wafer comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electron blocking layer, a P-type layer and a P-type contact layer which are sequentially stacked on the substrate. The multiple quantum well layer comprises a plurality of InGaN quantum well layers and a plurality of GaN quantum barrier layers which are alternately grown, the growth conditions of the quantum well layers are the same, and the growth conditions of the quantum barrier layers are the same.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
due to the fact that the crystal lattice mismatch between the InGaN quantum well layer and the GaN quantum barrier layer has a polarization effect, the polarization effect can generate a polarization electric field in the quantum well layer, and the energy band of the quantum well layer is inclined, so that electrons and holes are separated in space, overlapping of an electron wave function and a hole wave function is reduced, radiation recombination efficiency of the electrons and the holes is reduced, and luminous efficiency of the LED is greatly reduced.
Disclosure of Invention
The embodiment of the invention provides a light-emitting diode epitaxial wafer and a manufacturing method thereof, which can improve the radiation recombination efficiency of electrons and holes so as to improve the luminous efficiency of an LED. The technical scheme is as follows:
in one aspect, the invention provides a light emitting diode epitaxial wafer, which comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer, a P-type layer and a P-type contact layer which are sequentially laminated on the substrate, wherein the multi-quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately grown,
each quantum well layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are sequentially stacked, and the first sub-layer, the second sub-layer and the third sub-layer are all InxGa1-xAnd the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer.
Further, the thicknesses of the first sublayer and the third sublayer are equal, and the thickness of the second sublayer is larger than that of the first sublayer.
Further, the thickness ratio of the first, second and third sub-layers is 1:3:1 or 1: 4: 1 or 1: 5: 1 or 1:6: 1.
in another aspect, the present invention provides a method for manufacturing an epitaxial wafer of a light emitting diode, the method comprising:
providing a substrate;
growing a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer, a P-type layer and a P-type contact layer on the substrate in sequence;
the multiple quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately grown, each quantum well layer comprises a first sublayer, a second sublayer and a third sublayer which are sequentially stacked, and the first sublayer, the second sublayer and the third sublayer are all InxGa1-xAnd the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer.
Further, the thicknesses of the first sublayer and the third sublayer are equal, and the thickness of the second sublayer is larger than that of the first sublayer.
Further, the thickness ratio of the first, second and third sub-layers is 1:3:1 or 1: 4: 1 or 1: 5: 1 or 1:6: 1.
further, the growth temperature of the first sub-layer is equal to the growth temperature of the third sub-layer, and the growth temperature of the second sub-layer is lower than the growth temperature of the first sub-layer.
Further, the growth temperature of the second sub-layer is 10-30 ℃ lower than that of the first sub-layer.
Further, the manufacturing method further includes:
growing the second sublayer under a gas atmosphere in which nitrogen and ammonia are mixed;
growing the first sublayer and the third sublayer under a gas atmosphere in which nitrogen, ammonia, and hydrogen are mixed.
Further, when the first sublayer and the third sublayer are grown, the flow rate of the introduced hydrogen is 1% -5% of the total flow rate of the introduced nitrogen and the introduced ammonia.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
by arranging each quantum well layer as a three-layer structure with three sub-layers all InxGa1-xAnd x is more than 0 and less than 1, and the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer. On the one hand, the method comprises the following steps of,the In component of the part, In contact with the quantum barrier layer, of each quantum well layer is low, the polarization effect generated at the interface of the quantum well layer and the quantum barrier layer due to lattice mismatch can be weakened, the radiation recombination rate of electrons and holes is improved, and therefore the light emitting efficiency of the LED is improved. The In component content In the middle of each quantum well layer is high, and the light emitting concentration of the LED can be further improved. On the other hand, as In is an impurity, the higher the In component is, the poorer the quality of the GaN crystal is, so that the In component In the first sublayer and the third sublayer is set to be 25% -35% of the In component In the second sublayer, the In component In the first sublayer and the third sublayer is relatively lower, and the improvement of the crystal quality of the first sublayer and the third sublayer is facilitated.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a multiple quantum well layer provided by an embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention, and as shown in fig. 1, the led epitaxial wafer includes a substrate 1, and a buffer layer 2, an undoped GaN layer 3, an N-type layer 4, a multi-quantum well layer 5, an electron blocking layer 6, a P-type layer 7, and a P-type contact layer 8, which are sequentially stacked on the substrate 1.
Fig. 2 is a schematic structural diagram of a multiple quantum well layer according to an embodiment of the present invention, and as shown in fig. 2, the multiple quantum well layer 5 includes a plurality of quantum well layers 51 and a plurality of quantum barrier layers 52 that are alternately grown. Each quantum well layer 51 includes a first sublayer 511, a second sublayer 512, and a third sublayer 513 stacked In this order, and each of the first sublayer 511, the second sublayer 512, and the third sublayer 513 is InxGa1-xN layer, x is more than 0 and less than 1. The In composition In the first sublayer 511 and the third sublayer 513 is 25% to 35% of the In composition In the second sublayer 512.
According to the embodiment of the invention, each quantum well layer is set to be of a three-layer structure, and all three sub-layers are InxGa1-xAnd x is more than 0 and less than 1, and the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer. On one hand, the In component of the part, In contact with the quantum barrier layer, of each quantum well layer is low, the polarization effect generated by lattice mismatch at the interface of the quantum well layer and the quantum barrier layer can be weakened, the radiation recombination rate of electrons and holes is improved, and therefore the luminous efficiency of the LED is improved. The In component content In the middle of each quantum well layer is high, and the light emitting concentration of the LED can be further improved. On the other hand, as In is an impurity, the higher the In component is, the poorer the quality of the GaN crystal is, so that the In component In the first sublayer and the third sublayer is set to be 25% -35% of the In component In the second sublayer, the In component In the first sublayer and the third sublayer is relatively lower, and the improvement of the crystal quality of the first sublayer and the third sublayer is facilitated.
If the In composition In the first sub-layer 511 and the third sub-layer 513 is greater than 25% to 35% of the In composition In the second sub-layer 512, the polarization effect generated at the interface between the quantum well layer and the quantum barrier layer due to lattice mismatch is not weakened. If the In components In the first sublayer 511 and the third sublayer 513 are less than 25% to 35% of the In components In the second sublayer 512, the flow rate of the In source required to be introduced when the first sublayer 511 and the third sublayer 513 are grown is small, and the flow rate of the In source required to be introduced when the second sublayer 512 is grown is large, which may cause difficulty In controlling the flow rate of the In source and may not ensure the accuracy of the introduced In source.
Alternatively, the multiple quantum well layer 5 may include n quantum well layers 51 and n quantum barrier layers 52 alternately grown, 8. ltoreq. n.ltoreq.12. If the number of layers of the quantum well layer 51 and the quantum barrier layer 52 is less than 8, electrons and holes may not be sufficiently recombined to emit light due to too small number of layers, which may reduce the light emission efficiency of the LED. If the number of the quantum well layer 51 and the quantum barrier layer 52 is more than 12, the distribution of electrons and holes may not be concentrated, and the recombination efficiency of electrons and holes may be low, resulting in low light emitting efficiency of the LED.
Illustratively, n is 10, i.e., the multiple quantum well layer 5 may include 10 quantum well layers 51 and 10 quantum barrier layers 52 alternately grown.
Further, the first sub-layer 511 and the third sub-layer 513 have equal thicknesses, and the second sub-layer 512 has a thickness greater than that of the first sub-layer 511. Since the In composition is highest In the second sub-layer 512, defects are easily formed as the In composition is higher. Therefore, the thickness of the second sub-layer 512 needs to be set thicker to reduce the generation of defects.
Alternatively, the thickness of the first and third sub-layers 511 and 513 may be 2 to 5 nm. If the thicknesses of the first sub-layer 511 and the third sub-layer 513 are less than 2nm, the polarization effect generated at the interface between the quantum well layer and the quantum barrier layer due to lattice mismatch is not weakened. If the thicknesses of the first sub-layer 511 and the third sub-layer 513 are greater than 5nm, the In compositions In the first sub-layer and the third sub-layer are higher, so that In the quantum well layer cannot be intensively distributed In the second sub-layer, and the effect of improving the light emitting concentration of the LED is achieved.
Optionally, the thickness ratio of the first, second and third sublayers 511, 512 and 513 is 1:3:1 or 1: 4: 1 or 1: 5: 1 or 1:6: 1. if the thickness ratio of the first sub-layer 511 to the second sub-layer 512 to the third sub-layer 513 is less than 1:3:1, the thickness of the second sub-layer is too thin, and In the quantum well layer cannot be distributed In the second sub-layer In a concentrated manner, so that the light emitting concentration of the LED is improved. If the thickness ratio of the first sublayer 511 to the second sublayer 512 to the third sublayer 513 is greater than 1:6:1, the thickness of the second sublayer is too thick, so that the total amount of In the quantum well layer is too large, defects are formed, and the light emitting efficiency of the LED is affected.
It should be noted that the thickness ratio of the first sub-layer 511, the second sub-layer 512, and the third sub-layer 513 may be selected according to the size of the light emitting wavelength of the desired LED device. The longer the emission wavelength, the more quantum well layer In is needed, the thicker the thickness of the second sublayer, and the longer the emission, the less quantum well layer In is needed, and the thinner the thickness of the second sublayer.
Illustratively, when the emission wavelength of the desired LED device is 445nm to 460nm, the thickness ratio of the first, second, and third sub-layers 511, 512, and 513 may be set to 1:3:1, setting the In component In the first sublayer and the third sublayer to be 25% -30% of the In component In the second sublayer.
When the emission wavelength of the desired LED device is 460nm to 470nm, the thickness ratio of the first sublayer 511, the second sublayer 512, and the third sublayer 513 may be set to 1: 4: 1, setting the In component In the first sublayer and the third sublayer to be 25% -30% of the In component In the second sublayer.
When the emission wavelength of the desired LED device is 515nm to 525nm, the thickness ratio of the first sublayer 511, the second sublayer 512, and the third sublayer 513 may be set to 1: 5: 1, setting the In component In the first sublayer and the third sublayer to be 30-35% of the In component In the second sublayer.
When the emission wavelength of the desired LED device is 520nm to 530nm, the thickness ratio of the first sublayer 511, the second sublayer 512, and the third sublayer 513 may be set to 1:6:1, setting the In component In the first sublayer and the third sublayer to be 30-35% of the In component In the second sublayer.
Alternatively, the thickness of the quantum well layer 51 may be 2 to 3 nm. If the thickness of the quantum well layer 51 is less than 2nm, recombination light emission of electrons and holes in the quantum well layer 51 may be affected due to too small thickness of the quantum well layer 51, reducing the light emission efficiency of the LED. If the thickness of the quantum well layer 51 is greater than 3nm, more stress may be generated in the quantum well layer 51 due to too large thickness of the quantum well layer 51, affecting the crystal quality of the quantum well layer 51 and thus affecting the light emission efficiency of the LED.
Optionally, the thickness of the quantum barrier layer 52 may be 9-20 nm. If the thickness of the quantum barrier layer 52 is less than 9nm, the crystal quality improvement effect of the whole multiple quantum well layer 5 may be poor due to too small thickness of the quantum barrier layer 52. If the thickness of the quantum barrier layer 52 is greater than 20nm, normal migration of carriers is easily affected, a blocking effect on recombination of electrons and holes is achieved, and the luminous efficiency of the LED is reduced.
Alternatively, the substrate 1 may be a sapphire substrate.
Alternatively, the buffer layer 2 may be an AlN layer with a thickness of 15 to 35 nm.
Optionally, the thickness of the undoped GaN layer 3 is 1-3 um.
Optionally, the N-type layer 4 can be a Si-doped GaN layer with a thickness of 1-5 um.
Optionally, the electron blocking layer 6 can be an AlGaN layer doped with Mg, and the thickness is 20-30 nm.
Optionally, the P-type layer 7 can be a GaN layer doped with Mg, and the thickness is 10-30 nm.
Optionally, the P-type contact layer 8 may be a heavily doped Mg GaN layer with a thickness of 30-50 nm and a Mg doping concentration greater than or equal to 1 x 1020cm-3，
Optionally, the light emitting diode epitaxial wafer further comprises a low-temperature P-type layer 9 arranged between the multiple quantum well layer 5 and the electron barrier layer 6, wherein the low-temperature P-type layer 9 can be a GaN layer doped with Mg, and the thickness of the low-temperature P-type layer is 10-40 um.
An embodiment of the present invention provides a method for manufacturing an led epitaxial wafer, which is used to manufacture an led epitaxial wafer provided in the first embodiment of the present invention, and fig. 3 is a flowchart of a method for manufacturing an led epitaxial wafer provided in the first embodiment of the present invention, as shown in fig. 3, the method includes:
In this embodiment, the substrate is sapphire, and the substrate may be placed on a graphite tray and fed into the reaction chamber for epitaxial material growth.
Step 301 further comprises:
and controlling the temperature of the reaction chamber to 1050 ℃ and the pressure to 200-500 Torr, annealing the sapphire substrate in a pure hydrogen atmosphere for 5-6 min, and then nitriding the sapphire substrate.
The invention uses Veeco EPIK700MOCVD to grow high-brightness GaN-based LED epitaxial wafer. High-purity H2 or high-purity N2 or mixed gas of high-purity H2 and high-purity N2 is used as carrier gas, high-purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and magnesium diclocene (CP) is used2Mg) as a P-type dopant, the substrate is (0001) plane sapphire, and the chamber pressure is between 50torr and 600 torr.
Wherein the buffer layer is an AlN layer.
Specifically, the substrate is placed in a reaction chamber of a PVD (Physical Vapor Deposition) apparatus, and an AlN buffer layer is grown by a PVD method, including: adjusting the temperature in a reaction cavity of the PVD equipment to 400-700 ℃, adjusting the sputtering power to 3000-5000W, adjusting the pressure to 1-10 mtorr, and growing an AlN buffer layer with the thickness of 15-35 nm.
The undoped GaN layer, the N-type layer, the multi-quantum well layer, the low-temperature P-type layer, the electron blocking layer, the P-type layer, and the P-type contact layer in the epitaxial layer may be grown by MOCVD (Metal-organic Chemical vapor deposition). In particular implementation, the substrate is generally placed on a graphite tray and fed into the reaction chamber of the MOCVD equipment to carry out the growth of the epitaxial material, so that the temperature and pressure controlled in the growth process actually refer to the temperature and pressure in the reaction chamber. Specifically, trimethyl gallium or trimethyl ethyl is used as a gallium source, triethyl boron is used as a boron source, high-purity ammonia gas is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, an N-type dopant is selected from silane, and a P-type dopant is selected from magnesium cyclopentadienyl.
Illustratively, the temperature of the reaction chamber is controlled to be 1000-1200 ℃, the pressure is controlled to be 100-500 torr, and an undoped GaN layer with the thickness of 1-3 um is grown.
Wherein the N-type layer is a Si-doped GaN layer, and the doping concentration of Si can be 1018cm-3～1020cm-3。
Illustratively, the temperature of the reaction chamber is controlled to be 1000-1200 ℃, the pressure is controlled to be 100-300 torr, and the N-type GaN layer with the thickness of 1-5 um is grown.
In this embodiment, the multiple quantum well layer includes a plurality of quantum well layers and a plurality of quantum barrier layers that are alternately grown. Each quantum well layer comprises a first sublayer, a second sublayer and a third sublayer which are sequentially laminated, wherein the first sublayer, the second sublayer and the third sublayer are all InxGa1-xN layer, x is more than 0 and less than 1. The In composition In the first sublayer and the third sublayer is 25% to 35% of the In composition In the second sublayer.
Alternatively, the multiple quantum well layer may include n quantum well layers and n quantum barrier layers alternately grown, 8. ltoreq. n.ltoreq.12.
In the present embodiment, n is 10, that is, the multiple quantum well layer may include 10 quantum well layers and 10 quantum barrier layers that are alternately grown.
Further, the thicknesses of the first sublayer and the third sublayer are equal, and the thickness of the second sublayer is larger than that of the first sublayer.
Optionally, the thickness of the first sub-layer and the third sub-layer can be 2-5 nm.
Optionally, the thickness ratio of the first sublayer, the second sublayer and the third sublayer is 1:3:1 or 1: 4: 1 or 1: 5: 1 or 1:6: 1.
it should be noted that the thickness ratio of the first sub-layer, the second sub-layer, and the third sub-layer may be selected according to the size of the light emitting wavelength of the desired LED device. The longer the emission wavelength, the more quantum well layer In is needed, the thicker the thickness of the second sublayer, and the longer the emission, the less quantum well layer In is needed, and the thinner the thickness of the second sublayer.
Illustratively, when the emission wavelength of the desired LED device is 445nm to 460nm, the thickness ratio of the first sublayer, the second sublayer, and the third sublayer may be set to 1:3:1, setting the In component In the first sublayer and the third sublayer to be 25% -30% of the In component In the second sublayer.
When the light emitting wavelength of the desired LED device is 460nm to 470nm, the thickness ratio of the first sublayer, the second sublayer, and the third sublayer may be set to 1: 4: 1, setting the In component In the first sublayer and the third sublayer to be 25% -30% of the In component In the second sublayer.
When the light emitting wavelength of the desired LED device is 515nm to 525nm, the thickness ratio of the first sublayer, the second sublayer, and the third sublayer may be set to 1: 5: 1, setting the In component In the first sublayer and the third sublayer to be 30-35% of the In component In the second sublayer.
When the light emitting wavelength of the desired LED device is 520nm to 530nm, the thickness ratio of the first sublayer, the second sublayer, and the third sublayer may be set to 1:6:1, setting the In component In the first sublayer and the third sublayer to be 30-35% of the In component In the second sublayer.
In this embodiment, the thickness of the quantum well layer may be 2 to 3nm, and the thickness of the quantum barrier layer may be 9 to 20 nm.
Illustratively, step 305 may include:
and regulating the temperature of the reaction chamber to 720-820 ℃, controlling the pressure of the reaction chamber to be 100-300 torr, and growing the quantum well layer.
And adjusting the temperature of the reaction chamber to 850-950 ℃, controlling the pressure of the reaction chamber to be 100-300 torr, and growing the GaN quantum barrier layer.
Further, the growth temperature of the first sub-layer is equal to that of the third sub-layer, and the growth temperature of the second sub-layer is lower than that of the first sub-layer. Because In is difficult to be effectively doped into the GaN material, and the low temperature is favorable for the doping of In, the growth temperature of the second sublayer is set to be lower, the doping of In the second sublayer is favorable, and the highest In component In the second sublayer can be realized.
Optionally, the growth temperature of the second sub-layer is 10-30 ℃ lower than that of the first sub-layer. In is more favorably doped into the second sub-layer (In is easily doped at low temperature), so that In the quantum well layer can be intensively distributed In the second sub-layer, and the light emitting concentration of the LED is improved.
Optionally, step 305 may further include:
the second sublayer is grown under a gas atmosphere in which nitrogen and ammonia are mixed. The first sublayer and the third sublayer were grown under a gas atmosphere in which nitrogen, ammonia, and hydrogen were mixed.
Because the growth temperature of the quantum well layer is low, more carbon and oxygen impurities can be introduced in the growth process, the crystal quality of the multiple quantum well layer is influenced, and the luminous intensity of the LED is influenced finally. Therefore, in the embodiment of the invention, a small amount of hydrogen is introduced when the first sublayer and the third sublayer are grown, which is beneficial to reducing the content of carbon and oxygen impurities in the quantum well layer, so that the surface appearance and the crystal quality of the quantum well layer can be improved, the interface definition of the quantum well layer and the quantum barrier layer is improved, the crystal quality of the multiple quantum well layer is further improved, and the LED light-emitting efficiency is finally improved.
Further, when the first sublayer and the third sublayer are grown, the flow rate of the introduced hydrogen is 1% -5% of the total flow rate of the introduced nitrogen and ammonia. If the flow rate of the introduced hydrogen is less than 1% of the total flow rate of the introduced nitrogen and ammonia, the crystal quality of the multiple quantum well layer cannot be improved. If the flow of the introduced hydrogen is more than 5% of the total flow of the introduced nitrogen and ammonia, the hydrogen content is too high, and the hydrogen has strong reducibility, so that In a quantum well layer is separated out to form impurities, the crystal quality of the quantum well is influenced, and the luminous efficiency of the LED is finally influenced.
And step 306, growing a low-temperature P-type layer on the multi-quantum well layer.
Wherein, the low temperature P type layer can be a GaN layer doped with Mg, and the thickness is 10-40 um.
Illustratively, the temperature of the reaction chamber is controlled to be 700-800 ℃, the pressure is controlled to be 100-600 Torr, and a low-temperature P-type layer with the thickness of 10-40 um is grown.
Wherein the electron blocking layer is an AlGaN layer doped with Mg, and the electron blocking layer contains MgDoping concentration less than 1019cm-3。
Exemplarily, the temperature of the reaction chamber is controlled to be 900-1000 ℃, the pressure is controlled to be 100-300 Torr, and the electron blocking layer with the thickness of 20-30 nm is grown.
Wherein the P-type layer is a GaN layer doped with Mg, and the doping concentration of Mg in the P-type layer is greater than or equal to 1020cm-3
Illustratively, the temperature of the reaction chamber is controlled to be 900-980 ℃, the pressure is controlled to be 300-600 Torr, and a P-type layer with the thickness of 10-30 nm is grown.
Step 309 grows a P-type contact layer on the P-type layer.
Wherein the P-type contact layer can be a heavily doped Mg GaN layer, and the doping concentration of Mg is greater than or equal to 1 x 1020cm-3。
Illustratively, the temperature of the reaction chamber is controlled to be 850-1050 ℃, the pressure is controlled to be 100-600 Torr, and a P-type contact layer with the thickness of 30-50 nm is grown.
After the steps are completed, the temperature of the reaction chamber is reduced to 650-850 ℃, annealing treatment is carried out for 5-15 min in a nitrogen atmosphere, then the temperature is gradually reduced to the room temperature, and the epitaxial growth of the light emitting diode is finished.
According to the embodiment of the invention, each quantum well layer is set to be of a three-layer structure, and all three sub-layers are InxGa1-xAnd x is more than 0 and less than 1, and the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer. On one hand, the In component of the part, In contact with the quantum barrier layer, of each quantum well layer is low, the polarization effect generated by lattice mismatch at the interface of the quantum well layer and the quantum barrier layer can be weakened, the radiation recombination rate of electrons and holes is improved, and therefore the luminous efficiency of the LED is improved. The In component content In the middle of each quantum well layer is high, and the light emitting concentration of the LED can be further improved. On the other hand, since In is an impurity, the higher the In composition, the worse the GaN crystal quality, and thus setting the In composition In the first sublayer and the third sublayer to 25% to 35% of the In composition In the second sublayer, the first sublayer and the third sublayer areThe In component In the sub-layer is relatively low, which is beneficial to improving the crystal quality of the first sub-layer and the third sub-layer.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent replacements, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (5)
1. A light emitting diode epitaxial wafer comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electron blocking layer, a P-type layer and a P-type contact layer which are sequentially laminated on the substrate, wherein the multi-quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately grown,
each quantum well layer comprises a first sub-layer, a second sub-layer and a third sub-layer which are sequentially stacked, and the first sub-layer, the second sub-layer and the third sub-layer are all InxGa1-xThe X is more than 0 and less than 1, and the In component In the first sublayer and the third sublayer is 25-35% of the In component In the second sublayer;
the thickness ratio of the first sublayer, the second sublayer and the third sublayer is 1:3:1 or 1: 4: 1 or 1: 5: 1 or 1:6:1, selecting the thickness ratio of the first sublayer, the second sublayer and the third sublayer according to the light-emitting wavelength of the light-emitting diode epitaxial wafer;
the second sublayer is grown in a gas atmosphere in which nitrogen and ammonia are mixed, and the first sublayer and the third sublayer are grown in a gas atmosphere in which nitrogen, ammonia and hydrogen are mixed.
2. A manufacturing method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer, a P-type layer and a P-type contact layer on the substrate in sequence;
the multiple quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately grown, each quantum well layer comprises a first sublayer, a second sublayer and a third sublayer which are sequentially stacked, and the first sublayer, the second sublayer and the third sublayer are all InxGa1-xN layer, 0 < x < 1, In composition In the first sublayer and the third sublayer being 25% -35% of In composition In the second sublayer, thickness ratio of the first sublayer, the second sublayer and the third sublayer being 1:3:1 or 1: 4: 1 or 1: 5: 1 or 1:6:1, selecting the thickness ratio of the first sublayer, the second sublayer and the third sublayer according to the light-emitting wavelength of the light-emitting diode epitaxial wafer;
the manufacturing method further includes:
growing the second sublayer under a gas atmosphere in which nitrogen and ammonia are mixed;
growing the first sublayer and the third sublayer under a gas atmosphere in which nitrogen, ammonia, and hydrogen are mixed.
3. The method of manufacturing according to claim 2, wherein a growth temperature of the first sub-layer is equal to a growth temperature of the third sub-layer, and a growth temperature of the second sub-layer is lower than the growth temperature of the first sub-layer.
4. The method according to claim 3, wherein the growth temperature of the second sublayer is 10 to 30 ℃ lower than the growth temperature of the first sublayer.
5. The production method according to claim 2, wherein a flow rate of the hydrogen gas introduced when the first sublayer and the third sublayer are grown is 1% to 5% of a total flow rate of the nitrogen gas and the ammonia gas introduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910117966.6A CN109950372B (en) | 2019-02-15 | 2019-02-15 | Light emitting diode epitaxial wafer and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910117966.6A CN109950372B (en) | 2019-02-15 | 2019-02-15 | Light emitting diode epitaxial wafer and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109950372A CN109950372A (en) | 2019-06-28 |
| CN109950372B true CN109950372B (en) | 2020-08-14 |
Family
ID=67007974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910117966.6A Active CN109950372B (en) | 2019-02-15 | 2019-02-15 | Light emitting diode epitaxial wafer and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109950372B (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110718612B (en) * | 2019-08-30 | 2021-08-06 | 华灿光电（浙江）有限公司 | Light emitting diode epitaxial wafer and manufacturing method thereof |
| CN110993753B (en) * | 2019-11-22 | 2021-03-02 | 华灿光电(苏州）有限公司 | Light emitting diode epitaxial wafer and manufacturing method thereof |
| CN111029444A (en) * | 2019-12-18 | 2020-04-17 | 马鞍山杰生半导体有限公司 | LED epitaxial structure and preparation method thereof |
| CN111326614B (en) * | 2020-03-07 | 2021-07-09 | 孙蕾蕾 | Method for improving luminous efficiency of outdoor lighting source |
| CN111785817A (en) * | 2020-08-25 | 2020-10-16 | 北京蓝海创芯智能科技有限公司 | InGaN/(In) GaN quantum well structure and method for improving luminous uniformity of quantum well |
| CN112531082B (en) * | 2020-11-04 | 2021-10-01 | 华灿光电（浙江）有限公司 | Micro light-emitting diode epitaxial wafer and manufacturing method thereof |
| CN113193083B (en) * | 2021-03-16 | 2023-05-09 | 华灿光电（浙江）有限公司 | Preparation method of light-emitting diode epitaxial wafer |
| CN114597293B (en) * | 2022-05-06 | 2022-08-05 | 江西兆驰半导体有限公司 | Light emitting diode epitaxial wafer and preparation method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060086932A1 (en) * | 2004-10-26 | 2006-04-27 | Samsung Electro-Mechanics Co., Ltd. | Nitride based semiconductor device |
| CN106098883A (en) * | 2016-06-27 | 2016-11-09 | 山东浪潮华光光电子股份有限公司 | A kind of quantum well structure, a kind of LED epitaxial structure and growing method thereof |
| CN107919422A (en) * | 2017-11-16 | 2018-04-17 | 李丹丹 | Backlit display screen light emitting diode and preparation method thereof |
-
2019
- 2019-02-15 CN CN201910117966.6A patent/CN109950372B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060086932A1 (en) * | 2004-10-26 | 2006-04-27 | Samsung Electro-Mechanics Co., Ltd. | Nitride based semiconductor device |
| CN106098883A (en) * | 2016-06-27 | 2016-11-09 | 山东浪潮华光光电子股份有限公司 | A kind of quantum well structure, a kind of LED epitaxial structure and growing method thereof |
| CN107919422A (en) * | 2017-11-16 | 2018-04-17 | 李丹丹 | Backlit display screen light emitting diode and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109950372A (en) | 2019-06-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109950372B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109904288B (en) | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN110718612B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109830580B (en) | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109920889B (en) | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109119515B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109216519B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109920896B (en) | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109786527B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109545924B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN113206175B (en) | Light-emitting diode epitaxial wafer and preparation method thereof | |
| CN109768133B (en) | Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN112531082B (en) | Micro light-emitting diode epitaxial wafer and manufacturing method thereof | |
| CN110993753B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN109473520B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN108598222B (en) | Light emitting diode epitaxial wafer and growth method thereof | |
| CN217641376U (en) | LED epitaxial wafer and LED chip | |
| CN113571615B (en) | Light emitting diode epitaxial wafer for improving ohmic contact and manufacturing method thereof | |
| CN113161462B (en) | Light emitting diode epitaxial wafer and manufacturing method thereof | |
| CN113113515B (en) | Growth method of light emitting diode epitaxial wafer | |
| CN112366259B (en) | Light emitting diode epitaxial wafer and preparation method thereof | |
| CN111883623B (en) | Near ultraviolet light emitting diode epitaxial wafer and preparation method thereof | |
| CN110061104B (en) | Method for manufacturing gallium nitride-based light emitting diode epitaxial wafer | |
| CN113224211A (en) | Ultraviolet light-emitting diode epitaxial wafer and manufacturing method thereof | |
| CN114464709A (en) | LED epitaxial wafer, epitaxial growth method and LED chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |