CN110010491B - 一种多层堆叠射频微系统立方体结构的制作工艺 - Google Patents
一种多层堆叠射频微系统立方体结构的制作工艺 Download PDFInfo
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- CN110010491B CN110010491B CN201811593357.XA CN201811593357A CN110010491B CN 110010491 B CN110010491 B CN 110010491B CN 201811593357 A CN201811593357 A CN 201811593357A CN 110010491 B CN110010491 B CN 110010491B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4817—Conductive parts for containers, e.g. caps
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting a build-up interconnect during or after the bonding process
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CN201811593357.XA CN110010491B (zh) | 2018-12-25 | 2018-12-25 | 一种多层堆叠射频微系统立方体结构的制作工艺 |
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CN201811593357.XA CN110010491B (zh) | 2018-12-25 | 2018-12-25 | 一种多层堆叠射频微系统立方体结构的制作工艺 |
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CN110010491B true CN110010491B (zh) | 2021-05-28 |
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Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
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CN110739231A (zh) * | 2019-09-24 | 2020-01-31 | 杭州臻镭微波技术有限公司 | 一种三维堆叠射频光模块制作方法 |
CN110739230A (zh) * | 2019-09-24 | 2020-01-31 | 杭州臻镭微波技术有限公司 | 一种针对射频芯片热集中点的三维堆叠散热模组制作方法 |
CN111403332B (zh) * | 2020-02-28 | 2023-04-28 | 浙江集迈科微电子有限公司 | 一种超厚转接板的制作方法 |
CN112053959A (zh) * | 2020-03-02 | 2020-12-08 | 浙江集迈科微电子有限公司 | 一种多层堆叠射频光模块立方体结构的制作方法 |
CN111968961B (zh) * | 2020-08-24 | 2022-08-12 | 浙江集迈科微电子有限公司 | 侧壁互联板及其制作工艺 |
CN111968944A (zh) * | 2020-08-24 | 2020-11-20 | 浙江集迈科微电子有限公司 | 一种射频模组超薄堆叠工艺 |
CN112768432B (zh) * | 2020-12-31 | 2022-04-01 | 中国电子科技集团公司第五十五研究所 | 一种集成大功率射频芯片的微流体转接板及其制备方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH09179084A (ja) * | 1995-12-22 | 1997-07-11 | Hitachi Kasei Techno Plant Kk | 液晶用ガラス基板の熱処理装置 |
CN103715152A (zh) * | 2012-10-09 | 2014-04-09 | 宏启胜精密电子(秦皇岛)有限公司 | 连接基板及层叠封装结构 |
CN106449569A (zh) * | 2016-10-24 | 2017-02-22 | 华进半导体封装先导技术研发中心有限公司 | 叠层芯片微流道散热结构和制备方法 |
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US8865525B2 (en) * | 2010-11-22 | 2014-10-21 | Bridge Semiconductor Corporation | Method of making cavity substrate with built-in stiffener and cavity substrate manufactured thereby |
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Publication number | Priority date | Publication date | Assignee | Title |
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JPH09179084A (ja) * | 1995-12-22 | 1997-07-11 | Hitachi Kasei Techno Plant Kk | 液晶用ガラス基板の熱処理装置 |
CN103715152A (zh) * | 2012-10-09 | 2014-04-09 | 宏启胜精密电子(秦皇岛)有限公司 | 连接基板及层叠封装结构 |
CN106449569A (zh) * | 2016-10-24 | 2017-02-22 | 华进半导体封装先导技术研发中心有限公司 | 叠层芯片微流道散热结构和制备方法 |
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