CN109994575B - Electrode alignment method of reversed polarity AlGaInP quaternary LED chip - Google Patents

Electrode alignment method of reversed polarity AlGaInP quaternary LED chip Download PDF

Info

Publication number
CN109994575B
CN109994575B CN201711487966.2A CN201711487966A CN109994575B CN 109994575 B CN109994575 B CN 109994575B CN 201711487966 A CN201711487966 A CN 201711487966A CN 109994575 B CN109994575 B CN 109994575B
Authority
CN
China
Prior art keywords
layer
film
ohmic contact
contact pattern
mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711487966.2A
Other languages
Chinese (zh)
Other versions
CN109994575A (en
Inventor
李晓明
沈龙梅
任忠祥
单立英
肖成峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Inspur Huaguang Optoelectronics Co Ltd
Original Assignee
Shandong Inspur Huaguang Optoelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Inspur Huaguang Optoelectronics Co Ltd filed Critical Shandong Inspur Huaguang Optoelectronics Co Ltd
Priority to CN201711487966.2A priority Critical patent/CN109994575B/en
Publication of CN109994575A publication Critical patent/CN109994575A/en
Application granted granted Critical
Publication of CN109994575B publication Critical patent/CN109994575B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes

Abstract

The invention relates to an electrode alignment method of a reverse polarity AlGaInP quaternary LED chip, which comprises the following steps: the method comprises the steps of firstly growing a layer of Au or AuBe film on the P surface of a reversed polarity AlGaInP quaternary LED epitaxial wafer, obtaining a P surface ohmic contact pattern by a conventional photoetching method, leaving two symmetrical marks at the upper edge, the lower edge, the left edge and the right edge of the epitaxial wafer, removing the N surface corresponding to the mark of the reversed polarity AlGaInP quaternary LED chip which is bonded and corroded by a substrate to be transparent and visible (namely exposing the N type AlGaInP layer) in a mode of taking a photoresist or a metal film as a mask according to the mark left by the P surface, and aligning the N surface ohmic contact pattern with the P surface ohmic contact pattern according to the mark.

Description

Electrode alignment method of reversed polarity AlGaInP quaternary LED chip
Technical Field
The invention relates to an electrode alignment method of a reverse polarity AlGaInP quaternary LED chip, belonging to the technical field of photoelectrons.
Background
The LED is used as a new illumination light source in the 21 st century, and under the same brightness, the power consumption of a semiconductor lamp is only l/10 of that of a common incandescent lamp, but the service life of the semiconductor lamp can be prolonged by 100 times. The LED device is a cold light source, has high light efficiency, low working voltage, low power consumption and small volume, can be packaged in a plane, is easy to develop light and thin products, has firm structure and long service life, does not contain harmful substances such as mercury, lead and the like in the light source, does not have infrared and ultraviolet pollution, and does not generate pollution to the outside in production and use. Therefore, the semiconductor lamp has the characteristics of energy conservation, environmental protection, long service life and the like, and like the transistor replaces the electron tube, the semiconductor lamp replaces the traditional incandescent lamp and the traditional fluorescent lamp, and the trend is also great. From the viewpoint of saving electric energy, reducing greenhouse gas emission and reducing environmental pollution, the LED serving as a novel lighting source has great potential for replacing the traditional lighting source.
AlGaInP material systems were originally used to produce visible light laser diodes, and AlGaInP materials were proposed by japanese researchers in the mid-eighties of the twentieth century, and LED and LD devices in that time typically used ga0.5in0.5p matched to a GaAs substrate as an active light emitting region, having an emission wavelength of 650nm, and have found wide application in quaternary laser pens and DVD and players. Later, researchers found that introducing an Al component into GaInP could shorten the emission wavelength further, but if the Al content is too high, the emission efficiency of the device would be decreased sharply, because AlGaInP becomes an indirect bandgap semiconductor when the Al content in GaInP exceeds 0.53, and therefore AlGaInP materials are generally used only to prepare LED devices with emission wavelengths above 570 nm. In 1997, AlGaInP-based LEDs of the first Multiple Quantum Well (MQW) composite bragg reflector (DBR) structure were produced in the world, and LED devices designed based on this structure still occupied a large share of the low-end market of LEDs to date.
The reversed polarity AlGaInP quaternary LED chip is widely applied to the field of high-power red LED display screens, the reversed polarity is to replace a substrate, a GaAs substrate with larger light absorption is replaced by a single crystal conductive Si substrate or a sapphire substrate, the GaAs substrate is corroded and removed after replacement, a corrosion barrier layer is corroded to expose a heavily doped layer, Au is evaporated on the heavily doped layer to form ohmic contact, N-face ohmic contact layer patterns are prepared by subsequent photoetching, in order to ensure that reversed polarity AlGaInP obtains better current expansion and higher brightness, the N-face ohmic contact patterns are generally aligned with the P-face ohmic contact patterns, the middle part of an epitaxial layer of the reversed polarity AlGaInP quaternary LED chip is opaque, partial area of the epitaxial layer is selectively corroded when the electrode is aligned to the N-face ohmic contact patterns, and the method has the defects that, the loss of the chip is large, so how to effectively align and reduce the loss of the chip becomes a major problem at present.
Chinese patent document CN104518056A discloses a method for manufacturing an AlGaInP red LED chip with reversed polarity, which mainly inserts a step of removing a residual metal film layer at the edge of a wafer between two steps of stripping a GaAs substrate and etching a barrier layer, thereby preventing the wafer from being contaminated before evaporation of an N-type electrode, ensuring the surface of the chip to be clean, and avoiding the problems of downshifting and yield reduction caused by electrode loss in the subsequent process.
Chinese patent document CN205723599U discloses a reversed-polarity AlGaInP-based LED with ITO covered on the surface, which is mainly formed by sequentially disposing a metal bonding layer, an ODR mirror, an epitaxial layer, an ITO extended current extended layer and a main electrode on a permanent substrate with a back electrode; the ODR reflector is composed of a metal reflecting layer and a dielectric film layer which are connected with each other, and the dielectric film layer is connected with the epitaxial layer; the metal reflecting layer is connected with the metal bonding layer; an ohmic contact point is arranged between the ITO current expansion layer and the epitaxial layer; the surface of the ITO current spreading layer is coarsened. The invention is suitable for the current expansion of the N-type layer of the reversed polarity AlGaInP-based LED, and does not relate to the alignment of the N-type layer and the P-surface electrode.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the electrode alignment method of the reversed polarity AlGaInP quaternary LED chip, which has the advantages of simple process, higher alignment degree and less chip loss.
The technical scheme of the invention is as follows:
an electrode alignment method of a reversed polarity AlGaInP quaternary LED chip comprises the following steps:
(1) a layer of Au film or AuBe film is evaporated on the P surface of the reversed polarity AlGaInP quaternary LED epitaxial wafer, a P surface ohmic contact pattern is prepared on the Au film or AuBe film, and two symmetrical marks containing the P surface ohmic contact layer are left at the center positions of the upper edge, the lower edge, the left edge and the right edge of the epitaxial wafer; the reverse polarity AlGaInP quaternary LED epitaxial wafer sequentially comprises a GaAs substrate, a blocking layer, a light-tight epitaxial layer, an N-type AlGaInP layer and a reverse polarity quaternary LED epitaxial layer from bottom to top;
compared with other metal films, the Au film or the AuBe film and the P surface of the reverse polarity AlGaInP quaternary LED epitaxial wafer can form good ohmic contact, and the P surface ohmic contact pattern prepared by the Au film or the AuBe film is clearer and is easier to align subsequently.
(2) Growing a layer of SiO on the epitaxial wafer generated in the step (1)2Removing the SiO on the P-surface ohmic contact pattern generated in the step (1)2Film to obtain SiO2A film pattern;
SiO2the film can effectively play a role in current blocking and current expansion; and, because of the SiO on the P-face ohmic contact pattern2The film is removed, and lines at the relevant marks are clearer and easier to align.
(3) Sequentially evaporating a metal reflector layer (Au or Ag) and a metal bonding layer (Au or TiAu) on the epitaxial wafer generated in the step (2); evaporating a metal bonding layer (Au or TiAu) on the surface of a single crystal conductive Si substrate or a sapphire substrate, evaporating a metal bonding layer (In or Sn) on the metal bonding layer, and then bonding the reversed polarity AlGaInP quaternary LED epitaxial wafer and the single crystal conductive Si substrate or the sapphire substrate together;
the metal reflector layer reflects light emitted from the inside of the reversed polarity AlGaInP quaternary LED chip to the bonded single crystal conductive Si substrate or sapphire substrate back and finally exits from the N-type AlGaInP layer, and the light emitting efficiency is improved. The metal bonding layer fuses with the metal adhesion layer and blocks diffusion of the metal adhesion layer (In or Sn). The metal bonding layer can be better fused with the metal bonding layer by utilizing the characteristics of In or Sn.
(4) Removing the GaAs substrate and the barrier layer, and removing the light-tight epitaxial layer at the position of the N surface corresponding to the mark made in the step (1) to expose the N-type AlGaInP layer at the position of the N surface corresponding to the mark made in the step (1) and make an N-surface ohmic contact pattern aligned with the P-surface ohmic contact pattern; and (4) because the light-tight epitaxial layer at the mark is removed, subsequently manufacturing an N-surface ohmic contact pattern, and aligning the N-surface ohmic contact pattern with the P-surface ohmic contact pattern by the mark.
The electrode alignment method adopts the method of manufacturing the mark on the P surface and aligning the mark on the P surface by the N surface, is simpler and more practical, adopts the method of leaving two marks at the upper position, the lower position or the left position and the right position, has higher alignment degree, occupies smaller area of the set mark, reduces the loss of a chip, improves the quality of the chip, has simple and convenient operation, can obtain more stable light emitting effect, and is suitable for large-scale production.
According to the present invention, preferably, the step (4) includes:
A. attaching a film at the position of the N surface corresponding to the mark made in the step (1); the N surface can be clearly displayed under strong light;
B. uniformly coating a positive photoresist with the thickness of 1.5-3 mu m on the film with the N surface;
C. removing the film, removing the positive photoresist on the film, and baking the whole epitaxial wafer in a baking oven at 90-105 ℃ for 5-15 minutes;
D. and putting the whole epitaxial wafer into the etching solution, etching the epitaxial layer exposed from the non-positive photoresist region to expose the N-type AlGaInP layer, seeing the mark of the P-surface ohmic contact pattern, and manufacturing the N-surface ohmic contact pattern to be aligned with the P-surface ohmic contact pattern. Because the N-type AlGaInP layer and the other AlGaInP quaternary epitaxial layers are transparent, the mark of the P-surface ohmic contact pattern is exposed at the mark, and the alignment of the N surface and the P surface can be carried out according to the pattern at the mark.
Preferably according to the invention, the film is a blue film. The blue film is not strong in viscosity, glue is not easy to fall off, and subsequent alignment is not influenced.
According to the present invention, preferably, the step (4) includes:
a. attaching a high-temperature-resistant adhesive tape to the position of the N surface corresponding to the mark made in the step (1); the N surface can be clearly displayed under strong light;
b. a GeAu film with the thickness of 0.3-0.6 mu m is vapor-plated on the N surface;
c. removing the high-temperature resistant adhesive tape, and removing the GeAu film on the high-temperature resistant adhesive tape;
d. and putting the whole epitaxial wafer into the etching solution, etching the epitaxial layer exposed from the GeAu film-free region to expose the N-type AlGaInP layer, seeing the mark of the P-surface ohmic contact pattern, and manufacturing the N-surface ohmic contact pattern to be aligned with the P-surface ohmic contact pattern. Because the N-type AlGaInP layer and the other AlGaInP quaternary epitaxial layers are transparent, the mark of the P-surface ohmic contact pattern is exposed at the mark, and the alignment of the N surface and the P surface can be carried out according to the pattern at the mark.
Preferably, in the step (1), the thickness of the Au film or AuBe film is 0.3 to 0.4 μm.
The thickness of the Au film or the AuBe film is selected to better complete the preparation of P-surface ohmic contact (pattern distortion during preparation when the thickness is too thin) and better complete alignment and reduce the use of metal (excessive use of metal with too thick thickness and cost increase).
Preferably, in step (1), the mark is rectangular.
Preferably, in step (1), the mark is square and has an area of 0.25-1mm2. The area occupied by the arranged marks is smaller, and the loss of chips is reduced.
According to the present invention, in the step (2), SiO is preferable2The thickness of the film is 0.35-0.5 μm. Matched with Au film or AuBe film thickness.
According to a preferable embodiment of the present invention, In the step (3), the metal mirror layer is made of Au or Ag, the metal bonding layer is made of Au or TiAu, and the metal bonding layer is made of In or Sn.
The invention has the beneficial effects that:
1. the electrode alignment method adopts a method of manufacturing a mark on the P surface and aligning the N surface with the mark on the P surface, so that the method is simpler and more practical;
2. the invention adopts a method of leaving two marks at the upper and lower positions or the left and right positions, so that the alignment degree is higher;
3. the mark provided by the invention occupies a small area, reduces the loss of the chip, improves the quality of the chip, is simple and convenient to operate, can obtain a more stable light emitting effect, and is suitable for large-scale production.
Drawings
Fig. 1 is a cross-sectional view of a reverse polarity quaternary LED chip made in accordance with the present invention.
Fig. 2 is a cross-sectional view of the reverse polarity quaternary LED chip manufactured in step (1) of the present invention.
Fig. 3 is a cross-sectional view of the reverse polarity quaternary LED chip manufactured in step (2) of the present invention.
FIG. 4 is a schematic representation of two symmetrical labels of step (1) of the present invention;
fig. 5 is a comparison graph of the effects of electrode alignment using the conventional electrode alignment method and the electrode alignment method of the present invention.
1. GaAs substrate, 2 blocking layer GaInP, 3 opaque epitaxial layer heavily doped with GaAs, 4, N type AlGaInP layer, 5, reverse polarity quaternary LED epitaxial layer, 6, Au film, 7, SiO2Film, 8, metal reflector layer, 9, metal bonding layer, 10, metal bonding layer, 11, Si substrate, 12 and N-side ohmic contact pattern.
Detailed Description
The invention is described in detail below with reference to the following examples and the accompanying drawings of the specification, but is not limited thereto.
Example 1
An electrode alignment method of a reversed polarity AlGaInP quaternary LED chip comprises the following steps:
(1) an Au film 6 with the thickness of 0.3-0.4 mu m is vapor-plated on the P surface of the reversed polarity AlGaInP quaternary LED epitaxial wafer, a P surface ohmic contact pattern is prepared on the Au film 6 by a conventional photoetching method, two symmetrical square marks containing the P surface ohmic contact layer are left at the center positions of the upper edge, the lower edge, the left edge and the right edge of the epitaxial wafer, and the area of the square marks is 0.25-1mm2As shown in fig. 4, the cross and X are used for subsequent alignment, and the black area is a square mark; the reverse polarity AlGaInP quaternary LED epitaxial wafer sequentially comprises a GaAs substrate 1, a blocking layer GaInP 2, a light-tight epitaxial layer heavily-doped GaAs 3, an N-type AlGaInP layer 4 and a reverse polarity quaternary LED epitaxial layer 5 from bottom to top; as shown in fig. 2.
Compared with other metal films, the Au film 6 and the P surface of the reverse polarity AlGaInP quaternary LED epitaxial wafer can form good ohmic contact, and the P surface ohmic contact pattern prepared by the Au film 6 is clearer and is easier to align subsequently. The thickness of the Au film 6 is selected, so that the preparation of P-surface ohmic contact (pattern distortion in preparation of too thin thickness) can be better completed, alignment can be better completed, and the use of metal is reduced (excessive use of metal with too thick thickness and cost increase). The area occupied by the arranged marks is smaller, and the loss of chips is reduced.
(2) Growing a layer of SiO with the thickness of 0.35-0.5 mu m on the epitaxial wafer generated in the step (1)2 Film 7, removing SiO on the P-side ohmic contact pattern generated in step (1) by conventional photolithography method2Film 7 to obtain SiO2A film pattern; as shown in fig. 3.
SiO2The film 7 can effectively play a role in current blocking and current expansion; and, because of the SiO on the P-face ohmic contact pattern2The film 7 is removed, and lines at relevant marks are clearer and easier to align.
(3) Sequentially evaporating a metal reflector layer 8(Au or Ag) and a metal bonding layer 9(Au or TiAu) on the epitaxial wafer generated in the step (2) in an electron beam evaporation way; evaporating a metal bonding layer 9(Au or TiAu) on the surface of a single-crystal conductive Si substrate 11 In an electron beam evaporation mode, evaporating a metal bonding layer 10(In or Sn) on the metal bonding layer 9 In an electron beam evaporation mode, and then bonding a reverse polarity AlGaInP quaternary LED epitaxial wafer and the single-crystal conductive Si substrate 11 together;
the metal reflector layer 8 emits light emitted from the inside of the reversed polarity AlGaInP quaternary LED chip to the single crystal conductive Si substrate 11 after bonding back, and finally exits from the N-type AlGaInP layer 4, so that the light emitting efficiency is improved. The metal bonding layer 9 fuses with the metal adhesion layer 10 and blocks diffusion of the metal adhesion layer 10(In or Sn). The metal bonding layer 10 can be better fused with the metal bonding layer 9 by utilizing the characteristics of In or Sn.
(4) Removing the GaAs substrate 1 and the blocking layer GaInP 2 by a conventional chemical etching method, removing the light-tight epitaxial layer 3 at the position of the N surface corresponding to the mark made in the step (1) in a mode of taking a photoresist or a metal film as a mask, exposing the N-type AlGaInP layer 4 at the position of the N surface corresponding to the mark made in the step (1), and making an N-surface ohmic contact pattern 12 to be aligned with the P-surface ohmic contact pattern; and (4) because the light-tight epitaxial layer at the mark is removed, subsequently manufacturing an N-surface ohmic contact pattern, and aligning the N-surface ohmic contact pattern with the P-surface ohmic contact pattern by the mark. The electrode alignment method adopts the method of manufacturing the mark on the P surface and aligning the mark on the P surface by the N surface, is simpler and more practical, adopts the method of leaving two marks at the upper position, the lower position or the left position and the right position, has higher alignment degree, occupies smaller area of the set mark, reduces the loss of a chip, improves the quality of the chip, has simple and convenient operation, can obtain more stable light emitting effect, and is suitable for large-scale production. The method comprises the following steps:
A. attaching a blue film with the same size to the position of the N surface corresponding to the mark made in the step (1); the N surface can be clearly displayed under strong light; the blue film is not strong in viscosity, glue is not easy to fall off, and subsequent alignment is not influenced.
B. Uniformly coating a positive photoresist with the thickness of 1.5-3 mu m on the blue film of the N surface;
C. removing the blue film, removing the positive photoresist on the blue film, and baking the whole epitaxial wafer in a baking oven at 90-105 ℃ for 5-15 minutes;
D. and putting the whole epitaxial wafer into the etching solution, etching the epitaxial layer exposed from the region without the positive photoresist to expose the N-type AlGaInP layer 4, seeing the mark of the P-surface ohmic contact pattern, and manufacturing an N-surface ohmic contact pattern 12 to be aligned with the P-surface ohmic contact pattern. Because the N-type AlGaInP layer 4 and the other AlGaInP quaternary epitaxial layers are transparent, the mark of the P-surface ohmic contact pattern is exposed at the mark, and the alignment of the N surface and the P surface can be carried out according to the pattern at the mark. The cross-sectional view of the reverse polarity quaternary LED chip manufactured in this embodiment is shown in fig. 1.
A comparison graph of the effect of the electrode alignment by the conventional electrode alignment method and the electrode alignment method of the embodiment is shown in fig. 5, (a) is a chip schematic diagram obtained by the conventional electrode alignment method; (b) is a schematic diagram of a chip obtained by adopting the electrode alignment method of the embodiment; the black area is a chip loss area, and the comparison shows that the chip loss area in the prior art is a random area and has a larger area, and after the electrode alignment method of the embodiment is adopted, the loss of the chip is greatly reduced, and the quality of the chip is improved.
Example 2
The method for aligning the electrodes of the reversed-polarity AlGaInP quaternary LED chip in the embodiment 1 is characterized in that the step (4) comprises the following steps:
a. sticking a high-temperature-resistant adhesive tape with the same size at the position of the N surface corresponding to the mark made in the step (1); the N surface can be clearly displayed under strong light;
b. evaporating a GeAu film with the thickness of 0.3-0.6 mu m on the N surface in an electron beam evaporation mode;
c. removing the high-temperature resistant adhesive tape, and removing the GeAu film on the high-temperature resistant adhesive tape;
d. and putting the whole epitaxial wafer into the etching solution, etching the epitaxial layer exposed from the GeAu film-free region to expose the N-type AlGaInP layer 4, seeing the mark of the P-surface ohmic contact pattern, and manufacturing the N-surface ohmic contact pattern to be aligned with the P-surface ohmic contact pattern. Because the N-type AlGaInP layer 4 and the other AlGaInP quaternary epitaxial layers are transparent, the mark of the P-surface ohmic contact pattern is exposed at the mark, and the alignment of the N surface and the P surface can be carried out according to the pattern at the mark.
Example 3
The method for aligning the electrodes of the AlGaInP quaternary LED chip with reversed polarity described in embodiment 1 or 2 is different from that,
in the step (1), a layer of AuBe film with the thickness of 0.3-0.4 mu m is evaporated on the P surface of the reversed polarity AlGaInP quaternary LED epitaxial wafer.
Example 4
The method for aligning the electrodes of the AlGaInP quaternary LED chips with reversed polarity described in examples 1-3 is different from the method,
in the step (3), a metal bonding layer 9(Au or TiAu) is evaporated on the surface of the sapphire substrate, a metal bonding layer 10(In or Sn) is evaporated on the metal bonding layer 9, and then the AlGaInP quaternary LED epitaxial wafer with reversed polarity is bonded with the sapphire substrate.

Claims (9)

1. An electrode alignment method of a reversed polarity AlGaInP quaternary LED chip is characterized by comprising the following steps:
(1) a layer of Au film or AuBe film is evaporated on the P surface of the reversed polarity AlGaInP quaternary LED epitaxial wafer, a P surface ohmic contact pattern is prepared on the Au film or AuBe film, and two symmetrical marks are left at the center positions of the upper edge, the lower edge, the left edge and the right edge of the epitaxial wafer; the reverse polarity AlGaInP quaternary LED epitaxial wafer sequentially comprises a GaAs substrate, a blocking layer, a light-tight epitaxial layer, an N-type AlGaInP layer and a reverse polarity quaternary LED epitaxial layer from bottom to top; the area of the mark is 0.25-1mm2；
(2) In thatGrowing a layer of SiO on the epitaxial wafer generated in the step (1)2Removing the SiO on the P-surface ohmic contact pattern generated in the step (1)2Film to obtain SiO2A film pattern;
(3) evaporating a metal reflector layer and a metal bonding layer on the epitaxial wafer generated in the step (2) in sequence; evaporating a metal bonding layer on the surface of a single crystal conductive Si substrate or a sapphire substrate, evaporating a metal bonding layer on the metal bonding layer, and then bonding a reverse polarity AlGaInP quaternary LED epitaxial wafer and the single crystal conductive Si substrate or the sapphire substrate together;
(4) and (3) removing the GaAs substrate and the barrier layer, and removing the light-tight epitaxial layer at the position of the N surface corresponding to the mark made in the step (1), so that the N-type AlGaInP layer is exposed at the position of the N surface corresponding to the mark made in the step (1), and manufacturing an N-surface ohmic contact pattern to be aligned with the P-surface ohmic contact pattern.
2. The method as claimed in claim 1, wherein the step (4) comprises:
A. attaching a film at the position of the N surface corresponding to the mark made in the step (1);
B. uniformly coating a positive photoresist with the thickness of 1.5-3 mu m on the film with the N surface;
C. removing the film, removing the positive photoresist on the film, and baking the whole epitaxial wafer at 90-105 ℃ for 5-15 minutes;
D. and putting the whole epitaxial wafer into the etching solution, etching the epitaxial layer exposed from the non-positive photoresist region to expose the N-type AlGaInP layer, seeing the mark of the P-surface ohmic contact pattern, and manufacturing the N-surface ohmic contact pattern to be aligned with the P-surface ohmic contact pattern.
3. The method as claimed in claim 2, wherein the film is a blue film.
4. The method as claimed in claim 1, wherein the step (4) comprises:
a. attaching a high-temperature-resistant adhesive tape to the position of the N surface corresponding to the mark made in the step (1);
b. a GeAu film with the thickness of 0.3-0.6 mu m is vapor-plated on the N surface;
c. removing the high-temperature resistant adhesive tape, and removing the GeAu film on the high-temperature resistant adhesive tape;
d. and putting the whole epitaxial wafer into the etching solution, etching the epitaxial layer exposed from the GeAu film-free region to expose the N-type AlGaInP layer, seeing the mark of the P-surface ohmic contact pattern, and manufacturing the N-surface ohmic contact pattern to be aligned with the P-surface ohmic contact pattern.
5. The method as claimed in claim 1, wherein the thickness of the Au film or AuBe film in step (1) is 0.3-0.4 μm.
6. The method as claimed in claim 1, wherein in step (1), the mark is rectangular.
7. The method as claimed in claim 1, wherein the marks in step (1) are square.
8. The method as claimed in claim 1, wherein in step (2), SiO is added to the substrate2The thickness of the film is 0.35-0.5 μm.
9. The method as claimed In any one of claims 1 to 8, wherein In step (3), the metal mirror layer is made of Au or Ag, the metal bonding layer is made of Au or TiAu, and the metal bonding layer is made of In or Sn.
CN201711487966.2A 2017-12-29 2017-12-29 Electrode alignment method of reversed polarity AlGaInP quaternary LED chip Active CN109994575B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711487966.2A CN109994575B (en) 2017-12-29 2017-12-29 Electrode alignment method of reversed polarity AlGaInP quaternary LED chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711487966.2A CN109994575B (en) 2017-12-29 2017-12-29 Electrode alignment method of reversed polarity AlGaInP quaternary LED chip

Publications (2)

Publication Number Publication Date
CN109994575A CN109994575A (en) 2019-07-09
CN109994575B true CN109994575B (en) 2020-03-27

Family

ID=67110457

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711487966.2A Active CN109994575B (en) 2017-12-29 2017-12-29 Electrode alignment method of reversed polarity AlGaInP quaternary LED chip

Country Status (1)

Country Link
CN (1) CN109994575B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110707196A (en) * 2019-10-21 2020-01-17 扬州乾照光电有限公司 LED chip with complementary pattern dielectric layer and manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203760507U (en) * 2014-02-21 2014-08-06 程君 LED eutectic wafer with alignment mark
CN104518056A (en) * 2014-12-31 2015-04-15 山东浪潮华光光电子股份有限公司 Preparation method of reverse polarity AlGaInP red light LED (Light-Emitting Diode) chip

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203760507U (en) * 2014-02-21 2014-08-06 程君 LED eutectic wafer with alignment mark
CN104518056A (en) * 2014-12-31 2015-04-15 山东浪潮华光光电子股份有限公司 Preparation method of reverse polarity AlGaInP red light LED (Light-Emitting Diode) chip

Also Published As

Publication number Publication date
CN109994575A (en) 2019-07-09

Similar Documents

Publication Publication Date Title
EP1551064A2 (en) Light emitting device and manufacturing method thereof.
US20100244077A1 (en) Photoelectronic element and the manufacturing method thereof
JP2016184724A (en) Light emitting device and light emitting device package including the same
KR20050097075A (en) Nitride semiconductor light emitting device and manufacturing method thereof
JP2011249411A (en) Semiconductor light-emitting element, light-emitting device, illumination device, display device, signal light unit and road information device
JP2008004587A (en) Semiconductor light-emitting element and manufacturing method thereof, and compound semiconductor light-emitting diode
TW200905910A (en) Light emitting device
CN109994575B (en) Electrode alignment method of reversed polarity AlGaInP quaternary LED chip
CN111200042A (en) Preparation method of AlGaInP quaternary LED chip
CN114342094A (en) Light emitting diode, preparation method and display panel
JP5781409B2 (en) Semiconductor light emitting element array and vehicle lamp
KR101457036B1 (en) Light emitting diode and manufacturing method of the same
KR102282383B1 (en) LED electrode assembly and manufacturing method thereof
CN110120443B (en) Preparation method of reversed polarity AlGaInP quaternary LED chip
CN114156379B (en) Manufacturing method of light-emitting chip
CN111106209B (en) Preparation method of AlGaInP quaternary LED chip
TWI608633B (en) Light emitting diode device and method for manufacturing the same
KR20190099620A (en) High efficiency led using nano particle
CN114497300B (en) Light emitting diode and light emitting device
CN110660886A (en) Preparation method of reversed polarity AlGaInP quaternary LED chip
CN109841713A (en) The face the P ohmic contact layer of reversed polarity quaternary LED and the preparation method of current extending
CN116190505A (en) Preparation method of GaAs-based LED chip
US10396246B2 (en) Optoelectronic device and method for manufacturing the same
KR200370463Y1 (en) High density-flat pannel lamp of white light emitting diodes
KR101679756B1 (en) Light emitting diode package and method for manufacturing the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant