CN109889165B - Amplifier with adjustable output common-mode voltage - Google Patents
Amplifier with adjustable output common-mode voltage Download PDFInfo
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- CN109889165B CN109889165B CN201910102505.1A CN201910102505A CN109889165B CN 109889165 B CN109889165 B CN 109889165B CN 201910102505 A CN201910102505 A CN 201910102505A CN 109889165 B CN109889165 B CN 109889165B
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Abstract
The invention discloses an output common-mode voltage adjustable amplifier, which comprises a self-adaptive current bias stage, a common-mode voltage adjusting circuit and a self-bias load amplifier; the self-bias load amplifier is used for forming a virtual ground point between the two NMOS tubes, providing a grid bias voltage for the virtual ground point and providing gain; the self-adaptive current bias stage clamps one end of a resistor to reference voltage by using an amplifier, and when the power supply voltage changes, the variable quantity of the power supply voltage is totally reflected on the resistor and is converted into the variable quantity of the bias current; the residual current of the reference current source after being pulled by the bias current flows through a load resistor in the common mode voltage regulating circuit to form self-adaptive voltage drop, so that the output common mode voltage regulation is realized. The invention can adjust the magnitude of the output common-mode voltage, obviously improve the drain-source voltage of the tail current source of the post-stage circuit under the low-voltage design, improve the circuit performance, and is suitable for the application occasions such as the programmable gain amplifier under the low-voltage and low-power consumption, and the like.
Description
Technical Field
The invention relates to an amplifier with adjustable output common-mode voltage, and belongs to the technical field of programmable gain amplifiers.
Background
In a radio frequency receiving system, a programmable gain amplifier is an important part in a wireless communication module and is mainly used for expanding the dynamic range of a received signal so as to improve the overall performance of a receiving link. The method adjusts the amplification gain of the signal according to the strength of the input signal, so that the amplitude of the output signal is constant, and the receiver can be ensured to correctly demodulate the received signal.
In order to make the output signal amplitude constant, one method is to introduce a master-slave structure to obtain a constant transconductance. In view of this, the power consumption level of the programmable gain amplifier occupies a considerable share in the receive chain. In order to realize low power consumption of the whole receiving circuit, with the progress of the technology, a lower power supply voltage is adopted for design. However, at low voltage, the output common mode voltage is too high, which affects the performance of the tail current source of the next stage circuit.
In the traditional differential amplifier, under the condition that the input common-mode level is constant, the output common-mode voltage cannot be adjusted in a self-adaptive manner along with the change of the power supply voltage. In a programmable gain amplifier, in order to obtain a purpose of small gain change along with temperature change, a constant transconductance is often obtained by adopting a master-slave structure, so that error sampling needs to be performed on an output end of a self-biased load amplifier. Under the condition of low voltage, when the common-mode voltage of the output end of the self-biased load amplifier is higher, the source-drain voltage of a tail current source of the error sampling circuit is small, so that the normal work of the circuit cannot be ensured.
Disclosure of Invention
The invention aims to solve the technical problem of overcoming the problem of overhigh common mode voltage in the design of low voltage and low power consumption, and provides an output common mode voltage adjustable amplifier, which converts the change of power supply voltage into the change of bias current so as to adaptively adjust the size of the output common mode voltage. The programmable gain amplifier is suitable for application occasions such as a programmable gain amplifier under low voltage and low power consumption.
The invention specifically adopts the following technical scheme to solve the technical problems:
an output common-mode voltage adjustable amplifier comprises an adaptive current bias stage, a common-mode voltage adjusting circuit and a self-bias load amplifier; the self-bias load amplifier is used for forming a virtual place between the two NMOS tubes, providing grid bias voltage for the virtual place, providing gain and multiplexing a load resistor with the common mode voltage regulating circuit; the self-adaptive current bias stage clamps one end of a resistor to reference voltage by using an amplifier, and when the power supply voltage changes, the variation of the power supply voltage is completely reflected on the resistor and correspondingly converted into the variation of the bias current; the residual current of the reference current source in the common mode voltage regulating circuit after being pulled by the bias current flows through a load resistor in the common mode voltage regulating circuit to form self-adaptive voltage drop, so that the output common mode voltage regulation is realized.
Further, as a preferred technical solution of the present invention: the self-adaptive current bias stage comprises a first amplifier, a first resistor, a first NMOS (N-channel metal oxide semiconductor) tube and a second NMOS tube; the reference voltage is connected with the negative input end of the first amplifier, the positive input end of the first amplifier is connected with the negative end of the first resistor, and the output end of the first amplifier is connected with the grid electrode of the first NMOS tube; the source electrode of the first NMOS tube is grounded, and the drain electrode of the first NMOS tube is connected with the negative electrode of the first resistor; the grid electrode of the second NMOS tube is connected with the grid electrode of the first NMOS tube, the source electrode of the second NMOS tube is grounded, and the drain electrode of the second NMOS tube is connected with the negative electrode of the reference current source; the positive pole of the first resistor is connected with a power supply.
Further, as a preferable technical solution of the present invention: the common-mode voltage regulating circuit comprises a reference current source, a second resistor and a third resistor; the positive end of the reference current is connected with the power supply, and the negative end of the reference current is respectively connected with the negative end of the second resistor and the negative end of the third resistor; the positive ends of the second resistor and the third resistor are respectively connected to a self-biased load amplifier.
Further, as a preferred technical solution of the present invention: the self-bias load amplifier comprises a first PMOS tube, a second PMOS tube, a third NMOS tube and a fourth NMOS tube; the grid electrode of the third PMOS tube is connected with the feedback voltage, the source electrode of the third PMOS tube is connected with the power supply, and the drain electrode of the third PMOS tube is respectively connected with the source electrode of the first PMOS tube and the source electrode of the second PMOS tube; the grid electrode of the first PMOS tube is connected with the positive end of the input voltage, and the drain electrode of the first PMOS tube is connected with the drain electrode of the third NMOS tube; the grid electrode of the third NMOS tube is connected with the common-mode voltage regulating circuit, and the source electrode of the third NMOS tube is grounded; the grid electrode of the second PMOS tube is connected with the negative end of the input voltage, and the drain electrode of the second PMOS tube is connected with the drain electrode of the fourth NMOS tube; and the grid electrode of the fourth NMOS tube is connected with the grid electrode of the third NMOS tube, and the source electrode of the fourth NMOS tube is grounded.
By adopting the technical scheme, the invention can produce the following technical effects:
according to the output common-mode voltage adjustable amplifier, because the self-adaptive current bias stage adopts the amplifier to clamp one end of the resistor to the reference voltage, when the power supply voltage changes, the variable quantity of the power supply voltage is totally reflected on the resistor and correspondingly converted into the variable quantity of the bias current; the residual current of the reference current source after being pulled by the bias current flows through the load of the amplifier to form self-adaptive voltage drop, so that the function of adjusting the output common-mode voltage is realized. The circuit utilizes an amplifier to fix one end of a resistor at a reference potential, and when the voltage of a power supply is reduced, the voltage drop of the resistor is reduced, which means that the current flowing through the resistor is reduced. Due to the virtual short and virtual break characteristics of the amplifier, the current cannot flow through the input end of the amplifier, so that the current flows through the biased first NMOS tube MN1, the current extracted from the reference current source by the mirror-biased second NMOS tube MN2 is reduced, more voltage drops exist on the load resistor of the amplifier, and therefore the output common-mode voltage is lower under the condition of low power supply voltage and is easier to cascade with a lower-level error sampling circuit.
Therefore, the amplifier can convert the change of the power supply voltage into the change of the bias current, thereby adjusting the magnitude of the output common-mode voltage, obviously improving the drain-source voltage of the tail current source of the post-stage circuit under the low-voltage design and improving the performance of the circuit; the invention solves the problem that the tail current source of the error sampling circuit cannot work normally due to overhigh common-mode voltage output by the main-stage self-biasing load amplifier in a low-voltage low-power consumption programmable gain amplifier PGA link and a master-slave structure, so the invention is suitable for application occasions of the programmable gain amplifier and the like under low voltage and low power consumption.
Drawings
Fig. 1 is a circuit diagram of an output common mode voltage adjustable amplifier according to the present invention.
Fig. 2 is a graph of gain versus temperature for a programmable gain amplifier employing the amplifier of the present invention.
Fig. 3 is a graph of the gain of a programmable gain amplifier chain as a function of temperature for use with the present invention.
Detailed Description
The following describes embodiments of the present invention with reference to the drawings.
As shown in fig. 1, the present invention provides an output common-mode voltage adjustable amplifier, which includes an adaptive current bias stage, a common-mode voltage adjusting circuit, and a self-biased load amplifier; the self-adaptive current bias stage is responsible for converting the change of the power supply voltage into the change of the bias current; the common mode voltage regulating circuit indirectly performs current and voltage conversion on the bias current; the self-biased load amplifier is responsible for providing gain. Specifically, the self-biased load amplifier is used for forming a virtual ground point between two NMOS tubes, providing a grid bias voltage for the virtual ground point, providing a gain and multiplexing a load resistor with a common-mode voltage regulating circuit; the self-adaptive current bias stage clamps one end of a resistor to reference voltage by using an amplifier, and when the power supply voltage changes, the variation of the power supply voltage is completely reflected on the resistor and correspondingly converted into the variation of the bias current; the residual current of the reference current source in the common mode voltage regulating circuit after being pulled by the bias current flows through the load resistor in the common mode voltage regulating circuit to form self-adaptive voltage drop, so that the regulation of the output common mode voltage is realized.
Specifically, the adaptive current bias stage comprises a first amplifier A1, a first resistor R1, a first NMOS transistor MN1 and a second NMOS transistor MN2; the reference voltage is connected with the negative input end of the first amplifier A1, the positive input end of the first amplifier A1 is connected with the negative end of the first resistor R1, and the output end of the first amplifier A1 is connected with the grid electrode of the first NMOS transistor MN 1; the source electrode of the first NMOS transistor MN1 is grounded, and the drain electrode of the first NMOS transistor MN1 is connected with the negative electrode of the first resistor R1; the grid electrode of the second NMOS tube MN2 is connected with the grid electrode of the first NMOS tube MN1, the source electrode of the second NMOS tube MN2 is grounded, and the drain electrode of the second NMOS tube MN2 is connected with the negative electrode of the reference current source; the anode of the first resistor R1 is connected with a power supply.
The common-mode voltage regulating circuit comprises a reference current source, a second resistor R2 and a third resistor R3; the positive end of the reference current is connected with the power supply, and the negative end of the reference current is respectively connected with the negative end of the second resistor R2 and the negative end of the third resistor R3; the positive ends of the second resistor R2 and the third resistor R3 are respectively connected to a self-biased load amplifier, namely the positive end of the second resistor R2 is connected to the drain electrode of a first PMOS tube MP1 in the self-biased load amplifier; the positive end of the third resistor R3 is connected with the drain electrode of the second PMOS transistor MP2 in the self-bias load amplifier.
The self-bias load amplifier comprises a first PMOS (P-channel metal oxide semiconductor) tube MP1, a second PMOS tube MP2, a third PMOS tube MP3, a third NMOS (N-channel metal oxide semiconductor) tube MN3 and a fourth NMOS tube MN4; the grid electrode of the third PMOS tube MP3 is connected with the feedback voltage, the source electrode of the third PMOS tube MP3 is connected with the power supply, and the drain electrode of the third PMOS tube MP3 is respectively connected with the source electrode of the first PMOS tube MP1 and the source electrode of the second PMOS tube MP 2; the grid electrode of the first PMOS tube MP1 is connected with the positive end of the input voltage, the drain electrode of the first PMOS tube MP1 is connected with the drain electrode of the third NMOS tube MN3, and the positive end of the second resistor R2 is connected with the drain electrode of the third NMOS tube MN3 and the drain electrode of the first PMOS tube MP 1; the grid electrode of the third NMOS transistor MN3 is connected with the negative end of the second resistor R2 in the common-mode voltage regulating circuit, and the source electrode of the third NMOS transistor MN3 is grounded; the grid electrode of the second PMOS tube MP2 is connected with the negative end of the input voltage, the drain electrode of the second PMOS tube MP2 is connected with the drain electrode of the fourth NMOS tube MN4, the positive end of the third resistor R3 is connected with the drain electrode of the fourth NMOS tube MN4 and the drain electrode of the second PMOS tube MP2, and the negative end of the third resistor R3 is connected with the negative end of the second resistor R2; the grid electrode of the fourth NMOS transistor MN4 is connected with the grid electrode of the third NMOS transistor MN3, and the source electrode of the fourth NMOS transistor MN4 is grounded.
The working principle of the amplifier of the invention is as follows: the self-bias load amplifier forms a virtual place between the third NMOS tube MN3 and the fourth NMOS tube MN4, provides grid bias voltage for the virtual place, and simultaneously provides gain and a second resistor R2 and a third resistor R3 which are multiplexed with the common-mode voltage regulating circuit to load; the self-adaptive current bias stage clamps one end of a first resistor R1 to reference voltage by using the virtual short and virtual break characteristic of a first amplifier A1, and when the power supply voltage changes, the change quantity of the power supply voltage is totally reflected on the first resistor R1 and correspondingly converted into the change quantity of the bias current; in view of the very large input impedance of the amplifier, the bias current flows entirely through the first NMOS transistor MN1. The first and second NMOS transistors MN1 and MN2 are mirror-connected, so that the bias current is finally reflected in the second NMOS transistor MN 2. The residual current of the reference current source in the common mode voltage regulating circuit after being pulled by the bias current flows through load resistors R2 and R3 in the common mode voltage regulating circuit to form self-adaptive voltage drop. If the power supply voltage is higher, the voltage drop on the load resistors R2 and R3 is smaller, and the output common mode voltage is higher; if the power supply voltage is lower, the voltage drop on the load resistors R2 and R3 is larger, and the output common mode voltage is lower, so that the function of adjusting the output common mode voltage is realized.
The circuit utilizes the first amplifier A1 to fix one end of a first resistor R1 of a resistor at a reference potential, and when the voltage of a power supply is reduced, the voltage drop of the resistor is reduced, namely the current flowing through the resistor is reduced. Due to the virtual short and virtual break characteristics of the amplifier, the current cannot flow through the input end of the amplifier, so that the current flows through the biased first NMOS tube MN1, the current extracted from the reference current source by the mirror-biased second NMOS tube MN2 is reduced, and more voltage drops exist on the load resistors R2 and R3 of the amplifier, so that the output common-mode voltage is lower under the condition of low power supply voltage, and the cascade connection with a lower-level error sampling circuit is easier.
As shown in fig. 2, the low-voltage low-power consumption output common-mode voltage adjustable amplifier of the present embodiment is applied to a graph of the gain variation with temperature in the programmable gain amplifier, and the power supply voltage is 700mv; as can be seen from the figure, the gain variation of the single-stage operational amplifier is only 0.1dB in the temperature range of-40 ℃ to 80 ℃.
As shown in fig. 3, for the graph of the gain of the programmable gain amplifier chain varying with temperature applied to the amplifier of this embodiment, the gain variation of the whole programmable gain amplifier chain is only as much as 0.5dB under 700mv of power supply voltage.
From the foregoing, the innovation of the present invention is mainly embodied in the adaptive current bias stage and the common-mode voltage regulation. The output common-mode voltage adjustable amplifier provided by the invention converts the change of the power supply voltage into the change of the bias current, thereby adjusting the size of the output common-mode voltage, obviously improving the drain-source voltage of the tail current source of the post-stage circuit under the low-voltage design and improving the performance of the circuit. Therefore, the invention is suitable for the application occasions of the programmable gain amplifier and the like under low voltage and low power consumption.
The embodiments of the present invention have been described in detail with reference to the drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
Claims (2)
1. An output common-mode voltage adjustable amplifier is characterized by comprising an adaptive current bias stage, a common-mode voltage adjusting circuit and a self-bias load amplifier; the self-bias load amplifier is used for forming a virtual place between the two NMOS tubes, providing grid bias voltage for the virtual place, providing gain and multiplexing a load resistor with the common mode voltage regulating circuit; the self-adaptive current bias stage clamps one end of a resistor to reference voltage by using an amplifier, and when the power supply voltage changes, the variation of the power supply voltage is completely reflected on the resistor and correspondingly converted into the variation of the bias current; residual current of a reference current source in the common mode voltage regulating circuit after being pulled by bias current flows through a load resistor in the common mode voltage regulating circuit to form self-adaptive voltage drop, so that output common mode voltage regulation is realized;
the adaptive current bias stage comprises a first amplifier (A1), a first resistor (R1), a first NMOS (N-channel metal oxide semiconductor) tube (MN 1) and a second NMOS tube (MN 2); the reference voltage is connected with the negative input end of the first amplifier (A1), the positive input end of the first amplifier (A1) is connected with the negative end of the first resistor (R1), and the output end of the first amplifier (A1) is connected with the grid electrode of the first NMOS transistor (MN 1); the source electrode of the first NMOS tube (MN 1) is grounded, and the drain electrode of the first NMOS tube is connected with the negative electrode of the first resistor (R1); the grid electrode of the second NMOS tube (MN 2) is connected with the grid electrode of the first NMOS tube (MN 1), the source electrode of the second NMOS tube (MN 2) is grounded, and the drain electrode of the second NMOS tube is connected with the negative electrode of the reference current source; the positive electrode of the first resistor (R1) is connected with a power supply;
the self-bias load amplifier comprises a first PMOS (P-channel metal oxide semiconductor) tube (MP 1), a second PMOS tube (MP 2), a third PMOS tube (MP 3), a third NMOS tube (MN 3) and a fourth NMOS tube (MN 4); the grid electrode of the third PMOS tube (MP 3) is connected with the feedback voltage, the source electrode of the third PMOS tube (MP 3) is connected with the power supply, and the drain electrode of the third PMOS tube (MP 3) is respectively connected with the source electrode of the first PMOS tube (MP 1) and the source electrode of the second PMOS tube (MP 2); the grid electrode of the first PMOS tube (MP 1) is connected with the positive end of the input voltage, and the drain electrode of the first PMOS tube (MP 1) is connected with the drain electrode of the third NMOS tube (MN 3); the grid electrode of the third NMOS tube (MN 3) is connected with the common-mode voltage regulating circuit, and the source electrode of the third NMOS tube is grounded; the grid electrode of the second PMOS tube (MP 2) is connected with the negative end of the input voltage, and the drain electrode of the second PMOS tube (MP 2) is connected with the drain electrode of the fourth NMOS tube (MN 4); the grid electrode of the fourth NMOS tube (MN 4) is connected with the grid electrode of the third NMOS tube (MN 3), and the source electrode of the fourth NMOS tube (MN 4) is grounded.
2. The output common-mode voltage adjustable amplifier of claim 1, wherein: the common-mode voltage regulating circuit comprises a reference current source, a second resistor (R2) and a third resistor (R3); the positive end of the reference current is connected with the power supply, and the negative end of the reference current is respectively connected with the negative end of the second resistor (R2) and the negative end of the third resistor (R3); the positive ends of the second resistor (R2) and the third resistor (R3) are respectively connected to a self-biased load amplifier.
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| CN201910102505.1A CN109889165B (en) | 2019-02-01 | 2019-02-01 | Amplifier with adjustable output common-mode voltage |
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| CN201910102505.1A CN109889165B (en) | 2019-02-01 | 2019-02-01 | Amplifier with adjustable output common-mode voltage |
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| CN109889165B true CN109889165B (en) | 2023-01-03 |
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| CN114448367B (en) * | 2020-11-02 | 2024-06-21 | 圣邦微电子（北京）股份有限公司 | Common mode feedback circuit with fixed potential |
| CN115412092B (en) * | 2022-09-01 | 2023-05-23 | 集益威半导体(上海)有限公司 | High-linearity tailless current rudder digital-to-analog converter |
| CN116470910B (en) * | 2023-06-16 | 2024-01-23 | 深圳前海深蕾半导体有限公司 | Current-mode audio frequency digital-to-analog converter |
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| CN203617973U (en) * | 2013-12-30 | 2014-05-28 | 哈尔滨理工大学 | Low-power consumption wideband amplification circuit for handheld digital scopemeter |
| US9647618B1 (en) * | 2016-03-30 | 2017-05-09 | Qualcomm Incorporated | System and method for controlling common mode voltage via replica circuit and feedback control |
| CN106230389B (en) * | 2016-09-27 | 2023-09-26 | 无锡中科微电子工业技术研究院有限责任公司 | High gain low noise amplifier |
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