CN209345112U - Operation transconductance amplifier - Google Patents
Operation transconductance amplifier Download PDFInfo
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- CN209345112U CN209345112U CN201920155437.0U CN201920155437U CN209345112U CN 209345112 U CN209345112 U CN 209345112U CN 201920155437 U CN201920155437 U CN 201920155437U CN 209345112 U CN209345112 U CN 209345112U
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Abstract
The utility model discloses a kind of operation transconductance amplifiers of lower feature of the supply voltage for being adapted to deep-submicron CMOS process, basic structure including having differential input stage and common-source output, and the adaptive-biased image current source circuit of bias current is provided to differential input stage.Under deep-submicron CMOS process (nominal supply voltage is 1~1.2V), the input offset voltage of the utility model operation transconductance amplifier still is able to be arranged to the value equal with output common mode voltage VOCM, that is the half of supply voltage, although the pressure drop very little of tail current source at this time, but remain to maintain constant current, thus the operation transconductance amplifier of the utility model still can obtain higher common-mode rejection ratio.The reverse phase proportional amplifier of operation transconductance amplifier based on the utility model has not only evaded the problem of foundation while maintaining the maximum input and output amplitude of oscillation, and no longer needs additional input common mode feedback circuit.The problems such as compared with traditional structure, additional increased NMOS tube only contributes common-mode noise to operation transconductance amplifier with biasing constant current source, will not bring closed-loop bandwidth reduction, noise penalty.
Description
Technical field
The present invention relates to technical field of semiconductors, are related to a kind of operation transconductance amplifier, and in particular to one kind can be applicable in
In the operation transconductance amplifier of deep-submicron CMOS process.
Background technique
Operation transconductance amplifier (OTA) is widely used in analogue layout, and most typical application is design tool
The reversed feedback amplifier of linear input/output relation.Fig. 1 is the circuit structure for the reverse phase proportional amplifier built based on OTA
Figure (wherein R1 is input resistance, and R2 is feedback resistance), wherein VICM indicates that input common mode voltage, VOCM indicate common mode output
Voltage.Because of negative feedback mechanism, reverse phase proportional amplifier can realize linearly putting for signal in wider input voltage range
Greatly.It is desirable that VICM and VOCM are both configured to the half of supply voltage to obtain voltage swing as big as possible, wish naturally
The input offset voltage of OTA is also equal to the half of supply voltage, and otherwise there are quiescent currents on feedback network, when gain changes
When (i.e. feedback network change), so that OTA needs the regular hour to re-establish operating point, this can be brought for the variation of quiescent current
Establish problem.
With the development of manufacturing process technology, the operating voltage VDD of CMOS advanced technologies has had been reduced to 1.2V even more
Low, it is more nervous that this distributes the voltage margin of OTA.And the not abundant Differential Input that will lead to of voltage margin is to tail current source
The decline of output impedance, in turn, the common-mode rejection ratio of OTA will be remarkably decreased.Assuming that input difference is formed to by PMOS tube,
The pressure drop of power supply to OTA input terminal is at least 0.8V (input pipe VSG≈ 0.5V, the V of tail current sourceSD≈ 0.3V), it is clear that in depth
Under sub-micron CMOS technology, the input offset voltage of traditional structure OTA cannot be set as the half of supply voltage again.Reverse phase ratio
The input terminal of OTA is exchange " void " ground in enlarged structure, therefore its input offset voltage can be set to closely or lean on
Nearly power supply (when input difference is to being NMOS tube) is to alleviate supply voltage decline bring voltage margin anxiety problem.This feelings
Under condition, VICM, VOCM of the input offset voltage (that is, its input common mode voltage) of OTA and reverse phase proportional amplifier not phase
With, which means that there are quiescent currents on feedback network;When changing closed loop gain by adjusting feedback resistance, because of common mode electricity
Quiescent current caused by flat difference can also change.This can bring the influence of two aspects: (1) input terminal of OTA need to add one
Common mode feedback circuit is inputted to fix the input offset voltage of OTA, as shown in Fig. 2, feedback resistance change causes to flow through itself
When curent change, the electric current of structure adjust automatically NMOS tube I0, to maintain input offset voltage, (reverse phase of OTA1 is defeated in Fig. 2
Enter to hold bias voltage) stabilization;(2) when gain switches, the current transients for flowing through feedback network lead to the quiescent point of OTA
It re-establishes, that is, brings the problem of foundation, influence the response speed of reversed feedback amplifier.In addition, if input common mode feedback circuit
Bandwidth it is insufficient, it is also possible to an important factor for becoming limitation reversed feedback amplifier response speed.
University of Macao Pui-In Mak is published in paper " the On the Design of a on IEEE TCAS-I
Programmable-Gain Amplifier With Built-In Compact DC-Offset Cancellers for
Very Low-Voltage WLAN Systems " solves the problems, such as to establish by the way of directly rough, that is, is directed to different increasing
Benefit setting (i.e. different feedback resistance values), by switching the electric current for being respectively connected to corresponding circuit offer and flowing through feedback resistance
Changing unit avoids building for OTA in this way, the electric current that feedback network is extracted from OTA output end no longer switches with gain and changed
Vertical problem.Although this method solves the problems, such as to establish, but circuit structure is complicated, and the introducing of extra switch circuit leads to closed loop
The problems such as bandwidth becomes smaller (parasitic capacitance becomes larger), noise source increases.
Summary of the invention
The present invention provides a kind of operation transconductance amplifier that can be suitable for deep-submicron CMOS process, solves existing skill
In art the supply voltage of deep-submicron CMOS process be reduced to 1.2V and it is following when the distribution of operation transconductance amplifier voltage margin it is tight
The problem of opening.
In order to solve the above-mentioned technical problems, the present invention provides a kind of operation transconductance amplifiers, including have Differential Input
The basic structure of grade and common-source output further includes to provide the adaptive-biased of bias current to the differential input stage
Image current source circuit;The differential input stage includes PMOS tube P3, PMOS tube P4, NMOS tube N1 and NMOS tube N2;
PMOS tube P3 is connected with the source electrode of both PMOS tube P4;The grid of PMOS tube P3 and PMOS pipe P4 is separately connected difference
Divide input signal Vin-、Vin+;The drain electrode of PMOS tube P3 and PMOS pipe P4 connects with the drain electrode of NMOS tube N1 and NMOS tube N2 respectively
It connects;The drain electrode of NMOS pipe N1 is connect with its grid;The grid of NMOS tube N1 is connected with the grid of NMOS tube N2, NMOS tube N1 and
The source grounding of NMOS tube N2;
The adaptive-biased image current source circuit include PMOS tube P1, PMOS tube P2, NMOS tube N3, NMOS tube N4,
Bias constant current source I1 and biasing constant current source I2;
The source electrode of PMOS tube P1 and PMOS tube P2 are all connected with supply voltage VDD, the grid connection of the two;The leakage of PMOS tube P1
The source electrode of pole connection PMOS tube P3 and PMOS tube P4;The input terminal for biasing constant current source I2 connects supply voltage VDD, output
The drain electrode of the grid and NMOS tube N4 of both end connection PMOS tube P1, PMOS tube P2;The grid of NMOS pipe N4 connects PMOS tube P1
Drain electrode;The drain and gate of NMOS tube N3 is connected, the drain electrode of the drain electrode connection PMOS tube P2 of NMOS tube N3;The source of NMOS tube N3
Pole is connected with the source electrode of NMOS tube N4 and connects the input terminal of biasing constant current source I1, biases the output of constant current source I1
End ground connection.
It further comprise that the PMOS tube P1 and PMOS pipe P2 are mutually matched in a preferred embodiment of the present invention, PMOS
The size of pipe P1 and PMOS tube P2 ratio are K:1;The NMOS tube N3 and NMOS tube N4 are mutually matched, NMOS tube N3 and NMOS tube
The difference of bias current of the size of N4 than being equal to biasing constant current source I1 and I2 and the bias current for biasing constant current source I2
Ratio.
In a preferred embodiment of the present invention, further comprise the PMOS tube P4 drain electrode and NMOS tube N2 drain electrode it is equal
Connect the grid of NMOS tube N5, the source electrode ground connection of NMOS tube N5, the output end of drain electrode connection constant current source I3, constant current
The input terminal of source I3 connects supply voltage VDD;The output end V of the drain electrode connection operation transconductance amplifier of NMOS tube N5out。
In a preferred embodiment of the present invention, further comprise the supply voltage VDD be deep-submicron CMOS process
Supply voltage.
Beneficial effects of the present invention: (nominal supply voltage is 1~1.2V), the present invention under deep-submicron CMOS process
The input offset voltage of operation transconductance amplifier still is able to be arranged to the value equal with output common mode voltage VOCM, i.e. power supply electricity
The half of pressure remains to maintain constant current, thus operation transconductance of the invention although the pressure drop very little of tail current source at this time
Amplifier still can obtain higher common-mode rejection ratio.Reverse phase proportional amplifier based on operation transconductance amplifier of the invention
Not only evade the problem of foundation while maintaining the maximum input and output amplitude of oscillation, and no longer needs additional input common-mode feedback
Circuit.Compared with traditional structure, additional increased NMOS tube and biasing constant current source only contribute altogether operation transconductance amplifier
Mode noise, will not bring closed-loop bandwidth reduce, noise penalty the problems such as.
Detailed description of the invention
Fig. 1 is the circuit diagram for the reverse phase proportional amplifier built based on operation transconductance amplifier in the prior art;
Fig. 2 is improved in the prior art to adapt to the circuit diagram of the reverse phase proportional amplifier of low supply voltage;
Fig. 3 is the circuit diagram of operation transconductance amplifier in the preferred embodiment of the present invention;
Fig. 4 is the operation transconductance amplifier and biography of the invention designed in the case where supply voltage is the 90nm CMOS technology of 1V
The common-mode rejection ratio performance comparative graph of system structure arithmetic trsanscondutance amplifier.
Specific embodiment
The present invention will be further explained below with reference to the attached drawings and specific examples, so that those skilled in the art can be with
It more fully understands the present invention and can be practiced, but illustrated embodiment is not as a limitation of the invention.
Embodiment
Term is explained:
(1) OTA: operation transconductance amplifier, the amplifier with differential input end and high transconductance gain have high input electricity
Resistance and high output resistance, but still be able to realize low output resistance in feedback arrangement.Due to high power consumption efficiency, good common mode
Inhibit than the advantages that, OTA is widely applied in the integrated circuit for directly driving parasitic capacitance.
(2) common-mode rejection ratio: it is defined as the ratio of difference mode gain and common-mode gain.The input stage of OTA is that source electrode coupling is poor
Point pair, the gain of common source configuration is equal to the gain of difference component, but to the gain very little of common mode amount, therefore common-mode rejection ratio is very
It is high.But when voltage margin not enough causes the output impedance of tail current source to decline, the common-mode rejection ratio of OTA will it is significant under
Drop.
Referring to shown in Fig. 3, the present invention discloses a kind of operation transconductance amplifier, including exports with differential input stage and common source
The basic structure of grade, and to provide the adaptive-biased image current source circuit of bias current to the differential input stage.
As shown in figure 3, above-mentioned differential input stage includes PMOS tube P3, PMOS tube P4, NMOS tube N1 and NMOS tube N2;
PMOS tube P3 is connected with the source electrode of both PMOS tube P4;The grid of PMOS tube P3 and PMOS pipe P4 is separately connected difference
Divide input signal Vin-、Vin+;The drain electrode of PMOS tube P3 and PMOS pipe P4 connects with the drain electrode of NMOS tube N1 and NMOS tube N2 respectively
It connects;The drain electrode of NMOS pipe N1 is connect with its grid;The grid of NMOS tube N1 is connected with the grid of NMOS tube N2, NMOS tube N1 and
The source grounding of NMOS tube N2;
Above-mentioned adaptive-biased image current source circuit include PMOS tube P1, PMOS tube P2, NMOS tube N3, NMOS tube N4,
Bias constant current source I1 and biasing constant current source I2;
The source electrode of PMOS tube P1 and PMOS tube P2 are all connected with supply voltage VDD, the grid connection of the two;The leakage of PMOS tube P1
The source electrode of pole connection PMOS tube P3 and PMOS tube P4;The input terminal for biasing constant current source I2 connects supply voltage VDD, output
The drain electrode of the grid and NMOS tube N4 of both end connection PMOS tube P1, PMOS tube P2;The grid of NMOS pipe N4 connects PMOS tube P1
Drain electrode;The drain and gate of NMOS tube N3 is connected, the drain electrode of the drain electrode connection PMOS tube P2 of NMOS tube N3;The source of NMOS tube N3
Pole is connected with the source electrode of NMOS tube N4 and connects the input terminal of biasing constant current source I1, biases the output of constant current source I1
End ground connection.
The drain electrode of above-mentioned PMOS tube P4 and the drain electrode of NMOS tube N2 are all connected with the grid of NMOS tube N5, the source electrode of NMOS tube N5
Ground connection, the output end of drain electrode connection constant current source I3, the input terminal of constant current source I3 connect supply voltage VDD;NMOS
The output end V of the drain electrode connection operation transconductance amplifier of pipe N5out。
Above-mentioned PMOS tube P1 and PMOS tube P2 are mutually matched, and the size ratio of PMOS tube P1 and PMOS pipe P2 is K:1;PMOS
The drain current I of pipe P1out=K (I1-I2), I1For the current value for biasing constant current source I1, I2To bias constant current source I2
Current value.Above-mentioned NMOS tube N3 and NMOS tube N4 are mutually matched, and the size ratio of NMOS tube N3 and NMOS tube N4 are equal to biasing
The ratio of the bias current of the difference and biasing constant current source I2 of the bias current of constant current source I1 and I2.
Above-mentioned supply voltage VDD is the supply voltage of deep-submicron CMOS process.
The operation transconductance amplifier of the above structure is increased and is mutually matched compared with the conventional operation trsanscondutance amplifier
NOMS pipe N3 and NOMS pipe N4, and it is additional bias constant current source I2 all the way, can be with when being applied to reversed feedback amplifier design
It sets input offset voltage to the half of supply voltage, that is, is equal to output common mode voltage, the output voltage swing allowed at this time
Maximum establishes problem there is no gain switching;Simultaneously as NOMS pipe N3 and NOMS the pipe N4 being mutually matched, and biasing
The introducing of constant current source I2, the PMOS pipe P1 as tail current source still are able to maintain stable electric current when compared with low pressure drop,
That is the excellent common mode rejection performance of differential configuration is retained, its working principle is that:
The drain electrode of PMOS tube P1 and the grid of NMOS tube N4 are connected together, and enable to the drain voltage of PMOS tube P1 certainly
Dynamic stability, this is because PMOS tube P1 and NMOS pipe N4 constitutes feedback loop, it may be assumed that as long as the drain voltage of PMOS tube P1
It changes, due to biasing the effect of constant current source I2, the drain voltage of NMOS tube N4 can be presented opposite variation, and because
The drain electrode of the NMOS tube N4 and grid of PMOS tube P1 is connected together namely the drain electrode of the grid voltage of PMOS tube P1 and PMOS tube P1
Voltage is in opposite variation, forms negative-feedback, ensure that stable output electric current, inputs model in larger common mode to ensure that
It encloses interior PMOS tube P3 and PMOS tube P4 always works at saturation state, ensure that the operation under the even lower supply voltage of 1.2V
Trsanscondutance amplifier can work normally, and still have preferable common mode rejection performance.
More than, operation transconductance amplifier of the invention has following technical advantage:
(1) pressure drop needed for the input stage tail current source of operation transconductance amplifier proposed by the invention greatly reduces, therefore
When supply voltage is lower, the selection of OTA input terminal bias voltage is more free, can choose the value equal to output common mode voltage.
In this way, gain does not establish problem when switching, (OTA input terminal bias voltage is equal with output common mode voltage value, on feedback network
There is no quiescent current), meanwhile, it still is able to obtain higher common-mode rejection ratio.Present invention is particularly suitable for advanced deep sub-micros
Reversed feedback amplifier/filter circuit design under rice CMOS technology, because its supply voltage generally only has 1V or so, this feelings
According to traditional structure under condition, problem or introducing complicated circuit are established in order to obtain big as far as possible output voltage swing or introducing
It goes to overcome the problems, such as to establish;The negative effects such as complicated circuit can bring noise source to increase again, loop bandwidth reduces.
(2) additional device needed for the present invention is less and not in the feedback loop, is not influencing loop bandwidth and output
Problem of establishing when having evaded gain switching while the amplitude of oscillation (generally realized by changing feedback resistance, if changed by gain switching
Become input resistance, this means that front stage circuits are caused with the load effect of variation).OTA is that Analog Circuit Design is most widely used
Basic unit, therefore the present invention be conducive to push Advanced CMOS Process under simulation Integration System Design, and then promote it is advanced
The realization of system on chip under CMOS technology.
Fig. 4 is the present invention compared with the common-mode rejection ratio performance of the operation transconductance amplifier of traditional structure, is emulated in 90nm
It is carried out under CMOS technology and 1V operating voltage, input offset voltage is set as 500mV (half supply voltage is also equal to export at this time
Common-mode voltage, output voltage swing is maximum at this time).
The present invention has in the deep-submicron CMOS process of low supply voltage compared with conventional operational amplifiers as seen from Figure 4
There is greater advantage, there is better common-mode rejection ratio.Certainly, traditional structure can also obtain 80dB's or more under more high power supply voltage
Common-mode rejection ratio, but the present invention not only obtains the common-mode rejection ratio higher than 90dB under 1V supply voltage, also from structure
Problem is established when having evaded gain switching.
In addition, operation transconductance amplifier of the invention is applied in fully differential structure, the output end V of operation transconductance amplifierout
As in-phase output end, the drain electrode of NMOS tube N1 does not reconnect its grid, and connects another common source amplifying stage, the amplification of this common source
Reversed-phase output of the output end of grade as fully differential structure, the grid of NMOS tube N1 and the grid of NMOS tube N2 are by output common mode
Feed circuit control.Fully differential structure of the invention has beneficial effect same as described above.
Embodiment described above is only to absolutely prove preferred embodiment that is of the invention and being lifted, protection model of the invention
It encloses without being limited thereto.Those skilled in the art's made equivalent substitute or transformation on the basis of the present invention, in the present invention
Protection scope within.Protection scope of the present invention is subject to claims.
Claims (4)
1. a kind of operation transconductance amplifier, the basic structure including having differential input stage and common-source output, it is characterised in that:
It further includes to provide the adaptive-biased image current source circuit of bias current to the differential input stage;
The differential input stage includes PMOS tube P3, PMOS tube P4, NMOS tube N1 and NMOS tube N2;
PMOS tube P3 is connected with the source electrode of both PMOS tube P4;The grid of PMOS tube P3 and PMOS tube P4 are separately connected Differential Input
Signal Vin-、Vin+;The drain electrode of PMOS tube P3 and PMOS tube P4 is connect with the drain electrode of NMOS tube N1 and NMOS tube N2 respectively;NMOS tube
The drain electrode of N1 is connect with its grid;The grid of NMOS tube N1 is connected with the grid of NMOS tube N2, NMOS tube N1 and NMOS tube N2's
Source grounding;
The adaptive-biased image current source circuit includes PMOS tube P1, PMOS tube P2, NMOS tube N3, NMOS tube N4, biasing
Constant current source I1 and biasing constant current source I2;
The source electrode of PMOS tube P1 and PMOS tube P2 are all connected with supply voltage VDD, the grid connection of the two;The drain electrode of PMOS tube P1 connects
Connect the source electrode of PMOS tube P3 and PMOS tube P4;The input terminal for biasing constant current source I2 connects supply voltage VDD, and output end connects
Connect the drain electrode of the grid and NMOS tube N4 of both PMOS tube P1, PMOS tube P2;The leakage of the grid connection PMOS tube P1 of NMOS tube N4
Pole;The drain and gate of NMOS tube N3 is connected, the drain electrode of the drain electrode connection PMOS tube P2 of NMOS tube N3;The source electrode of NMOS tube N3 and
The source electrode of NMOS tube N4 is connected and the input terminal of connection biasing constant current source I1, the output termination of biasing constant current source I1
Ground.
2. operation transconductance amplifier as described in claim 1, it is characterised in that: the PMOS tube P1 and PMOS tube P2 mutual
Match, the size ratio of PMOS tube P1 and PMOS tube P2 are K:1;The NMOS tube N3 and NMOS tube N4 are mutually matched, NMOS tube N3 and
The size of NMOS tube N4 is than the difference equal to the bias current for biasing constant current source I1 and I2 and biases the inclined of constant current source I2
Set the ratio of electric current.
3. operation transconductance amplifier as described in claim 1, it is characterised in that: the drain electrode of the PMOS tube P4 and NMOS tube N2
Drain electrode be all connected with the grid of NMOS tube N5, the source electrode ground connection of NMOS tube N5, the output end of drain electrode connection constant current source I3,
The input terminal of constant current source I3 connects supply voltage VDD;The output end of the drain electrode connection operation transconductance amplifier of NMOS tube N5
Vout。
4. operation transconductance amplifier as described in claim 1, it is characterised in that: the supply voltage VDD is deep-submicron
The supply voltage of CMOS technology.
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CN201920155437.0U CN209345112U (en) | 2019-01-29 | 2019-01-29 | Operation transconductance amplifier |
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CN201920155437.0U CN209345112U (en) | 2019-01-29 | 2019-01-29 | Operation transconductance amplifier |
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Cited By (1)
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CN109546975A (en) * | 2019-01-29 | 2019-03-29 | 苏州大学 | Operation transconductance amplifier |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109546975A (en) * | 2019-01-29 | 2019-03-29 | 苏州大学 | Operation transconductance amplifier |
CN109546975B (en) * | 2019-01-29 | 2023-09-29 | 苏州大学 | operational transconductance amplifier |
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