CN109887843A - 采用非选择性外延的自对准锗硅hbt器件的制造方法 - Google Patents

采用非选择性外延的自对准锗硅hbt器件的制造方法 Download PDF

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CN109887843A
CN109887843A CN201910098259.7A CN201910098259A CN109887843A CN 109887843 A CN109887843 A CN 109887843A CN 201910098259 A CN201910098259 A CN 201910098259A CN 109887843 A CN109887843 A CN 109887843A
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polysilicon
angstroms
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silicon oxide
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CN109887843B (zh
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周正良
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

本发明公开了一种采用非选择性外延的自对准锗硅HBT器件的制造方法，其中低温锗硅选择性外延，可以在很大的范围内形成所需的锗浓度，掺杂硼百分比和碳浓度，而选择性外延，由于不同的掺杂比会影响外延生长的选择性，这样在器件研发时多次实验才能得到所需的杂质分布，对研发进度造成压力。同时，本发明的方法在外基区采用选择性外延，淀积层可以是单晶或多晶，工艺复杂度较低，器件性能优越。

Description

采用非选择性外延的自对准锗硅HBT器件的制造方法
技术领域
本发明涉及半导体集成电路领域，特别是一种采用非选择性外延的自对准锗硅HBT器件的制造方法。
背景技术
采用P型多晶硅抬高外基区，发射极和外基区之间采用内侧墙的自对准器件结构，可以同时降低基极电阻和基极-集电极电容，这样的锗硅异质结双极型三极管(HBT)器件可以得到大于300GHz的最高振荡频率fmax，其性能可以和III-V器件相当，被广泛用于光通信和毫米波应用。
SiGe HBT器件采用较小能带宽度的掺有杂质硼的锗硅碳合金为基极，由于发射极和基极有能带差，可以在保证同样的直流电流放大倍数HFE时采用较高的基区掺杂，从而得到较高的fmax。
基极电阻包括外基区电阻和本征基区电阻(发射极下的电阻)，是提升fmax的重要的参数，要降低基极电阻，要尽可能提高基区的掺杂浓度，及降低发射极窗口和侧墙的宽度。
锗硅HBT的截止频率fT和最高振荡频率由以下公式表征：
现有技术都用选择性外延来形成自对准的锗硅HBT器件，结合图1-3所示，工艺流程如下：在形成集电极后，淀积SiO2(二氧化硅)/poly(重掺硼多晶硅)/SiO2/SiN(氮化硅)/SiO2叠层，然后打开发射极窗口，干法刻蚀停在底层SiO2上，如图1所示。
湿法刻蚀和清洗后，选择性外延(只在有源区和多晶硅区)生长锗硅，然后淀积介质和反刻形成内侧墙，如图2所示。
湿法刻蚀和清洗后，淀积重掺砷多晶硅，然后刻蚀发射极和基极多晶硅形成发射极和基极，如图3所示。
这一工艺方法需要做选择性锗硅外延，集成方案较简单，但在器件横向尺寸逐步降低的情况下，要得到无缺陷的锗硅外延层有挑战。
发明内容
本申请所要解决的技术问题是，提供一种采用非选择性外延的自对准锗硅HBT器件的工艺方法，能够在器件横向尺寸逐步降低的情况下，得到无缺陷的锗硅外延层。
为了解决上述技术问题，本发明公开了一种采用非选择性外延的自对准锗硅HBT器件的制造方法，包括以下步骤：
步骤一，光刻和刻蚀形成锗硅外延窗口，用低温非选择性外延形成锗硅层，然后淀积氧化硅-多晶硅-氧化硅叠层；
步骤二，用牺牲发射极窗口光刻和干法刻蚀，停在锗硅外延层上，窗口只打开外基区；
步骤三，淀积多晶硅并覆盖整个芯片表面和侧面，再淀积平坦化的有机介质，之后回刻有机介质和多晶硅；
步骤四，淀积氧化硅，并淀积平坦化的有机介质，之后回刻有机介质和氧化硅；
步骤五，刻蚀多晶硅，将外基区以外的多晶硅去除；
步骤六，淀积氧化硅并回刻形成内侧墙；
步骤七，湿法刻蚀和清洗后，淀积重掺砷多晶硅然后刻蚀多晶硅形成发射极；
步骤八，光刻和干法刻蚀基极多晶硅，然后淀积氧化硅并回刻形成发射极多晶硅侧墙。
较佳地，步骤一中，氧化硅-多晶硅-氧化硅叠层的厚度分别为：200埃、2000埃和500～800埃。
较佳地，所述步骤三中，淀积多晶硅的厚度为500埃。
较佳地，所述步骤三中，回刻有机介质和多晶硅，直到多晶硅的高度比牺牲发射极窗口多晶硅低1000埃以上。
较佳地，所述步骤四中，第一次淀积氧化硅厚度为500埃以上，有机介质厚度在2000埃。
较佳地，所述步骤四中，回刻时去除有机介质和氧化硅，露出多晶硅表面。
较佳地，所述步骤五中，干法刻蚀去除多晶硅，并停在氧化硅上。
较佳地，步骤六中淀积氧化硅的厚度为500埃。
较佳地，步骤六中淀积重掺砷多晶硅的厚度为800～1200埃。
本发明采用非选择性的低温锗硅外延生长，在形成牺牲发射极窗口后淀积多晶硅，经过多次介质层淀积和回刻，形成抬高的外基区多晶硅侧墙，最终形成发射极多晶硅和基区多晶硅由侧墙隔离的自对准器件；和现有技术相比，用普通炉管多晶硅代替选择性生长的外基区多晶硅，这样就省去了使用选择性外延这步相对芯片制造厂较特殊的工艺，更适合量产。
附图说明
图1-3是现有技术形成非选择性锗硅外延的自对准HBT的主要步骤示意图。
图4是本发明的方法中淀积氧化硅-多晶硅-氧化硅叠层示意图。
图5是本发明的方法中牺牲发射极窗口光刻和干法刻蚀后的器件示意图。
图6-7是本发明的方法中淀积多晶硅再淀积平坦化的有机介质，之后回刻有机介质和多晶硅后的器件示意图。
图8-10是本发明的方法中淀积氧化硅并淀积平坦化的有机介质，之后回刻有机介质、氧化硅和多晶硅后的器件示意图。
图11是本发明方法中淀积氧化硅并回刻形成内侧墙后的器件示意图。
图12是本发明方法中淀积重掺砷多晶硅然后刻蚀多晶硅形成发射极后的器件示意图。
图13是使用本发明的方法最终完成的HBT器件示意图。
附图标记说明
1 氧化硅-多晶硅-氧化硅叠层 2 多晶硅
3 平坦化有机介质 4 氧化硅
5 内侧墙
具体实施方式
下文公开了本发明的具体实施例；但是，应该理解的是，公开的实施例仅为本发明的示例，它们可以采用各种形式实施。因此，在此所公开的具体结构和功能细节不应解释为具有限制性。进一步地，本文中使用的名词和术语不是限制性的；而是提供对本发明的可理解描述。通过结合附图来考虑以下描述将能更好地理解本发明，其中相同参考数字代表相同的含义。这些附图不是按比例绘制。
本发明的采用非选择性外延的自对准锗硅HBT器件的制造方法一较佳实施例的步骤如下：
步骤一，如图4所示，光刻和刻蚀形成锗硅外延窗口，用低温非选择性外延形成锗硅层，然后淀积氧化硅-多晶硅-氧化硅叠层；本实施例中，氧化硅-多晶硅-氧化硅叠层1的厚度分别为：200埃、2000埃和500～800埃。
步骤二，如图5所示，用牺牲发射极窗口光刻和干法刻蚀，停在锗硅外延层上，窗口只打开外基区。
步骤三，如图6-图7所示，淀积多晶硅2并覆盖整个芯片表面和侧面，再淀积平坦化的有机介质3，之后回刻有机介质和多晶硅；本实施例中，淀积多晶硅2的厚度为500埃，回刻有机介质3和多晶硅2直到多晶硅的高度比牺牲发射极窗口多晶硅低1000埃以上。
步骤四，淀积氧化硅4，并淀积平坦化的有机介质3，之后回刻有机介质3和氧化硅4，以及多晶硅，如图8-图10所示。
图8-图9所示，先淀积一层氧化硅，厚度在500～1000埃，用于后续器件发射极和基极之间的隔离；再淀积一层厚度在2000埃左右的平坦化的有机介质；之后回刻有机介质和氧化硅，有机介质需要用干法刻蚀，氧化硅则可以用干法刻蚀，或者用干法和湿法结合的刻蚀，将多晶硅顶上的氧化硅刻蚀掉。
步骤五，如图10所示，用干法刻蚀将多晶硅去除，停在叠层底部的氧化硅上。
步骤六，如图11所示，淀积氧化硅4并回刻形成内侧墙5；本实施例中，淀积氧化硅的厚度为500埃。
步骤七，湿法刻蚀和清洗后，淀积重掺砷多晶硅然后刻蚀多晶硅形成发射极，如图12所示；本实施例中，淀积重掺砷多晶硅为800埃～1200埃。
步骤八，光刻和干法刻蚀基极多晶硅，然后淀积氧化硅并回刻形成发射极多晶硅侧墙，如图13所示。
本发明的方法可很简单地和现有的CMOS工艺集成，并且所用的单项工艺都是半导体制造厂成熟工艺，如非选择性锗硅低温外延，有机介质淀积和回刻等，很容易形成适合大规模量产的工艺流程。其中低温锗硅选择性外延，可以在很大的范围内形成所需的锗浓度，掺杂硼百分比和碳浓度，而选择性外延，由于不同的掺杂比会影响外延生长的选择性，这样在器件研发时多次实验才能得到所需的杂质分布，对研发进度造成压力。同时，本发明的方法在外基区采用选择性外延，淀积层可以是单晶或多晶，工艺复杂度较低，器件性能优越。
此外，需要说明的是，除非特别说明或者指出，否则说明书中的术语“第一”、“第二”、“第三”等描述仅仅用于区分说明书中的各个组件、元素、步骤等，而不是用于表示各个组件、元素、步骤之间的逻辑关系或者顺序关系等。
以上通过具体实施方式和实施例对本发明进行了详细的说明，但这些并非构成对本发明的限制。在不脱离本发明原理的情况下，本领域的技术人员还可做出许多变形和改进，这些也应视为本发明的保护范围。

Claims (9)

1.一种采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，包括以下步骤：
步骤一，在形成集电极后，光刻和刻蚀形成锗硅外延窗口，用低温非选择性外延形成锗硅层，然后淀积氧化硅-多晶硅-氧化硅叠层；
步骤二，用牺牲发射极窗口光刻和干法刻蚀，停在锗硅外延层上，窗口只打开外基区；
步骤三，淀积多晶硅并覆盖整个芯片表面和侧面，再淀积平坦化的有机介质，之后回刻有机介质和多晶硅；
步骤四，淀积氧化硅，并淀积平坦化的有机介质，之后回刻有机介质和氧化硅；
步骤五，刻蚀多晶硅，将外基区以外的多晶硅去除；
步骤六，淀积氧化硅并回刻形成内侧墙；
步骤七，湿法刻蚀和清洗后，淀积重掺砷多晶硅然后刻蚀多晶硅形成发射极；
步骤八，光刻和干法刻蚀基极多晶硅，然后淀积氧化硅并回刻形成发射极多晶硅侧墙。
2.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，步骤一中，氧化硅-多晶硅-氧化硅叠层的厚度分别为：200埃、2000埃和500～800埃。
3.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，所述步骤三中，淀积多晶硅的厚度为500埃。
4.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，所述步骤三中，回刻有机介质和多晶硅，直到多晶硅的高度比牺牲发射极窗口多晶硅低1000埃以上。
5.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，所述步骤四中，淀积氧化硅厚度为500埃以上，有机介质厚度在2000埃。
6.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，所述步骤四中，回刻时去除有机介质和氧化硅，露出多晶硅表面。
7.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，所述步骤五中，干法刻蚀去除多晶硅，并停在氧化硅上。
8.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，步骤六中淀积氧化硅的厚度为500埃。
9.如权利要求1所述的采用非选择性外延的自对准锗硅HBT器件的制造方法，其特征在于，步骤七中淀积重掺砷多晶硅的厚度为800～1200埃。
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