CN109860209A - The production method and TFT substrate of TFT substrate - Google Patents
The production method and TFT substrate of TFT substrate Download PDFInfo
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- CN109860209A CN109860209A CN201910153583.4A CN201910153583A CN109860209A CN 109860209 A CN109860209 A CN 109860209A CN 201910153583 A CN201910153583 A CN 201910153583A CN 109860209 A CN109860209 A CN 109860209A
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- 239000000758 substrate Substances 0.000 title claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000004065 semiconductor Substances 0.000 claims abstract description 50
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 49
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 46
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 26
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 21
- 239000011737 fluorine Substances 0.000 claims abstract description 21
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 21
- 230000008021 deposition Effects 0.000 claims abstract description 14
- 238000012545 processing Methods 0.000 claims abstract description 10
- 239000010949 copper Substances 0.000 claims description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 16
- 229910052802 copper Inorganic materials 0.000 claims description 16
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 13
- 239000002131 composite material Substances 0.000 claims description 12
- 238000002161 passivation Methods 0.000 claims description 12
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 8
- 239000011733 molybdenum Substances 0.000 claims description 8
- 229910052750 molybdenum Inorganic materials 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 7
- 229910052733 gallium Inorganic materials 0.000 claims description 7
- 229910052738 indium Inorganic materials 0.000 claims description 7
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 7
- 239000011787 zinc oxide Substances 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 3
- 230000002708 enhancing effect Effects 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 1
- 238000005137 deposition process Methods 0.000 claims 1
- 230000005611 electricity Effects 0.000 claims 1
- 239000001257 hydrogen Substances 0.000 abstract description 17
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 17
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 16
- 229910044991 metal oxide Inorganic materials 0.000 abstract description 12
- 150000004706 metal oxides Chemical class 0.000 abstract description 12
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 11
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 8
- 238000009792 diffusion process Methods 0.000 abstract description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 abstract description 7
- 239000012212 insulator Substances 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 245
- 239000010408 film Substances 0.000 description 58
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- 125000004429 atom Chemical group 0.000 description 7
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- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
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- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910002804 graphite Inorganic materials 0.000 description 3
- 239000010439 graphite Substances 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 239000004575 stone Substances 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- 229920001621 AMOLED Polymers 0.000 description 2
- 229910003978 SiClx Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
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- 229910021645 metal ion Inorganic materials 0.000 description 2
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- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
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- 238000013461 design Methods 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
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- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- 230000035945 sensitivity Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The present invention provides the production method and TFT substrate of a kind of TFT substrate.The production method of TFT substrate of the invention, deposition forms graphene film layer first on gate electrode layer, Fluorin doped processing is carried out to graphene film layer whole face again, increase its band gap width, graphene film layer is set to become insulator, make it as gate blocks layer, to prevent the diffusion of metallic atom in gate electrode layer, then in gate blocks layer disposed thereon silicon oxide layer as gate insulating layer;By making the graphene film layer of fluorine doped on gate electrode layer as gate blocks layer, silicon oxide layer can directly be used alone as gate insulating layer, it avoids in gate insulating layer using the silicon nitride layer that hydrogen content is high, reduce interference of the hydrogen to oxide semiconductor layer, it in turn avoids oxide semiconductor layer simultaneously and the graphene film layer of fluorine doped directly contacts, interference of the fluorine ion to oxide semiconductor layer is prevented, to improve the device property of metal oxide TFT.
Description
Technical field
The present invention relates to field of display technology more particularly to the production methods and TFT substrate of a kind of TFT substrate.
Background technique
Thin film transistor (TFT) (Thin Film Transistor, TFT) is current liquid crystal display device (Liquid Crystal
Display, LCD) and active matrix drive type organic electroluminescence display device and method of manufacturing same (Active Matrix Organic Light-
Emitting Diode, abbreviation AMOLED) in main driving element, be directly related to the development of high performance flat display device
Direction.
Thin film transistor (TFT) have various structures, prepare the thin film transistor active layer of corresponding construction material also have it is more
Kind, wherein metal oxide thin-film transistor (metal oxide TFT) has field-effect mobility height (>=10cm2/V·
S), the features such as preparation process is simple, extensive deposition uniformity is good, transmitance is high in fast response time and visible-range, quilt
It is considered the most potential backplane technology that display develops towards large scale and flexibility direction.
With the development of flat panel display, people get over the pursuit of display sizes, resolution ratio and picture refresh rate
Come it is higher, therefore in the industry using copper (Cu) replace aluminium (Al) as the conductive metallic material in TFT device.
In the manufacture craft of existing array substrate, usually pass through plasma enhanced chemical vapor deposition after grid is formed
Method (Plasma Enhanced Chemical Vapor Deposition, PECVD) deposits gate insulator (GI) layer, due to
PECVD technique is a kind of high temperature coating technique, for the metal ion easily spread, it is easy to diffuse to and face in PECVD processing procedure
Close dielectric layer, to influence device property;And PECVD board belongs to environmental sensitivity board, if metal ion diffuses to machine
In platform reaction chamber (chamber), the quality of depositional coating can also be had an impact.
Cu is easy to produce oxidation and diffusion problem in high temperature and plasma ambient, therefore Cu film cannot be straight in high temperature process
It connects and silica (SiO2) film layer contact.In existing metal oxide TFT processing procedure, silicon nitride (SiNx) isolation Cu is generallyd use
Film, then in SiNx disposed thereon SiO2, SiNx film and SiO2Film is collectively formed GI layers, but hydrogen (H) content inside SiNx is higher,
It is easy to pass through SiO2Layer diffuses to oxide semiconductor layer, influences device electric, and then largely effect on the display effect of display.
Graphene is as the nano material most thin, most hard in the world being currently known, because it is with good conductive tune
Control property, mechanical property, thermal conduction characteristic, become current one of research hotspot.According to reports, the stone produced using roll-to-roll mode
Black alkene film has extremely low square resistance (< 100 Ω/-1), however after overdoping, and the two of broadband system can be formed
Tie up insulating materials;Secondly, single-layer graphene blocks effect with good to water/oxygen, the oxidation of metal can be effectively prevented.
At this stage as directly used fluorinated graphene as gate insulating layer and passivation layer, although block and compactness foot
It is enough, but when graphene progress fluorine (F) processing, F ion will affect oxide semiconductor layer, and device is caused to deteriorate;And fluorographite
The dielectric constant of alkene may not be able to be used as gate insulating layer, and graphene film layer is relatively thin, when as gate insulating layer, capacitance pole
Greatly, it is easy to cause the generation of short-circuit (short) phenomenon.
Summary of the invention
The purpose of the present invention is to provide a kind of production methods of TFT substrate, and the graphite of fluorine doped is made on gate electrode layer
Alkene film layer can prevent the diffusion of metallic atom in gate electrode layer as gate blocks layer, effectively promote metal oxide TFT's
Device property.
The object of the invention is also to provide a kind of TFT substrate, gate electrode layer is equipped with the graphene film layer conduct of fluorine doped
Gate blocks layer can prevent the diffusion of metallic atom in gate electrode layer, effectively promote the device property of metal oxide TFT.
To achieve the above object, the present invention provides a kind of production method of TFT substrate, comprising the following steps:
Step S1, a underlay substrate is provided, forms gate electrode layer on the underlay substrate;
Step S2, on the underlay substrate and gate electrode layer, deposition forms a graphene film layer;
Step S3, Fluorin doped processing is carried out to the graphene film layer whole face, forms gate blocks layer;
Step S4, on the gate blocks layer, deposition forms gate insulating layer, and the material of the gate insulating layer is oxygen
SiClx;
Step S5, oxide semiconductor layer is formed on the gate insulating layer.
In the step S2, deposit to form the graphene film layer, the graphene using low temperature chemical vapor deposition method
Film layer with a thickness of
In the step S1, the upper surface of the gate electrode layer is layers of copper, and the gate electrode layer is copper film and molybdenum film is answered
Close layer, wherein the copper film is located at the upper layer of the composite layer;
In the step S4, using plasma enhancing chemical vapor deposition forms the gate insulating layer.
In the step S5, the material of the oxide semiconductor layer is indium gallium zinc oxide.
The step S5 further includes that the source of being formed is deposited and patterned on the oxide semiconductor layer and gate insulating layer
Drain electrode layer, deposition forms passivation layer on the source-drain electrode layer, oxide semiconductor layer and gate insulating layer, described blunt
Change and is deposited and patterned to form pixel electrode layer on layer.
The present invention also provides a kind of TFT substrates, comprising: underlay substrate, is set the gate electrode layer on the underlay substrate
In the gate blocks layer on the gate electrode layer and underlay substrate, the gate insulating layer on the gate blocks layer and it is set to
Oxide semiconductor layer on the gate insulating layer;
The material of the gate blocks layer is the graphene film of fluorine doped;
The material of the gate insulating layer is silica.
The gate blocks layer with a thickness of
The gate electrode layer is the composite layer of copper film and molybdenum film, wherein the copper film is located at the upper layer of the composite layer.
The material of the oxide semiconductor layer is indium gallium zinc oxide.
The TFT substrate further include set on the oxide semiconductor layer and source-drain electrode layer on gate insulating layer,
Passivation layer on the source-drain electrode layer, oxide semiconductor layer and gate insulating layer and the picture on the passivation layer
Plain electrode layer.
Beneficial effects of the present invention: the production method of TFT substrate of the invention, deposition forms stone first on gate electrode layer
Black alkene film layer, then Fluorin doped processing is carried out to graphene film layer whole face, increase its band gap width, graphene film layer is made to become to insulate
Body makes it as gate blocks layer, to prevent the diffusion of metallic atom in gate electrode layer, then in gate blocks layer disposed thereon oxygen
SiClx layer forms oxide semiconductor layer as gate insulating layer on gate insulating layer;It is mixed by being made on gate electrode layer
The graphene film layer of fluorine can directly be used alone silicon oxide layer as gate insulating layer, avoid as gate blocks layer
Using the silicon nitride layer that hydrogen content is high in gate insulating layer, reduce interference of the hydrogen to oxide semiconductor layer, while avoiding again
The graphene film layer of oxide semiconductor layer and fluorine doped directly contacts, and has prevented fluorine ion and does to oxide semiconductor layer
It disturbs, to improve the device property of metal oxide TFT.TFT substrate of the invention, gate electrode layer are equipped with the graphite of fluorine doped
Alkene film layer can directly be used alone silicon oxide layer as gate insulating layer, avoid in gate insulator as gate blocks layer
Using the silicon nitride layer that hydrogen content is high in layer, reduce interference of the hydrogen to oxide semiconductor layer, while in turn avoiding oxide
The graphene film layer of semiconductor layer and fluorine doped directly contacts, and has prevented interference of the fluorine ion to oxide semiconductor layer, to have
Effect improves the device property of metal oxide TFT.
For further understanding of the features and technical contents of the present invention, it please refers to below in connection with of the invention detailed
Illustrate and attached drawing, however, the drawings only provide reference and explanation, is not intended to limit the present invention.
Detailed description of the invention
With reference to the accompanying drawing, by the way that detailed description of specific embodiments of the present invention, technical solution of the present invention will be made
And other beneficial effects are apparent.
In attached drawing,
Fig. 1 is the flow diagram of the production method of TFT substrate of the present invention;
Fig. 2 is the schematic diagram of the step S1 of the production method of TFT substrate of the present invention;
Fig. 3 is the schematic diagram of the step S2 of the production method of TFT substrate of the present invention;
Fig. 4 is the schematic diagram of the step S3 of the production method of TFT substrate of the present invention;
Fig. 5 is the schematic diagram of the step S4 of the production method of TFT substrate of the present invention;
Fig. 6 is that the schematic diagram of step S5 of the production method of TFT substrate of the present invention and the structure of TFT substrate of the invention are shown
It is intended to.
Specific embodiment
Further to illustrate technological means and its effect adopted by the present invention, below in conjunction with preferred implementation of the invention
Example and its attached drawing are described in detail.
Referring to Fig. 1, present invention firstly provides a kind of production methods of TFT substrate, comprising the following steps:
Step S1, it as shown in Fig. 2, providing a underlay substrate 10, is deposited and patterned to be formed on the underlay substrate 10
Gate electrode layer 20.
Specifically, in the step S1, the upper surface of the gate electrode layer 20 is layers of copper;Further, in the present embodiment
In, the gate electrode layer (20) is the composite layer of copper film and molybdenum (Mo) film, wherein the copper film is located at the upper of the composite layer
Layer, with a thickness ofThe molybdenum film is located at the lower layer of the composite layer, with a thickness of
Step S2, as shown in figure 3, deposition forms a graphene film layer on the underlay substrate 10 and gate electrode layer 20
30, the graphene film layer 30 has high conductivity, high transmittance, high barrier capability.
Specifically, in the step S2, using low temperature chemical vapor deposition method (Chemical Vapor Deposition,
CVD) deposition forms the graphene film layer 30, the graphene film layer 30 with a thickness of
Step S3, as shown in figure 4, carrying out Fluorin doped processing to 30 whole face of graphene film layer, gate blocks layer is formed
31, change its band gap width, graphene film layer is made to become insulator.
Specifically, in the step S3, the graphene film layer 30 becomes insulator after Fluorin doped is handled, but it is still
So there is high transmittance, height to block characteristic.
Step S4, as shown in figure 5, deposition forms gate insulating layer 40 on the gate blocks layer 31, the grid is exhausted
Edge layer 40 is silicon oxide layer, and material is silica.
Specifically, in the step S4, it is exhausted that using plasma enhancing chemical vapor deposition forms the grid
Edge layer 40.
Step S5, as shown in fig. 6, being deposited and patterned to form oxide semiconductor layer on the gate insulating layer 40
50, it is deposited and patterned to form source-drain electrode layer 60 on the oxide semiconductor layer 50 and gate insulating layer 40, described
Deposition forms passivation layer 70 on source-drain electrode layer 60, oxide semiconductor layer 50 and gate insulating layer 40, in the passivation layer 70
On be deposited and patterned to form pixel electrode layer 80.
Specifically, in the step S5, the material of the oxide semiconductor layer 50 is indium gallium zinc oxide (Indium
Gallium Zinc Oxide, IGZO).
The production method of TFT substrate of the invention, deposition forms graphene film layer 30 on gate electrode layer 20, then to graphite
30 whole face of alkene film layer carries out Fluorin doped processing, increases its band gap width, so that graphene film layer 30 is become insulator, make it as grid
Pole barrier layer 31, to prevent the metallic atom easily spread in gate electrode layer 20 from spreading, then above gate blocks layer 31 sink
Product silicon oxide layer forms oxide semiconductor layer 50 as gate insulating layer 40 on gate insulating layer 40;By in gate electrode
The graphene film layer of fluorine doped is made on layer 20 as gate blocks layer 31, and it is exhausted as grid silicon oxide layer can be directly used alone
Edge layer 40 avoids in gate insulating layer 40 using the silicon nitride layer that hydrogen content is high, reduces hydrogen to oxide semiconductor layer
50 interference, while the graphene film layer in turn avoiding oxide semiconductor layer 50 and fluorine doped directly contacts, and has prevented fluorine ion
Interference to oxide semiconductor layer 50, to improve the device property of metal oxide TFT.
Referring to Fig. 6, the production method based on above-mentioned TFT substrate, includes: lining the present invention also provides a kind of TFT substrate
Substrate 10, the gate electrode layer 20 on the underlay substrate 10, on the gate electrode layer 20 and underlay substrate 10
Gate blocks layer 31, the gate insulating layer 40 on the gate blocks layer 31, the oxygen on the gate insulating layer 40
Compound semiconductor layer 50, is set to institute at the source-drain electrode layer 60 on the oxide semiconductor layer 50 and gate insulating layer 40
It states the passivation layer 70 on source-drain electrode layer 60, oxide semiconductor layer 50 and gate insulating layer 40 and is set on the passivation layer 70
Pixel electrode layer 80.
Specifically, the material of the gate blocks layer 31 is the graphene film of fluorine doped, and the gate blocks layer 31 is fluorine doped
Graphene film layer, can prevent the metallic atom easily spread in gate electrode layer 20 occur diffusion and influence device property.
Specifically, it since the surface of gate electrode layer 20 is equipped with gate blocks layer 31, can prevent in gate electrode layer 20 easily
The metallic atom of diffusion is spread, so that the gate insulating layer 40 can be individual silicon oxide layer, avoids hydrogen content
The use of high silicon nitride layer reduces interference of the hydrogen to oxide semiconductor layer 50.
Specifically, the gate blocks layer 31 with a thickness of
Specifically, the upper surface of the gate electrode layer 20 is layers of copper;Further, in the present embodiment, the gate electrode
Layer 20 is the composite layer of copper film and molybdenum film, wherein the copper film is located at the upper layer of the composite layer, with a thickness ofThe molybdenum film is located at the lower layer of the composite layer, with a thickness of
Specifically, the material of the oxide semiconductor layer 50 is indium gallium zinc oxide.
TFT substrate of the invention, graphene film layer of the gate electrode layer 20 equipped with fluorine doped, can as gate blocks layer 31
Silicon oxide layer is directly used alone as gate insulating layer 40, avoids in gate insulating layer 40 using the nitridation that hydrogen content is high
Silicon layer reduces interference of the hydrogen to oxide semiconductor layer 50, while in turn avoiding the stone of oxide semiconductor layer 50 and fluorine doped
Black alkene film layer directly contacts, and has prevented interference of the fluorine ion to oxide semiconductor layer, to effectively improve metal oxide
The device property of TFT.
In conclusion the production method of TFT substrate of the invention, deposition forms graphene film first on gate electrode layer
Layer, then Fluorin doped processing is carried out to graphene film layer whole face, increase its band gap width, so that graphene film layer is become insulator, make
It is as gate blocks layer, to prevent the diffusion of metallic atom in gate electrode layer, then in gate blocks layer disposed thereon silica
Layer is used as gate insulating layer, and oxide semiconductor layer is formed on gate insulating layer;By making fluorine doped on gate electrode layer
Graphene film layer can directly be used alone silicon oxide layer as gate insulating layer, avoid in grid as gate blocks layer
Using the silicon nitride layer that hydrogen content is high in insulating layer, interference of the hydrogen to oxide semiconductor layer is reduced, while in turn avoiding aoxidizing
The graphene film layer of object semiconductor layer and fluorine doped directly contacts, and has prevented interference of the fluorine ion to oxide semiconductor layer, thus
Improve the device property of metal oxide TFT.TFT substrate of the invention, gate electrode layer are equipped with the graphene film layer of fluorine doped
As gate blocks layer, silicon oxide layer can directly be used alone as gate insulating layer, avoiding makes in gate insulating layer
With the high silicon nitride layer of hydrogen content, reduce interference of the hydrogen to oxide semiconductor layer, while in turn avoiding oxide semiconductor
The graphene film layer of layer and fluorine doped directly contacts, and has prevented interference of the fluorine ion to oxide semiconductor layer, to effectively be promoted
The device property of metal oxide TFT.
The above for those of ordinary skill in the art can according to the technique and scheme of the present invention and technology
Other various corresponding changes and modifications are made in design, and all these change and modification all should belong to the claims in the present invention
Protection scope.
Claims (10)
1. a kind of production method of TFT substrate, which comprises the following steps:
Step S1, a underlay substrate (10) are provided, forms gate electrode layer (20) on the underlay substrate (10);
Step S2, on the underlay substrate (10) and gate electrode layer (20), deposition forms a graphene film layer (30);
Step S3, Fluorin doped processing is carried out to graphene film layer (30) whole face, is formed gate blocks layer (31);
Step S4, it deposits and is formed gate insulating layer (40) on the gate blocks layer (31), the gate insulating layer (40)
Material is silica;
Step S5, it is formed on the gate insulating layer (40) oxide semiconductor layer (50).
2. the production method of TFT substrate as described in claim 1, which is characterized in that in the step S2, using cryochemistry
Vapour deposition process deposits to form the graphene film layer (30), the graphene film layer (30) with a thickness of
3. the production method of TFT substrate as described in claim 1, which is characterized in that in the step S1, the gate electrode layer
It (20) is the composite layer of copper film and molybdenum film, wherein the copper film is located at the upper layer of the composite layer;
In the step S4, using plasma enhancing chemical vapor deposition forms the gate insulating layer (40).
4. the production method of TFT substrate as described in claim 1, which is characterized in that in the step S5, the oxide half
The material of conductor layer (50) is indium gallium zinc oxide.
5. the production method of TFT substrate as described in claim 1, which is characterized in that the step S5 further includes in the oxygen
It is deposited and patterned to form source-drain electrode layer (60) on compound semiconductor layer (50) and gate insulating layer (40), in the source and drain electricity
Deposition forms passivation layer (70) on pole layer (60), oxide semiconductor layer (50) and gate insulating layer (40), in the passivation layer
(70) it is deposited and patterned to form pixel electrode layer (80) on.
6. a kind of TFT substrate characterized by comprising underlay substrate (10), the gate electrode being set on the underlay substrate (10)
Layer (20), is set to the gate blocks at the gate blocks layer (31) set on the gate electrode layer (20) and on underlay substrate (10)
Gate insulating layer (40) on layer (31) and the oxide semiconductor layer (50) on the gate insulating layer (40);
The material of the gate blocks layer (31) is the graphene film of fluorine doped;
The material of the gate insulating layer (40) is silica.
7. TFT substrate as claimed in claim 6, which is characterized in that the gate blocks layer (31) with a thickness of
8. TFT substrate as claimed in claim 6, which is characterized in that the gate electrode layer (20) is the compound of copper film and molybdenum film
Layer, wherein the copper film is located at the upper layer of the composite layer.
9. TFT substrate as claimed in claim 6, which is characterized in that the material of the oxide semiconductor layer (50) is indium gallium
Zinc oxide.
10. TFT substrate as claimed in claim 6, which is characterized in that further include set on the oxide semiconductor layer (50) and
Source-drain electrode layer (60) on gate insulating layer (40), be set to the source-drain electrode layer (60), oxide semiconductor layer (50) and
Passivation layer (70) on gate insulating layer (40) and the pixel electrode layer (80) on the passivation layer (70).
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