CN109801926B - Thin film transistor substrate, preparation method thereof and display device - Google Patents

Thin film transistor substrate, preparation method thereof and display device Download PDF

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CN109801926B
CN109801926B CN201910044064.4A CN201910044064A CN109801926B CN 109801926 B CN109801926 B CN 109801926B CN 201910044064 A CN201910044064 A CN 201910044064A CN 109801926 B CN109801926 B CN 109801926B
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light resistance
thin film
film transistor
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CN109801926A (en
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杨凤云
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HKC Co Ltd
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HKC Co Ltd
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Abstract

The invention relates to a thin film transistor substrate, a preparation method thereof and a display device. According to the preparation method, the reflection electrode with the composite structure of the molybdenum film, the aluminum film and the molybdenum nitride film is formed, so that the diffusion of aluminum to the thin film transistor can be effectively blocked, the oxidation of aluminum is effectively prevented, the battery reaction caused by etching of the aluminum electrode is avoided, and the product yield can be improved; the preparation method has simple steps and can realize quantitative production.

Description

Thin film transistor substrate, preparation method thereof and display device
Technical Field
The invention relates to the technical field of display, in particular to a thin film transistor substrate, a preparation method thereof and a display device.
Background
The lcd panel has features of low power consumption and thin profile, and is widely used in various electronic products. The utilization of the light source is divided, and the liquid crystal display panel can be divided into a transmission type, a reflection type and a semi-transmission and semi-reflection type. The transmission type LCD uses the backlight module as its light source, and the reflection type LCD uses the external environment light as its light source; the transflective LCD uses the backlight module and the external ambient light as its light source, so that it is not affected by the external light and can save cost.
However, in the manufacturing process of the exemplary transflective lcd, the reflective electrode is prone to cause cell reaction during etching, the stability of the electrode is poor, and the yield is reduced.
Disclosure of Invention
Therefore, it is necessary to provide a thin film transistor substrate, a method for manufacturing the same, and a display device, which are directed to the problems that in the manufacturing process of the transflective liquid crystal display, the reflective electrode is easy to cause a battery reaction in the etching process, and the stability of the electrode and the yield of the product are reduced.
In order to realize the purpose of the invention, the invention adopts the following technical scheme:
a method for preparing a thin film transistor substrate comprises the following steps:
providing a substrate, wherein the substrate comprises a reflecting area and a penetrating area;
forming a thin film transistor on the substrate, wherein an opening is formed in the thin film transistor, the thin film transistor covers the reflection region and the penetration region, and the opening is positioned in the reflection region;
forming a first light resistance layer and a second light resistance layer on two sides of the opening on the thin film transistor;
patterning the first photoresist layer and the second photoresist layer to form a plurality of non-through holes and bumps on the first photoresist layer and the second photoresist layer, and curing the bumps to form an arc-shaped surface on the bumps;
and forming a penetrating electrode on the area of the second light resistance layer corresponding to the penetrating area, and forming a reflecting electrode on the first light resistance layer, the second light resistance layer and the area of the thin film transistor corresponding to the reflecting area, wherein the reflecting electrode is a composite structure of a molybdenum film, an aluminum film and a molybdenum nitride film.
In one embodiment, the composite structure is a stacked structure in which the molybdenum film, the aluminum film, and the molybdenum nitride film are sequentially deposited on the first photoresist layer, the second photoresist layer, and the region of the thin film transistor corresponding to the reflective region.
In one embodiment, the thickness of the molybdenum film is 200-300 angstroms, the thickness of the aluminum film is 2500-4000 angstroms, and the thickness of the molybdenum nitride film is 400-500 angstroms.
In one embodiment, the step of patterning the first photoresist layer and the second photoresist layer to simultaneously form a plurality of non-through holes and bumps on the first photoresist layer and the second photoresist layer includes:
and forming a plurality of non-through holes and bumps on the first photoresist layer and the second photoresist layer simultaneously by using a semi-transparent mask plate through a one-step composition process.
In one embodiment, the semi-transmissive mask includes a light-shielding region and a semi-transmissive region, the light-shielding region corresponds to the bump, and the semi-transmissive region corresponds to the non-through hole.
In one embodiment, before the step of forming the transmissive electrode on the region of the second photoresist layer corresponding to the transmissive region and forming the reflective electrode on the first photoresist layer, the second photoresist layer and the region of the thin film transistor corresponding to the reflective region, the method further includes:
and carrying out plasma treatment on the surfaces of the first photoresist layer and the second photoresist layer to form a plasma treatment layer.
In one embodiment, the step of forming a thin film transistor in the pixel region of the substrate includes:
forming a gate layer on the substrate, wherein the gate layer is positioned in the reflection region;
forming a gate insulating layer on the gate electrode layer and the substrate;
forming a semiconductor layer in a region of the gate insulating layer corresponding to the gate layer;
forming a metal layer on the semiconductor layer and the gate insulating layer, wherein the metal layer exposes part of the gate insulating layer and is provided with a channel region which partially penetrates through the semiconductor layer;
forming a protective layer on the metal layer, the channel region and the partial gate insulating layer;
the opening penetrates through the protective layer, and part of the metal layer is exposed.
In one embodiment, the metal layer includes a first source/drain and a second source/drain, the first source/drain and the second source/drain being located at both sides of the channel region.
A thin film transistor substrate obtained by the production method as described above, comprising:
the substrate comprises a reflecting area and a penetrating area;
the thin film transistor is formed on the substrate and covers the reflecting region and the penetrating region, and is provided with an opening which is positioned in the reflecting region;
the first light resistance layer and the second light resistance layer are formed on two sides of the opening on the thin film transistor, the first light resistance layer and the second light resistance layer are provided with a plurality of non-through holes and convex blocks at the same time, and the convex blocks are provided with arc surfaces;
a penetrating electrode formed on the region of the second photoresist layer corresponding to the penetrating region;
and the reflecting electrode is formed on the first light resistance layer, the second light resistance layer and the area of the thin film transistor corresponding to the reflecting area, and the reflecting electrode has a composite structure of a molybdenum film, an aluminum film and a molybdenum nitride film.
A display device, comprising:
the backlight module comprises a backlight module and a display panel;
wherein the display panel comprises the thin film transistor substrate.
The preparation method can realize quantitative production, and can effectively prevent aluminum from diffusing to the thin film transistor, effectively prevent aluminum from being oxidized, avoid battery reaction caused by etching of the aluminum electrode and further improve the product yield by preparing the reflective electrode with the composite structure of the molybdenum film, the aluminum film and the molybdenum nitride film.
The thin film transistor substrate comprises a substrate, a thin film transistor, a first light resistance layer, a second light resistance layer, a penetrating electrode and a reflecting electrode; the thin film transistor substrate has at least the following advantages: the composite structure of the molybdenum film, the aluminum film and the molybdenum nitride film of the reflecting electrode can effectively prevent aluminum from diffusing to the thin film transistor, effectively prevent aluminum from being oxidized, and avoid the aluminum electrode from causing battery reaction during etching, so that the thin film transistor substrate has higher stability and product yield.
The display device has the advantages of the thin film transistor substrate, has high stability and product yield, and improves user experience.
Drawings
FIG. 1 is a flow chart of a method for fabricating a thin film transistor substrate according to an embodiment;
FIG. 2 is a flowchart illustrating the step S102 of the manufacturing method of FIG. 1;
FIG. 3 is a schematic cross-sectional view of the manufacturing process of step S102 in the manufacturing method of FIG. 1;
FIG. 4 is a schematic cross-sectional view of the manufacturing process of step S104 in the manufacturing method of FIG. 1;
FIG. 5 is a schematic cross-sectional view of the manufacturing process of step S104 in the manufacturing method of FIG. 1;
FIG. 6 is a schematic cross-sectional view of the manufacturing process of step S105 in the manufacturing method of FIG. 1;
FIG. 7 is a schematic cross-sectional view of a thin film transistor substrate according to an embodiment;
FIG. 8 is a schematic cross-sectional view of a TFT substrate according to another embodiment.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Alternative embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Referring to fig. 1, fig. 1 is a schematic flow chart of a method for manufacturing a thin film transistor substrate in this embodiment. The preparation method comprises the following steps: s101, S102, S103, S104, and S105. The method comprises the following specific steps:
step S101, a substrate is provided, the substrate including a reflective region and a transmissive region.
The substrate 110 may be made of glass or transparent organic material. In one embodiment, the glass substrate may be an alkali-free borosilicate ultra-thin glass having high physical properties, good corrosion resistance, high thermal stability, and low density and high elastic modulus. The substrate 110 includes a reflective region and a transmissive region.
Step S102, forming a thin film transistor on the substrate, wherein the thin film transistor is provided with an opening, the thin film transistor covers the reflection region and the penetration region, and the opening is positioned in the reflection region. The opening is substantially a through hole of the outermost layer of the thin film transistor far away from the base layer.
In one embodiment, referring to fig. 2, step S102 includes S1021, S1022, S1023, S1024, and S1025.
In step S1021, a gate layer is formed on the substrate, the gate layer being located in the reflective region.
In step S1022, a gate insulating layer is formed on the gate layer and the substrate.
In step S1023, a semiconductor layer is formed in a region of the gate insulating layer corresponding to the gate layer.
Step S1024 is to form a metal layer on the semiconductor layer and the gate insulating layer, where the metal layer exposes a portion of the gate insulating layer, and the metal layer has a channel region, and the channel region partially penetrates through the semiconductor layer.
In step S1025, a protective layer is formed on the metal layer and a portion of the gate insulating layer. The opening penetrates through the protective layer to expose part of the metal layer.
Specifically, please refer to fig. 3 for assistance.
Wherein the gate layer 120 is disposed on the substrate 110. The material of the gate layer 120 may be selected from metals including, but not limited to, at least one of molybdenum, titanium, aluminum, and copper to ensure good conductivity. The gate layer 120 can be formed by radio frequency magnetron sputtering, thermal evaporation, vacuum electron beam evaporation and plasma enhanced chemical vapor deposition; the thickness of the gate layer 120 can be selected and adjusted according to the actual application and product performance, and is not further limited herein.
The gate insulating layer 130 is disposed on the substrate 110 and covers the gate layer 120 and the substrate 110. The material of the gate insulating layer 130 includes, but is not limited to, at least one of silicon oxide and silicon nitride. The thickness of the gate insulating layer 130 can be selected and adjusted according to the actual application and product performance, and is not further limited herein. The gate insulating layer 130 may be formed on the substrate 110 by rf magnetron sputtering, thermal evaporation, vacuum electron beam evaporation, and plasma enhanced chemical vapor deposition processes.
The semiconductor layer is formed in a region of the gate insulating layer 130 corresponding to the gate layer 120. In one embodiment, the semiconductor layer includes an active layer 140 formed on the gate insulating layer 130 and a doping layer 150 formed on the active layer 140. The active layer 140 is disposed on the gate insulating layer 130, over the gate layer 120; the doping layer 150 is disposed on the active layer 140. The active layer 140 generally serves as a conductive medium, and the material thereof may be amorphous silicon. The thickness of the active layer 140 can be selected and adjusted according to the actual application and the product performance, and is not further limited herein. The doped layer 150 may be doped N-type in the amorphous silicon layer, or doped P-type in the amorphous silicon layer, and optionally, the doped layer 150 is doped N-type in the amorphous silicon layer, and is also doped N-type heavily.
The doped layer 150 has a channel region 150a in the middle, and the channel region 150a penetrates through the doped layer 150, and further, the channel region 150a may also partially penetrate through the active layer 140. Wherein, the penetration can be realized by photolithography or etching method, and the source layer 140 is not completely etched in part, it can be understood that the specific thickness of the "part" can be selected and adjusted according to the actual production situation and product performance. In an embodiment, the active layer 140 and the doping layer 150 may be patterned using an etching process, and the channel region 150a may be formed through the etching process.
The metal layer 160 is disposed on the gate insulating layer 130 and the doped layer 150, the metal layer 160 exposes a portion of the gate insulating layer, and the channel region 150a penetrates the metal layer 160. The metal layer 160 may be made of a metal material, including but not limited to at least one of molybdenum, titanium, aluminum, and copper, to ensure good electrical conductivity. The metal layer 160 includes first and second source/drains positioned at both sides of the channel region 150 a. The first source/drain and the second source/drain include a source and a drain, and specifically, the first source/drain may be a source, and the second source/drain may be a drain; the second source/drain may be a source and the first source/drain may be a drain.
The passivation layer 170 is disposed on the metal layer 160, the channel region 150a and a portion of the gate insulating layer, the opening of the thin film transistor penetrates through the passivation layer 170, so that a through hole 170a is formed in the passivation layer 170 to expose a portion of the metal layer 160, and the through hole 170a is located in the reflective region. The protection layer 170 may be used to protect the covered region from contamination and damage, and to improve the lifespan of the thin film transistor, and the material may be, but is not limited to, one or more of silicon nitride and silicon oxide.
Step S103, a first photoresist layer and a second photoresist layer are formed on both sides of the opening on the thin film transistor.
The first photoresist layer and the second photoresist layer are both transparent organic photoresist layers, and conventional transparent organic materials can be used, which is not limited herein.
Step S104, patterning the first photoresist layer and the second photoresist layer to form a plurality of non-through holes and bumps on the first photoresist layer and the second photoresist layer, and curing the bumps to form an arc-shaped surface on the bumps.
The method comprises the following steps of patterning a first light resistance layer and a second light resistance layer to form a plurality of non-through holes and bumps simultaneously, wherein the steps of patterning the first light resistance layer and the second light resistance layer comprise the following steps: the first photoresist layer and the second photoresist layer are simultaneously formed with a plurality of non-through holes and bumps by a semi-transparent mask plate through a one-step composition process. In one embodiment, the first photoresist layer and the second photoresist layer are simultaneously formed with a plurality of non-through holes and bumps by a single patterning process using a semi-transparent mask, which may be: and exposing and developing the first photoresist layer and the second photoresist layer by using a semi-transparent mask plate to form a photoresist complete reserved area and a photoresist semi-reserved area. The photoresist complete reserved area corresponds to the bump, and the photoresist semi-reserved area corresponds to the non-through hole. The non-through hole is a hole with the penetration depth of 20-80%, and the penetration depth of the non-through hole is controlled by controlling the exposure depth of the semi-transparent mask plate.
Referring to fig. 4, a first photoresist layer 180 and a second photoresist layer 190 are formed on the passivation layer 170, respectively, the first photoresist layer 180 is located at one side of the through hole 170a, and the second photoresist layer 190 is located at the other side of the through hole 170 a. The first photoresist layer 180 and the second photoresist layer 190 have a plurality of non-through holes F1 and bumps T1 formed thereon. The half-transmissive mask 20 includes a light-shielding region 21 and a half-transmissive region 22, the light-shielding region 21 corresponds to the bump T1, and the half-transmissive region 22 corresponds to the non-through hole F1.
By using the semi-transparent mask plate, the times of exposure by using the mask plate are effectively reduced, so that the process complexity is reduced, the processing cost is reduced while the processing time is shortened, and the productivity is improved.
Wherein, carry on the solidification treatment to the lug, make the lug form the step with an arc surface, specifically: the bump is cured by a thermal curing process to form an arc surface on the bump (please refer to fig. 5). The heat treatment curing process may be performed by hot air in an oven or heat conduction through a hot plate.
Step S105, forming a transmissive electrode on the region of the second photoresist layer corresponding to the transmissive region, and forming a reflective electrode on the first photoresist layer, the second photoresist layer and the region of the thin film transistor corresponding to the reflective region, wherein the reflective electrode has a composite structure of a molybdenum film, an aluminum film and a molybdenum nitride film.
Referring to fig. 6, the transmissive electrode 200 is correspondingly disposed in the transmissive region B, and the reflective electrode 210 is correspondingly disposed in the reflective region a. Specifically, the transmissive electrode 200 is disposed on the region of the second photoresist layer 190 corresponding to the transmissive region, and covers a part of the non-through hole of the second photoresist layer 190 and the bump having an arc surface, and the transmissive electrode 200 is a transparent electrode; the reflective electrode 210 is disposed on the first photoresist layer 180, the second photoresist layer 190 and the reflective region of the thin film transistor, covers the non-through hole and the protrusion with the arc surface of the first photoresist layer 180, covers the exposed region of the thin film transistor (the exposed region is greater than or equal to the opening of the thin film transistor), and covers part of the non-through hole and the protrusion with the arc surface of the second photoresist layer 190. Thus, the reflective electrode 210 is in contact with the transmissive electrode 200, and the reflective electrode 210 is also in contact with the metal layer 160 of the thin film transistor through the opening of the thin film transistor.
The reflective electrode 210 has a composite structure of a molybdenum (Mo) film, an aluminum (Al) film, and a molybdenum nitride (MoN) film, and can effectively block diffusion of Al to the thin film transistor, prevent oxidation of Al, and prevent the Al electrode from causing a cell reaction during etching. Specifically, the composite structure is a laminated structure in which a molybdenum film, an aluminum film and a molybdenum nitride film are sequentially deposited on the first photoresist layer, the second photoresist layer and the region of the thin film transistor corresponding to the reflection region, Al can be effectively prevented from diffusing to the thin film transistor through the molybdenum film, Al can be effectively prevented from being oxidized through the molybdenum nitride film, and the combination of the molybdenum film and the molybdenum nitride film can avoid the Al electrode from causing battery reaction during etching, so that the product yield can be improved.
The deposition modes of the molybdenum film, the aluminum film and the molybdenum nitride film can be selected and adjusted according to the actual production condition and the product performance, and are not limited herein. Alternatively, the thickness of the composite structure may be: the thickness of the molybdenum film is 200-300 angstroms, the thickness of the aluminum film is 2500-4000 angstroms, and the thickness of the molybdenum nitride film is 400-500 angstroms, so that the battery reaction caused by the etching of the Al electrode is effectively avoided.
In one embodiment, before step S105, in order to further improve the electrode performance of the transmissive electrode and the reflective electrode, step S106 is further included, in which a plasma treatment is performed on the surfaces of the first photoresist layer and the second photoresist layer to form a plasma treatment layer. Thus, the plasma processing layer covers the surfaces of the first photoresist layer and the second photoresist layer. The plasma technology is adopted to carry out plasma treatment on the surfaces of the first light resistance layer and the second light resistance layer, so that the chemical composition and the wetting performance of the surfaces of the first light resistance layer and the second light resistance layer can be improved, the reliable adhesion effect between the first light resistance layer and the second light resistance layer and between the penetrating electrode and the reflecting electrode is ensured, the surface roughness and the square resistance of the penetrating electrode and the reflecting electrode can be reduced, and the electrical performance is improved.
It should be noted that the forming process of the above layers may include rf magnetron sputtering, thermal evaporation, vacuum electron beam evaporation, and plasma enhanced chemical vapor deposition. It is understood that the forming process can be selected and adjusted according to the actual application and product performance, and is not further limited herein. The thickness of each layer can also be selected and adjusted according to the actual application and product performance, and is not further limited herein.
The preparation method provided by the implementation has simple steps, can realize quantitative production, and prepares the thin film transistor substrate which at least has the following advantages: by the aid of the composite structure of the reflecting electrode, diffusion of Al to the thin film transistor can be effectively blocked, oxidation of Al is effectively prevented, battery reaction of the Al electrode during etching is avoided, and accordingly product yield can be improved; meanwhile, by using the semi-transparent mask plate, the times of exposure by using the mask plate are effectively reduced, so that the process complexity is reduced, the processing time is shortened, the processing cost is reduced, and the productivity is improved; moreover, the plasma treatment is carried out on the surfaces of the first light resistance layer and the second light resistance layer through the plasma technology, so that the chemical components and the wetting performance of the surfaces of the first light resistance layer and the second light resistance layer can be improved, the reliable adhesion effect between the first light resistance layer and the second light resistance layer and between the penetrating electrode and the reflecting electrode is ensured, the surface roughness and the square resistance of the penetrating electrode and the reflecting electrode can be reduced, and the electrical performance is improved.
The embodiment provides a thin film transistor substrate manufactured by using the preparation method embodiment of the thin film transistor substrate.
In this embodiment, the thin film transistor substrate includes a substrate, a thin film transistor, a first photoresist layer, a second photoresist layer, a transmissive electrode, and a reflective electrode.
Wherein, the substrate is provided with a reflecting area and a penetrating area; the thin film transistor is formed on the substrate and covers the reflecting region and the penetrating region, and the thin film transistor is provided with an opening which is positioned in the reflecting region; the first light resistance layer and the second light resistance layer are formed on two sides of the opening on the thin film transistor, the first light resistance layer and the second light resistance layer are provided with a plurality of non-through holes and convex blocks at the same time, and the convex blocks are provided with arc surfaces; the penetrating electrode is formed on the area of the second photoresist layer corresponding to the penetrating area; the reflective electrode is formed on the first photoresist layer, the second photoresist layer and the region of the thin film transistor corresponding to the reflective region, and the reflective electrode has a composite structure of a molybdenum film, an aluminum film and a molybdenum nitride film.
In one embodiment, referring to fig. 7, the thin film transistor substrate includes a substrate 110, a gate electrode layer 120, a gate insulating layer 130, an active layer 140, a doping layer 150, a metal layer 160, a protective layer 170, a first photoresist layer 180, a second photoresist layer 190, a transmissive electrode 200, and a reflective electrode 210. The gate layer 120, the gate insulating layer 130, the active layer 140, the doping layer 150, the metal layer 160 and the protection layer 170 constitute a thin film transistor.
In another embodiment, referring to fig. 8, the tft substrate further includes a plasma treatment layer 220 covering the surfaces of the first and second photoresist layers 180 and 190, so as to ensure a reliable adhesion effect between the first and second photoresist layers 180 and 190 and the transmissive electrode 200 and the reflective electrode 210, reduce the surface roughness and sheet resistance of the transmissive electrode 200 and the reflective electrode 210, and improve electrical properties.
In the present embodiment, the substrate 110, the gate layer 120, the gate insulating layer 130, the active layer 140, the doping layer 150, the metal layer 160, the passivation layer 170, the first photoresist layer 180, the second photoresist layer 190, the transmissive electrode 200, the reflective electrode 210 and the plasma processing layer 220 are described with reference to the above embodiments, and further description thereof is omitted.
The thin film transistor substrate comprises a substrate, a thin film transistor, a first light resistance layer, a second light resistance layer, a penetrating electrode, a reflecting electrode and a plasma processing layer; the thin film transistor substrate has at least the following advantages: the molybdenum film can effectively prevent Al from diffusing to the thin film transistor, the molybdenum nitride film can effectively prevent Al from being oxidized, and the combination of the molybdenum film and the molybdenum nitride film can prevent the Al electrode from causing battery reaction during etching, so that the stability of the electrode is improved, and the yield of products is improved; through the plasma processing layer, the reliable adhesion effect between the first light resistance layer and the second light resistance layer as well as the penetration electrode and the reflection electrode is ensured, the surface roughness and the square resistance of the penetration electrode and the reflection electrode are reduced, and the electrical property is improved.
The embodiment also provides a display device, which comprises a backlight module and a display panel; the display panel includes the thin film transistor substrate in the above embodiments. The light of the backlight module passes through the transmission electrode of the transmission area to be used as a light source, and meanwhile, the external environment light is reflected by the reflection electrode positioned in the reflection area to be used as a light source, so that the display device is not influenced by the external light; due to the composite structure of the molybdenum film, the aluminum film and the molybdenum nitride film of the reflecting electrode, the display effect and the product yield of the display device are improved, and the user experience is improved.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A method for preparing a thin film transistor substrate is characterized by comprising the following steps:
providing a substrate, wherein the substrate comprises a reflecting area and a penetrating area;
forming a thin film transistor on the substrate, wherein an opening is formed in the thin film transistor, the thin film transistor covers the reflection region and the penetration region, and the opening is positioned in the reflection region;
forming a first light resistance layer and a second light resistance layer on two sides of the opening on the thin film transistor;
patterning the first photoresist layer and the second photoresist layer to form a plurality of non-through holes and bumps on the first photoresist layer and the second photoresist layer, and curing the bumps to form an arc-shaped surface on the bumps;
carrying out plasma treatment on the surfaces of the first light resistance layer and the second light resistance layer to form a plasma treatment layer;
forming a penetrating electrode on the area of the second light resistance layer corresponding to the penetrating area, and forming a reflecting electrode on the first light resistance layer, the second light resistance layer and the area of the thin film transistor corresponding to the reflecting area, wherein the reflecting electrode has a composite structure of a molybdenum film, an aluminum film and a molybdenum nitride film; the composite structure is a laminated structure formed by sequentially depositing the molybdenum film, the aluminum film and the molybdenum nitride film on the first light resistance layer, the second light resistance layer and the area of the thin film transistor corresponding to the reflection area;
the patterning treatment is carried out on the first light resistance layer and the second light resistance layer, so that a plurality of non-through holes and bumps are formed on the first light resistance layer and the second light resistance layer at the same time, and the patterning treatment specifically comprises the following steps:
and forming a plurality of non-through holes and bumps on the first photoresist layer and the second photoresist layer simultaneously by using a semi-transparent mask plate through a one-step composition process.
2. The method according to claim 1, wherein the substrate comprises glass and/or a transparent organic material.
3. The method according to claim 2, wherein the thickness of the molybdenum film is 200 to 300 angstroms, the thickness of the aluminum film is 2500 to 4000 angstroms, and the thickness of the molybdenum nitride film is 400 to 500 angstroms.
4. The method according to claim 1, wherein the mask comprises a light-shielding region and a semi-transparent region, the light-shielding region corresponds to the bump, and the semi-transparent region corresponds to the non-through hole.
5. A manufacturing method according to any one of claims 1 to 3, wherein the step of forming a thin film transistor in a pixel region of the substrate includes:
forming a gate layer on the substrate, wherein the gate layer is positioned in the reflection region;
forming a gate insulating layer on the gate electrode layer and the substrate;
forming a semiconductor layer in a region of the gate insulating layer corresponding to the gate layer;
forming a metal layer on the semiconductor layer and the gate insulating layer, wherein the metal layer exposes part of the gate insulating layer and is provided with a channel region which partially penetrates through the semiconductor layer;
forming a protective layer on the metal layer, the channel region and the partial gate insulating layer;
the opening penetrates through the protective layer, and part of the metal layer is exposed.
6. The method according to claim 5, wherein the substrate is an alkali-free borosilicate ultra-thin glass.
7. The method of claim 5, wherein the metal layer comprises a first source/drain and a second source/drain, the first source/drain and the second source/drain being located on both sides of the channel region.
8. The method according to claim 1, wherein the transmissive electrode is disposed on a region of the second photoresist layer corresponding to the transmissive region, covering a portion of the non-through hole of the second photoresist layer and the bump having an arc-shaped surface.
9. A thin film transistor substrate obtained by the production method according to claims 1 to 8, comprising:
the substrate comprises a reflecting area and a penetrating area;
the thin film transistor is formed on the substrate and covers the reflecting region and the penetrating region, and is provided with an opening which is positioned in the reflecting region;
the first light resistance layer and the second light resistance layer are formed on two sides of the opening on the thin film transistor, the first light resistance layer and the second light resistance layer are provided with a plurality of non-through holes and convex blocks at the same time, and the convex blocks are provided with arc surfaces;
a penetrating electrode formed on the region of the second photoresist layer corresponding to the penetrating region;
and the reflecting electrode is formed on the first light resistance layer, the second light resistance layer and the area of the thin film transistor corresponding to the reflecting area, and the reflecting electrode has a composite structure of a molybdenum film, an aluminum film and a molybdenum nitride film.
10. A display device, comprising:
the backlight module comprises a backlight module and a display panel;
wherein the display panel comprises the thin film transistor substrate of claim 8.
CN201910044064.4A 2019-01-17 2019-01-17 Thin film transistor substrate, preparation method thereof and display device Active CN109801926B (en)

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CN109801926A CN109801926A (en) 2019-05-24
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102403271A (en) * 2011-12-06 2012-04-04 华映视讯(吴江)有限公司 Method for manufacturing film transistor substrate and transflective liquid crystal display
JP2015169680A (en) * 2014-03-04 2015-09-28 株式会社ジャパンディスプレイ liquid crystal display device
CN106463080A (en) * 2014-06-13 2017-02-22 株式会社半导体能源研究所 Display device
US10032921B2 (en) * 2015-07-31 2018-07-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display module, and electronic device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100417996C (en) * 2005-07-14 2008-09-10 友达光电股份有限公司 Production of liquid-crystal display device
CN100543539C (en) * 2006-06-02 2009-09-23 群康科技(深圳)有限公司 Method for manufacturing semi-reflective semi-transmitting liquid crystal display device
CN101086976A (en) * 2006-06-06 2007-12-12 中华映管股份有限公司 Forming method of contact window hole
WO2011096276A1 (en) * 2010-02-05 2011-08-11 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device
CN102142445B (en) * 2010-12-24 2013-11-06 福建华映显示科技有限公司 Array substrate of active component and production method thereof
US10355673B2 (en) * 2016-09-29 2019-07-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102403271A (en) * 2011-12-06 2012-04-04 华映视讯(吴江)有限公司 Method for manufacturing film transistor substrate and transflective liquid crystal display
JP2015169680A (en) * 2014-03-04 2015-09-28 株式会社ジャパンディスプレイ liquid crystal display device
CN106463080A (en) * 2014-06-13 2017-02-22 株式会社半导体能源研究所 Display device
US10032921B2 (en) * 2015-07-31 2018-07-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display module, and electronic device

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