CN109643708A - 用于微电子器件的互连结构 - Google Patents
用于微电子器件的互连结构 Download PDFInfo
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- CN109643708A CN109643708A CN201780053467.4A CN201780053467A CN109643708A CN 109643708 A CN109643708 A CN 109643708A CN 201780053467 A CN201780053467 A CN 201780053467A CN 109643708 A CN109643708 A CN 109643708A
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Abstract
一种微电子封装,其具有被耦合在重分布层(108)的相对侧上并且至少部分地与彼此重叠的两个半导体管芯。半导体管芯中的至少第一个包括接触部的两个集合,所述接触部的第一群组以比接触部的第二群组更小的相对于彼此的节距而被布置。以较大节距的接触部的第一群组被安置以接合重分布层(108)中的接触部。以较小节距的接触部的第二群组被安置以接合第二半导体管芯上以相同节距的相应接触部。
Description
优先权申请
本申请对2016年9月30日提交的、序列号为15/282,855的美国专利申请要求优先权权益,所述申请的内容据此通过引用以其全部被并入。
技术领域
本文中所述的实施例一般地涉及用于提供微电子器件中的互连的方法和装置;并且更具体地涉及用于通过使用以比用于至少一个半导体管芯的其它互连的接触部更靠近的距彼此的间隔而被安置的接触部来将至少两个半导体管芯互连到彼此的方法和装置。
背景技术
许多形式的微电子器件、诸如IC(集成电路)封装包括一个或多个半导体管芯,所述半导体管芯耦合到重分布结构,所述重分布结构被适配成促进与其它设备(例如印刷电路板(PCB)、诸如母板或另一模块化组装件)的互连。例如,这样的重分布结构(在本文中被称为“重分布层”)可以连接到半导体管芯上的接触部,并且提供电迹线来将来自管芯接触部的电路径重分布到其它位置。在“扇出”封装的情况中,重分布层将包括电迹线,所述电迹线被布置成将管芯上的接触部中至少一大量部分、或全部重分布到半导体管芯本身(管芯的“占用空间(footprint)”)的横向尺寸外部的接触部位置。在许多情况中,对于与这样的重分布层对接所需要的在接触部之间的横向间隔,其已知为接触部的“节距”比通过用于管芯本身的半导体制造技术所能实现的大得多。将会合期望的是使半导体管芯的接触部的某个群组的所需节距最小化,并且促进通过这样的接触部与另一半导体管芯、而不是与重分布层的直接连接。
附图说明
图1A-B在图1A中描绘了并入本文中所述的技术的示例IC封装的横截面;并且在图1B中,图1A的示例IC封装包括附加的可选结构。
图2A-H描绘了用于形成IC封装、诸如图1A的IC封装的示例过程流的顺序阶段。
图3描绘了用于产生适合用于在IC封装、诸如图1A的IC封装中使用的另一示例实施例的半导体管芯处理的一阶段。
图4描绘了用于形成IC封装、诸如图1A的IC封装的示例过程流的流程图。
图5描绘了可以并入微电子器件、诸如图1A的IC封装的系统级图解。
具体实施方式
以下描述和附图充分地说明了特定实施例,用于使得本领域技术人员能够实践它们。其它实施例可以并入结构性、逻辑性、电气、过程性以及其它的改变。一些实施例的部分和特征可以被包括在其它实施例的那些中或取代其它实施例的那些。在权利要求中所阐明的实施例包括那些权利要求的所有可用等同物。
如以上所指出的,许多制造过程需要半导体管芯在具有适合用于与重分布层接合的接触部节距的情况下被制造,其中所述接触部节距比将会在技术上可行地在半导体管芯上产生的接触部节距更大。这可导致部分地由对于以适合用于与重分布层接合的节距来提供必要外部接触部所需要的区域所指示的半导体管芯尺寸。如本文中所使用的,术语“重分布层”与其在行业中的常规术语相一致地被使用,用于共同地指代多个材料层级(例如在金属或其它导电材料层的相对侧上的两层电介质),其共同地形成将半导体管芯的接触部重分布到(通常)横向偏移的位置的接触部和导电迹线。该术语设想如下重分布结构,所述重分布结构具有单个层级的金属或另一导体,或者多个层级的金属或其它导体,其与彼此垂直地偏移,并且在许多情况中通过重分布层中的互连而与彼此选择性地通信。
然而,在一些情况中,并非半导体管芯的所有接触部都要求通过重分布层的这样的重分布,并且因而不要求如可由接合重分布层的要求所指示的接触部节距。这样的微电子器件的示例是如下一个:其中第一半导体管芯将直接与第二半导体管芯通信。可以预想这样的微电子器件的许多示例,但是作为一个示例,半导体管芯、诸如用于处理器的半导体管芯可以直接与其它管芯、诸如例如存储器、图形处理器、无线接口设备、以及许多其它类型的管芯中的任何一个或多个通信。如本文中所标识的,促进在第一和第二管芯之间的直接通信的封装还可以被配置成促进在两个管芯之间的直接通信通过每个管芯上的接触部的相应群组,所述接触部是以比接合重分布层的(任一管芯的)接触部更细的节距。
现在参考图1A,该图描绘了示例IC封装的垂直横截面,所述示例IC封装一般以100而被指示,并入了本文中所述的技术。封装100包括第一半导体管芯102,以及直接耦合到第一半导体管芯102的第二半导体管芯104(如将在以下更详细地描述的)。在示例封装100中,第一半导体管芯102被包入在经模塑的结构106内,所述经模塑的结构106连同第一半导体管芯102一起支撑重分布层108,其中第一半导体管芯102位于重分布层108的第一侧上。如在图中可见的,第二半导体管芯104在重分布层108的相对侧上,以有时在本领域中被称为“悬挂管芯”配置的配置。尽管在所描绘的示例封装100中,仅仅描绘了单个悬挂管芯,但是多个悬挂管芯可以用在本文中针对第二半导体管芯104所描述的相同方式被耦合到第一半导体管芯。根据本文中所提供的描述,封装100仅仅是说明性的,并且可以具有任何期望的结构。例如,许多封装将横向地延伸到显著更大的尺寸,并且提供在封装周围延伸的多行接触球114。
在所描绘的示例封装100中,重分布层108是以“扇出”层的形式,其中在第一半导体管芯102上的一般以110(参见相等的区)所指示的接触部的第一群组通过重分布层108中的导电迹线112被重分布到超出第一半导体管芯102的横向尺寸的位置,如由接触球114(其还通过术语“焊料球”而已知,该术语不暗示用于球的特定材料)所指示的。在所描绘的示例中,接触球114与第二半导体管芯104处于重分布层108的相同侧上。
如从第一群组110内的所描绘的该对接触部可见的,相邻的接触部被如116处指示的所指定的距离、或“节距”分离。如本文中较早前所指出的,针对将耦合到重分布层108的接触部的该第一群组110的节距116典型地至少部分地响应于用于重分布层108的最小行宽度和接触部间隔而被确定。如对于本领域技术人员将显而易见的,在一些示例中,在当前横截面中所描绘的接触部的第一群组110将包括多个接触部,所述多个接触部跨半导体管芯102的接触表面的某个部分、以在X-Y方向上延伸的所选图案(阵列化的)而被布置。在许多示例中,所述图案将是或包括接触部的矩形阵列,所述接触部全部以相对于彼此的第一节距被布置。因而,所描绘的在横截面的平面中的一行(例如在沿着半导体管芯102的X方向上)中所描绘的接触部的第一群组110可以在许多示例中包括超过页面平面的附加的一行接触部,以及在页面平面上方的附加一行接触部(其从而被布置在Y方向(其与横截面的平面垂直地延伸)上),其沿着半导体管芯102,全部以相对于第一群组的其它接触部的第一节距来被布置。
第一半导体管芯102还包括一般以118被指示的、被配置成接合第二半导体管芯104的接触部的第二群组。如从图中可见的,接触部的第二群组118中的接触部以第二节距120来被定位。第二节距120小于第一节距116(并且因而是比第一节距116“更细的”节距)。在一些示例中,第二节距120将不多于第一节距116的尺寸的近似70%;而在其它示例中,第二节距120将不多于第一节距116的尺寸的近似50%。然而,不一定需要这样的比较性尺寸,因为即使第二节距大于、甚至显著大于第一节距116的尺寸的近似70%,也可以获得益处。
在一些示例中,如所描绘的,第二群组118的接触部将包括从第一半导体管芯102延伸、至少部分地通过重分布层108的金属支柱。在一些示例中,形成第二群组118的接触部的支柱可具有一尺寸用于充分地延伸以基本上在第二半导体管芯104的表面处直接接合接触表面。然而,在其它配置、诸如图1A中所描绘的配置中,第二半导体管芯104将包括一般以122所指示的接触部的第三群组,并且该第三群组122的接触部将各自具有从第二半导体管芯104的表面延伸的金属支柱。接触部的第二和第三群组的金属支柱可以例如是铜(Cu)支柱。在这样的示例中,接触部的第二和第三群组的这样的铜支柱将通过锡-银(Sn-Ag)界面而与彼此结合,所述锡-银(Sn-Ag)界面相应地被施加到接触部的第二和第三群组118和122中任一个(或二者)的接触部的表面。
如接触部的第一群组110一样,在横截面的平面中的一行中所描绘的接触部的第二和第三群组118也将包括多个接触部,所述多个接触部跨半导体管芯102的接触表面的某个部分、以在X-Y方向上延伸的所选图案(阵列化的)而被布置。再次,在一些示例中,所述图案将是或包括接触部的矩形阵列,所述接触部全部以相对于彼此的第二节距被布置。因而,所描绘的在横截面的平面中的相应行中所描绘的接触部的第二群组118和接触部的第三群组122中的每一个可以在许多示例中包括超过页面平面的一个或多个附加行的接触部,以及在页面平面上方的一个或多个附加行的接触部,其全部与相对于相应群组的其它接触部的第二节距而被布置。在一些示例中,第二和/或第三群组118、122的接触部,除了以第二、较小的节距被阵列化之外,还可以各自具有比第一群组110的接触部更小的横向尺寸(宽度)。
虽然当前描述聚焦于第一、第二和第三群组的接触部上,但是半导体管芯可以包括不是第一和第二群组的部分的附加接触部(单独的或阵列)。以下讨论标识出:第二半导体管芯104可以包括如以124指示的一个或多个附加接触部,其不是接触部的第三群组的一部分。以相同的方式,第一半导体管芯102还可以包括一个或多个接触部(包括接触部的阵列),其不是第一群组110或第二群组118中任一个的接触部的一部分。半导体管芯102或104中任一个上的任何附加的接触部可以区别于作为接触部群组110、118或122中任一个的部分(如适当的那样),其与那些群组中任一个的接触部间隔开比这样的接触部群组的节距更大的距离。
封装100包括用于将接触部的第一群组110的接触部耦合到重分布层108的第一侧的机制。在一些实施例中,诸如在图1A中所描绘的那个,该机制将包括具有平面金属接触焊盘的接触部的第一群组,所述平面金属接触焊盘由例如铝或铜形成。如相对于图2A-H更详细地描述的,该机制还将包括在重分布层108中所形成的金属迹线,其延伸以与接触部的第一群组110的相应接触部电接触。在其它实施例中,用于将接触部的第一群组的接触部耦合到重分布层的第一侧的机制可以包括利用延伸到第一半导体管芯之上的任何钝化层的表面或延伸超出所述任何钝化层的金属支柱或类似的延伸结构、诸如铜支柱所形成的接触部的第一群组110的接触部。然后可以在接触部的第一群组110的这样的支柱上形成重分布层108。
封装100还包括用于将接触部的第二群组118的接触部耦合到第二半导体管芯104上的接触部的第三群组122的接触部的机制。由于接触部的第二群组118的接触部的更细的节距,适合用于这样的更细节距的互连结构可以代替于诸如可以用于接触部的第一群组110的其它结构而被使用。由于接触部的第二和第三群组118、122相应地不需要电接合重分布层108,所以这些接触部的配置对于促进与彼此的直接连接的结构性选项是开放的。在一些示例中,用于耦合接触部的第二和第三群组的接触部的机制可以包括被形成为平面表面的接触部的第二或第三群组,所述平面表面将与接触部的其它群组的支柱或其它延伸相接合。在其它示例、诸如图1A的示例中,所述机制可以包括接触部的第二和第三群组二者,其包括以相同的(第二)节距被安置并且可以与彼此直接结合的支柱。在(任一配置的)一些示例中,所述耦合机制将包括结合性界面材料来促进所述结合。例如,在其中延伸支柱是铜(Cu)的情况下,锡-银(SnAg)界面可以有益地用于促进接触部之间的结合。
封装100还图示了在接触部的第三群组122外部使用附加的一个或多个接触部124(在示例中被描绘为单个接触部)。当第二半导体管芯104与第一半导体管芯102处于仅仅部分重叠的关系中(如在本示例中所描绘的)的时候,第二半导体管芯104可以包括(多个)附加的接触部124,其延伸以接合被形成在重分布层108中的相应接触部126。在其中所述附加的一个或多个接触部包括多个接触部的情况中,那些接触部可以是以比接触部的第二和第三群组的第二节距120更大的节距。该更大的节距将再一次适应由重分布层108的要求所强加的关于间隔的任何约束。在一些示例中,并且如相对于封装100所描绘的,所述一个或多个附加接触部124将在如以126所指示的接触部处接触重分布层108,所述如以126所指示的接触部横向地超出第一半导体管芯102的外围或占用空间而被定位。如以上所讨论的,(多个)附加接触部124可以被标识为非接触部第三群组的部分,因为它通过如下距离而与所描绘的接触部第三群组122间隔开:所述距离大于这样的接触部第三群组122被间隔开所按的第二节距。
在一些示例中,(多个)附加接触部124将提供在第二半导体管芯104与重分布层108内的电迹线之间的电连接。然而,在其它示例中,(多个)附加接触部124可仅仅连接到电隔离的接触部,以在第二半导体管芯104与封装100的附加结构之间提供另外的机械连接。因而,本文中所述的“接触”结构包括但不限于用于将来自一个设备或位置的电信号传送到另一个的互连,并且明显包括用于仅仅建立机械连接的互连。
在微电子封装的一些示例中,甚至在其中重分布层处于“扇出”配置中的情况中,第二半导体管芯可以完全在第一半导体管芯的外围内延伸,或者第二半导体管芯的所有电连接可以耦合到第一半导体管芯上的接触部的第二群组。然而,如从图1A中明显的,另一很可能的配置是:第二半导体管芯104与第一半导体管芯102处于仅仅部分重叠的关系中,并且因此可以通过一个或多个附加的接触部124而与重分布层108接触,如以上所述的那样。
所述结构的一个益处是减少半导体管芯的尺寸要求,其通过促进在多个管芯之间的直接连接,这通过使用以比被间隔开来接合重分布层的接触部更细的节距而被间隔开的接触部。另外,所述结构提供管芯之间具有最小长度的互连,从而最小化较长互连的潜在负面影响。
现在参考图1B,该图描绘了经修改的封装130,其包括具有在其中形成的附加结构的封装100的结构。作为结果,参考封装100所使用的参考标号在此处参考封装130被重复。第一附加结构存在于被安置在第二半导体管芯104与重分布层108之间的底部填充材料132中。底部填充材料132可以具有对于本领域技术人员所已知的各种类型,并且可以通过对于这样的本领域技术人员所已知的各种机制来被安置。例如,底部填充材料132可以是环氧树脂,其在许多情况中包含二氧化硅(Si02),并且可以例如通过毛细管底部填充过程来被安置。
封装130还包括一般以134所指示的密封剂,其延伸以覆盖第二半导体管芯104的外部表面,并且优选地延伸到重分布层108的下表面(如所描绘的那样)。密封剂134将优选地至少在第二半导体管芯104的附近延伸。在其它示例中,密封剂可以被延伸以覆盖重分布层108的所描绘的下表面的更大一部分或其全部(除了不覆盖接触球114之外)。
底部填充材料132或密封剂134可以增强封装130内第二半导体管芯104的机械连接。底部填充材料132和密封剂134可以与彼此独立地被使用。作为结果,可存在底部填充材料132和密封剂134中的仅一个;或者二者可以被利用,或者没有任一个可以被利用。
现在参考图2A-H,这些图描绘了用于形成IC封装、诸如图1A的IC封装的示例过程流的顺序阶段。图2A开始于半导体管芯200安置在经模塑的组件202(仅仅描绘了其中一部分)内,表示晶圆的“重构”。作为晶圆的这样的“重构”的示例,如对于本领域技术人员所已知的,单独的被切单(singulated)的管芯以与彼此间隔开的关系而被安置在模塑载体上,所述间隔被选择以提供用于适应将相对于每个管芯被形成的所选尺寸的重分布层的所意图的尺寸,并且适应重分布层的后续切单以及支持经模塑的结构(具有附连的管芯)。
在示例流中,诸如箔层之类的分离层将被层压到模塑载体上。单独的管芯将以所期望的间隔被安置在箔层上,诸如通过使用拾取和安置工具。模塑化合物然后将被安置在模塑载体中,并且在适当的条件下被模塑以包围每个管芯至所需要的尺寸。一旦模塑完成,经重构的晶圆就将从所述箔以及模塑载体的其余部分脱离结合(de-bonded)以用于进一步处理。
图2A示出了在这样的晶圆重构之后的过程流的开始。如所描绘的,半导体管芯200包括钝化层204,所述钝化层204被打开以提供通向金属接触焊盘206的入口。金属接触焊盘206、诸如铝接触焊盘形成以距彼此的第一相对节距——如一般以210所指示的——来被布置的接触部的第一群组208。半导体管芯200还包括接触部的第二群组212,所述接触部各自包括相应的金属支柱,诸如铜支柱214。在接触部的该第二群组212中,金属支柱以第二节距218被布置,所述第二节距218是比接触部的第一群组208的节距210更细的节距。在一些示例过程中,钝化层204和铜支柱214在半导体管芯的处理期间被形成。在其它过程中,在如图2A中所描绘的晶圆的重构之后,钝化层204可以被形成,或如果在先被形成则可以被打开。类似地,在一些过程流中,在晶圆重构之后,可以形成铜支柱214。
现在参考图2B,将形成重分布层的一部分的第一介电层216将被形成在经模塑的组件202与半导体管芯200的一部分之上。在一些示例中,第一介电层216将包括聚酰胺层,并且将通过跨经重构的晶圆的表面的沉积以及随后的光刻图案化来被形成。在所描绘的示例中,将在接触部的第二群组212附近移除介电层216。然而,不要求这样的移除,并且在一些过程中,介电层216可以被留在适当的地方,围绕铜支柱214(但是不在其上方延伸)。
现在参考图2C,用于重分布层中的迹线的电化学电镀的种子层220将被沉积。在其中重分布层中的迹线将是铜的示例中,种子层可以是经溅射的金属层,诸如例如钨化钛/铜(TiW/Cu)或钛/铜(Ti/Cu)。
在一些示例中,诸如在图2C中所描绘的那个,种子层将被溅射在经重构的晶圆的表面上。在其它示例中,在形成种子层之前可以掩蔽与接触部的第二群组212邻近的区。
现在参考图2D,在所描绘的示例中,抗电镀剂222被沉积在种子层上方,并且然后以常规的方式被图案化以限定用于形成重分布层的导电迹线的轮廓。
现在参考图2E,金属层224、例如铜然后将被沉积在通过经图案化的抗电镀剂222被暴露留下的种子层220的部分之上。用于沉积附加的铜(或其它金属)的示例方法将是电镀。
现在参考图2F,一旦形成了金属层224,于是就可以移除经图案化的抗电镀剂222。参考图2G,然后可以蚀刻种子层220的现在被暴露的部分。在诸如所描述的那个之类的示例中,其中种子层是钨化钛/铜(TiW/Cu)或钛/铜(Ti/Cu),用于移除经溅射的铜的示例性合适的化学成分是硝酸(HNO3),并且用于移除钛(Ti)或钨化钛(TiW)的示例性合适的化学成分是过氧化氢(H2O2)加上氢氧化铵(NH4OH)。移除种子层220的被暴露的部分使沉积的金属(Cu)迹线226隔离以用于重分布层,并且还使铜支柱214与彼此隔离。
现在参考图2H,第二介电层228然后被形成在经重构的晶圆表面之上并且被图案化(打开)以暴露接触部的第二群组212,并且还允许通过开口230通向重分布层的金属迹线226的接触部分。如相对于图1A的封装100所讨论的,导电迹线(226)将在经模塑的组件202之上延伸以促进将接触球(图1A中的214)安置超出半导体管芯200的外围(即占用空间),其中重分布层受经模塑的组件202支撑。
现在参考图3,该图描绘了用于微电子封装300的可替换配置,其不同于图1A-B和图2A-H的封装之处在于具有多层级重分布层,其一般以302被指示。图3的结构与图2H中描绘的那些直接平行,并且因而已经在图3中被等同地编号。封装300的基础结构类似于图2H中所描绘的那个,但是导电迹线304的附加层级被布置在第二介电层228上方。导电迹线304的附加层级然后被第三介电层306覆盖。导电迹线304延伸到金属迹线226以进一步促进信号从半导体管芯200到所期望的位置的路由,其以图1A中所描绘的方式。为了促进第二半导体管芯到铜支柱214的附连,其以参考图1A所描述的方式,可以合期望的是在图2A-H的单个层级重分布层中形成具有相对于铜支柱214的高度的有所增大的高度的铜支柱308。另外,在一些实施例中,可以合期望的是形成第一介电层216以在铜支柱308周围延伸(没有被特别地描绘)。
现在参考图4,该图描绘了一流程图,其标识了用于形成本文中所述类型的微电子器件封装的示例方法400的操作。首先参考操作402,支撑结构将被形成在第一半导体管芯之上,所述第一半导体管芯包括接触部的第一和第二群组,所述接触部以距彼此的不同节距而被布置,并且其中第二群组的接触部以比第一群组的接触部更细的节距来被布置。在许多示例中,支撑结构将是经模塑的结构。
在操作404处,重分布层被形成在第一半导体管芯的有源表面之上并且在经模塑的结构的至少一部分之上。如本文中别处所描述的,重分布层包括导电迹线,所述导电迹线从第一半导体管芯的接触部的第一群组的接触部延伸到所期望的位置以用于安置接触球,用于制成与其它结构的电连接。在一些示例中,用于接触球的所期望的位置中的至少一些将超出第一半导体管芯的横向尺寸,并且因而将在一区中,在该区中重分布层受在第一半导体管芯之上所形成的经模塑的结构所支撑。
在操作406处,第二半导体管芯在重分布层的与第一半导体管芯相对的侧上延伸,并且被安置处于与第一半导体管芯的至少部分重叠的关系中。第二半导体管芯通过以与第一半导体管芯上的接触部的第二群组的接触部相同的节距被安置的接触部的第三集合而被耦合到第一半导体管芯,并且接触部的第二和第三群组的相应接触部被结合到彼此。在各种示例中,重分布层可以具有单个层级的导电迹线,而在其它示例中,重分布层可以具有两个或更多层级的导电迹线。
在可选操作408中,第二半导体管芯可以包括一个或多个附加接触部(如在图1A中以124所标识的),其与接触部的第三集合分离,并且所述方法可以此外包括将所述(多个)附加的接触部结合到重分布层上相应的接触部。在该方法的一些示例中,所述(多个)附加接触部中的一个或多个可以被结合到重分布层上的接触部,其超出第一半导体管芯的横向尺寸。如本文中别处所指出的,一个或多个附加的接触部可以被耦合到重分布层接触部,其要么被耦合到电迹线,要么是电隔离的。
在可选操作410中,耦合材料将被应用以接合第二半导体管芯和重分布层二者。在一些示例中,耦合材料将是被安置在第二半导体管芯与重分布层之间的底部填充材料;而在其它示例中,耦合材料将以在第二半导体管芯周围延伸的密封剂的形式。在一些示例中,耦合材料将包括底部填充材料和密封剂材料二者。
如较早前所指出的,许多类型的半导体管芯可以有益地以本文中所述的方式被一起封装在微电子器件中。这样的有益组合的一个示例将是处理器管芯结合另一设备管芯,诸如存储器设备、芯片组、图形处理器等等。结果得到的微电子器件封装于是可以被包括在更大的电子器件或系统中。
图5图示了根据本发明的一个实施例的系统级图解。例如,图5描绘了电子器件(例如系统)的示例,其包括如在本公开内容中所描述的那样被封装的微电子器件。图5被包括以示出用于本发明的较高层级设备应用的示例。在一个实施例中,系统500包括但不限于台式计算机、膝上型计算机、上网本、平板设备、笔记本计算机、个人数字助理(PDA)、服务器、工作站、蜂窝式电话、移动计算设备、智能电话、因特网器具或任何其它类型的计算设备。在一些实施例中,系统500是芯片上系统(SOC)系统。
在一个实施例中,处理器510具有一个或多个处理核512和512N,其中512N表示在处理器510内部的第N个处理器核,其中N是正整数。在一个实施例中,系统500包括多个处理器,包括510和505,其中处理器505具有与处理器510的逻辑类似或相同的逻辑。在一些实施例中,处理核512包括但不限于用于取出指令的预取逻辑、用于解码指令的解码逻辑、用于执行指令的执行逻辑等等。在一些实施例中,处理器510具有高速缓存存储器516,用于为系统500高速缓存指令和/或数据。高速缓存存储器516可以被组织成分层次的结构,其包括一个或多个层级的高速缓存存储器。
在一些实施例中,处理器510包括存储器控制器514,其可操作以执行功能,所述功能使得处理器510能够访问存储器530并且与之通信,所述存储器530包括易失性存储器532和/或非易失性存储器534。在一些实施例中,处理器510与存储器530和芯片组520耦合。处理器510还可以被耦合到无线天线578,以与被配置成发射和/或接收无线信号的任何设备通信。在一个实施例中,无线天线接口548根据但是不限于以下各项而运作:IEEE 802.11标准及其有关族、家庭插接AV(HPAV)、超宽带(UWB)、蓝牙、WiMax、或任何形式的无线通信协议。
在一些实施例中,易失性存储器532包括但不限于同步动态随机存取存储器(SDRAM)、动态随机存取存储器(DRAM)、RAMBUS动态随机存取存储器(RDRAM)、和/或任何其它类型的随机存取存储器设备。非易失性存储器534包括但不限于闪速存储器、相变存储器(PCM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、或任何其它类型的非易失性存储器设备。
存储器530存储信息和将由处理器510执行的指令。在一个实施例中,存储器530还可以在处理器510执行指令的时候存储临时变量或其它中间信息。在所图示的实施例中,芯片组520经由点对点(PtP或P-P)接口517和522而与处理器510连接。芯片组520使得处理器510能够连接到系统500中的其它元件。在本发明的一些实施例中,接口517和522根据PtP通信协议、诸如Intel® QuickPath Interconnect(快速路径互连)(QPI)等等而运作。在其它实施例中,可以使用不同的互连。
在一些实施例中,芯片组520可操作以与处理器510、505N、显示设备540、和其它设备572、576、574、560、562、564、566、577等等通信。芯片组520还可以被耦合到无线天线578,以与被配置成发射和/或接收无线信号的任何设备通信。
芯片组520经由接口526而连接到显示设备540。显示器540可以是例如液晶显示器(LCD)、等离子体显示器、阴极射线管(CRT)显示器、或任何其它形式的可视显示设备。在本发明的一些实施例中,处理器510和芯片组520被合并到单个SOC中。另外,芯片组520连接到一个或多个总线550和555,其互连各种元件574、560、562、564和566。总线550和555可以经由总线桥572而被互连在一起。在一个实施例中,芯片组520经由接口524和/或504、智能电视576、消费性电子器件577等等而与以下各项耦合:非易失性存储器560、(多个)大容量存储设备562、键盘/鼠标564、以及网络接口566。
在一个实施例中,大容量存储设备562包括但不限于固态驱动器、硬盘驱动器、通用串行总线闪速存储器驱动器、或任何其它形式的计算机数据存储介质。在一个实施例中,网络接口566由任何类型的众所周知的网络接口标准来实现,所述网络接口标准包括但不限于以太网接口、通用串行总线(USB)接口、外围组件互连(PCI)快速接口、无线接口和/或任何其它合适类型的接口。在一个实施例中,无线接口根据但是不限于以下各项而运作:IEEE 802.11标准及其有关族、家庭插接AV(HPAV)、超宽带(UWB)、蓝牙、WiMax、或任何形式的无线通信协议。
虽然图5中所示的模块被描绘为系统500内分立的块,但是由这些块中的一些所执行的功能可以被集成在单个半导体电路内或可以通过使用两个或更多分离的集成电路来被实现。例如,尽管高速缓存存储器516被描绘为处理器510内分离的块,但是高速缓存存储器516(或516的所选方面)可以被并入到处理器核512中。
为了更好地说明本文中所述的方法和装置,在以下阐明示例实施例的非限制性集合,作为用数字标识的示例:
示例1是一种微电子器件,其包括:第一半导体管芯,所述第一半导体管芯具有以相对于彼此的第一节距的接触部的第一群组,以及以相对于彼此的第二节距的接触部的第二群组,所述第二节距小于所述第一节距;重分布层,其具有耦合到第一半导体管芯的第一侧;以及 在重分布层的与第一半导体管芯相对侧上的第二半导体管芯,所述第二半导体器件具有以第二节距的接触部的第三群组,所述接触部的第三群组的接触部耦合到接触部的第二群组的相应接触部。
在示例2中,示例1的主题可选地包括:所述第二半导体器件此外包括在接触部的第三群组外部的至少一个附加接触部。
在示例3中,示例2的主题可选地包括被耦合到重分布层的接触部的附加接触部,其在第一半导体管芯的占用空间之外。
在示例4中,示例2-3中任何一个或多个的主题可选地包括:接触部的第一和第二群组中的至少一个具有沿着第一半导体管芯的X和Y维度二者延伸的接触部的阵列。
在示例5中,示例1-4中任何一个或多个的主题可选地包括:所述重分布层将接触部的第一群组中的至少一些接触部耦合到在第一半导体管芯的占用空间之外的相应位置。
在示例6中,示例1-5中任何一个或多个的主题可选地包括经模塑的结构,所述经模塑的结构支撑重分布层并且密封第一半导体管芯。
在示例7中,示例1-6中任何一个或多个的主题可选地包括:所述重分布层具有多个层级的导电迹线。
示例8是一种用于微电子器件的封装,其包括:第一半导体管芯,所述第一半导体管芯具有以在X和Y方向二者上相对于彼此的第一节距的接触部的第一群组,以及以在X和Y方向二者上相对于彼此的第二节距的接触部的第二群组,所述第二节距小于所述第一节距;在第一半导体管芯之上延伸的经模塑的结构;重分布层,其具有第一侧,所述第一侧耦合到第一半导体管芯并且至少部分地由经模塑的结构所支撑;以及在重分布层的与第一半导体管芯相对的侧上延伸的第二半导体管芯,所述第二半导体管芯具有接触部的第三群组,所述接触部的第三群组的接触部以在X和Y方向二者上的第二节距来被布置,并且被耦合到接触部的第二群组的相应接触部。
在示例9中,示例8的主题可选地包括:所述重分布层包括接触球,并且其中所述接触部的第一群组的接触部中的至少一部分通过重分布层而被连接到横向超出第一半导体管芯的横向尺寸的相应接触球。
在示例10中,示例8-9中任一个的主题可选地包括:所述重分布层包括接触球,并且其中所述接触部的第一群组的接触部中的至少一部分通过重分布层而被连接到横向超出第一半导体管芯的横向尺寸的相应接触球,并且所述接触球位于重分布层的与第二半导体管芯相同的侧上。
在示例11中,示例8-10中任何一个或多个的主题可选地包括:所述第二半导体管芯包括在接触部的第三群组之外的至少一个附加接触部,并且其中所述至少一个附加接触部耦合到重分布层中的接触部。
在示例12中,示例11的主题可选地包括其中一个附加接触部被耦合以仅仅提供与重分布层的机械连接的情况。
在示例13中,示例8-12中任何一个或多个的主题可选地包括:所述重分布层具有多个层级的导体。
在示例14中,示例8-13中任何一个或多个的主题可选地包括:所述接触部的第二群组的接触部通过被形成在第一和第二半导体管芯中每一个上的铜支柱而被耦合到接触部的第三群组的相应接触部。
在示例15中,示例8-14中任何一个或多个的主题可选地包括:接触部的第二群组的节距不多于接触部的第一群组的节距的近似70%。
在示例16中,示例8-15中任何一个或多个的主题可选地包括:接触部的第二群组的节距不多于接触部的第一群组的节距的近似50%。
示例17是一种微电子器件,其包括:第一半导体管芯,所述第一半导体管芯具有以相对于彼此的第一节距的接触部的第一群组,以及以相对于彼此的第二节距的接触部的第二群组,所述第二节距小于所述第一节距;用于将第一半导体管芯的接触部的第一群组耦合到重分布层的第一侧的构件;以及用于将第二半导体管芯耦合到第一半导体管芯的接触部的第二群组的构件,所述第二半导体管芯位于重分布层的与第一半导体管芯相对的侧上。
在示例18中,示例17的主题可选地包括用于将第二半导体管芯耦合到接触部的第二群组、包括第二半导体管芯上的接触部的第三群组的构件,所述接触部的第三群组以相对于彼此的第二节距而被布置;并且其中所述接触部的第二和第三群组中至少一个的接触部包括金属支柱,其建立与接触部的其它集合的电通信。
在示例19中,示例18的主题可选地包括:接触部的第二和第三群组二者的接触部包括铜支柱。
在示例20中,示例17-19中任何一个或多个的主题可选地包括:所述重分布层具有接触球以接合支撑结构,所述接触球中的至少一些电耦合到接触部的第一群组的相应接触部。
在示例21中,示例19-20中任何一个或多个的主题可选地包括:所述金属支柱延伸通过重分布层中的分离以接合接触部的其它集合。
示例22是一种用于形成微电子器件封装的方法,包括:在第一半导体管芯之上形成经模塑的结构,其中所述管芯包括接触部的第一和第二群组,其中所述第一和第二群组中每一个的接触部分别以第一和第二节距来被布置,并且其中所述第二群组的接触部是以比第一群组的接触部更细的节距;在经模塑的结构的至少一部分以及第一半导体管芯之上形成重分布层;以及将第二半导体管芯耦合到第一半导体管芯,所述第二半导体管芯在重分布层的与第一半导体管芯相对的侧上,其中所述第二半导体管芯包括以与第二群组的接触部相同的节距而被布置的接触部的第三群组,并且其中所述第二半导体管芯被耦合到第一半导体管芯,这至少部分地通过将第三群组的接触部结合到第二群组的相应接触部。
在示例23中,示例22的主题可选地包括将第三群组的接触部结合到第二群组的相应接触部,其包括将在第二群组的接触部与第三群组的接触部二者上形成的铜支柱结合在一起。
在示例24中,示例22-23中任何一个或多个的主题可选地包括:所述第二半导体管芯包括在接触部的第三群组之外的至少一个附加接触部,并且其中所述附加接触部被结合到重分布层上的接触部。
在示例25中,示例22-24中任何一个或多个的主题可选地包括将底部填充材料安置在第二半导体管芯与重分布层之间。
在示例26中,示例22-25中任何一个或多个的主题可选地包括在第二半导体管芯之上形成密封剂材料。
在示例27中,示例22-26中任何一个或多个的主题可选地包括:接触部的第一和第二群组中的至少一个包括在第一半导体管芯上在X和Y方向二者中延伸的接触部的阵列。
在示例28中,示例22-27中任何一个或多个的主题可选地包括在重分布层的接触部上形成接触球。
在示例29中,示例28的主题可选地包括接触部的第一群组的接触部通过在重分布层中所形成的导电路径而被耦合到相应的接触球。
在示例30中,示例22-29中任何一个或多个的主题可选地包括:接触部的第二群组的节距不多于接触部的第一群组的节距的近似70%。
在示例31中,示例22-30中任何一个或多个的主题可选地包括:接触部的第二群组的节距不多于接触部的第一群组的节距的近似50%。
在示例32中,示例22-31中任何一个或多个的主题可选地包括:该封装是扇出封装。
在示例33中,示例23-32中任何一个或多个的主题可选地包括:来自接触部的第一和第二群组的铜支柱通过使用锡-银(SnAg)层而被结合在一起。
在示例34中,示例23-33中任何一个或多个的主题可选地包括:来自接触部的第二和第三集合的铜支柱不与重分布层形成任何电连接。
示例35是一种电子系统,其包括:微电子器件,其包括第一半导体管芯,所述第一半导体管芯具有以相对于彼此的第一节距的接触部的第一群组,以及以相对于彼此的第二节距的接触部的第二群组,所述第二节距小于所述第一节距;重分布层,其具有耦合到第一半导体管芯的第一侧;以及在重分布层的与第一半导体管芯相对侧上并且于是与第一半导体管芯有部分重叠关系的第二半导体管芯,所述第二半导体器件具有以第二节距的接触部的第三群组,所述接触部的第三群组的接触部耦合到接触部的第二群组的相应接触部;以及可操作地耦合到微电子器件的大容量存储设备和网络接口中的至少一个。
在示例36中,示例35的主题可选地包括:所述第二半导体器件此外包括在接触部的第三群组外部的至少一个附加接触部。
在示例37中,示例34-36中任一个的主题可选地包括:所述第二半导体器件此外包括在接触部的第三群组之外的至少一个附加接触部,并且所述附加接触部被耦合到重分布层中的接触部。
在示例38中,示例37的主题可选地包括:所述第二半导体器件此外包括在接触部的第三群组之外的至少一个附加接触部,并且所述附加接触部在第一半导体管芯的占用空间之外。
以上具体实施例包括对附图的参考,所述附图形成具体实施例的一部分。附图作为图示而示出其中可以实践本发明的特定实施例。这些实施例在本文中还被称为“示例”。这样的示例可以包括除了所示或所述的那些之外的元素。然而,本发明人还设想其中仅仅提供所示出或所描述的那些元素的示例。此外,本发明人还设想如下示例:所述示例使用要么关于特定示例(或其一个或多个方面)要么关于本文中所示或所述的其它示例(或其一个或多个方面)所示或所述的那些元素(或其一个或多个方面)的任何组合或置换。
在本文档中,术语“一”或“一个”被使用,如在专利文献中常见的那样,用于包括一个或多于一个,其独立于“至少一个”或“一个或多个”的任何其它实例或使用。在本文档中,术语“或”用于指代非排他性的或,使得“A或B”包括“A但不是B”、“B但不是A”以及“A和B”,除非另行指示。在本文档中,术语“包括”和“其中”被用作相应术语“包括有”和“其中有”的简明英语等同物。而且,在以下权利要求中,术语“包括”和“包含”是开端的,也就是说,包括除了在权利要求中这样的术语之后所列出的那些之外的元素的系统、设备、物品、组分、配方或过程仍被视为落入该权利要求的范围内。此外,在以下权利要求中,术语“第一”、“第二”和“第三”等等仅仅被用作标签,并且不意图强加关于它们的对象的数字要求。以上描述意图是说明性的,而不是限制性的。例如,上述示例(或其一个或多个方面)可以结合彼此而被使用。可以诸如由本领域普通技术人员在回顾以上描述时使用其它实施例。摘要被提供以遵从37 C.F.R.§1.72(b),用以允许读者快速地弄清技术公开内容的性质。主张的是有如下理解:它将不被用于解释或限制权利要求的范围或含义。而且,以上具体实施方式中,各种特征可以被群组在一起以精简公开内容。这不应当被解释为意图如下:即未被要求保护的公开特征对于任何权利要求是必需的。相反,发明主题可以在于少于特定公开实施例的所有特征。因而,以下权利要求据此被并入到具体实施方式中,其中每个权利要求独立作为分离的实施例,并且设想的是:这样的实施例可以用各种组合或置换而与彼此组合。本发明的范围应当参考所附权利要求、连同这样的权利要求被授权给的等同物的全范围来被确定。
Claims (25)
1.一种微电子器件,包括:
第一半导体管芯,所述第一半导体管芯具有以相对于彼此的第一节距的接触部的第一群组,以及以相对于彼此的第二节距的接触部的第二群组,所述第二节距小于所述第一节距;
重分布层,其具有耦合到第一半导体管芯的第一侧;以及
在重分布层的与第一半导体管芯相对侧上的第二半导体管芯,所述第二半导体器件具有以第二节距的接触部的第三群组,所述接触部的第三群组的接触部耦合到接触部的第二群组的相应接触部。
2.根据权利要求1所述的微电子器件,其中所述第二半导体器件此外包括在接触部的第三群组外部的至少一个附加接触部。
3.根据权利要求2所述的微电子器件,其中所述附加接触部被耦合到重分布层的接触部,其在第一半导体管芯的占用空间之外。
4.根据权利要求1所述的微电子器件,其中接触部的第一和第二群组中的至少一个包括沿着第一半导体管芯的X和Y维度二者延伸的接触部的阵列。
5.根据权利要求1所述的微电子器件,其中所述重分布层将接触部的第一群组中的至少一些接触部耦合到在第一半导体管芯的占用空间之外的相应位置。
6.根据权利要求1所述的微电子器件,此外包括经模塑的结构,所述经模塑的结构支撑重分布层并且密封第一半导体管芯。
7.根据权利要求1所述的微电子器件,其中所述重分布层包括多个层级的导电迹线。
8.根据权利要求1-7中任一项所述的微电子器件,其中所述重分布层包括接触球,并且其中所述接触部的第一群组的接触部中的至少一部分通过重分布层而被连接到横向超出第一半导体管芯的横向尺寸的相应接触球。
9.根据权利要求8所述的微电子器件,其中所述接触球位于重分布层的与第二半导体管芯相同的侧上。
10.根据权利要求1所述的微电子器件,其中所述第二半导体管芯包括在接触部的第三群组之外的至少一个附加接触部,并且其中所述至少一个附加接触部被耦合到重分布层中的接触部。
11.根据权利要求1中任何所述的微电子器件,其中所述接触部的第二群组的接触部通过被形成在第一和第二半导体管芯中每一个上的铜支柱而被耦合到接触部的第三群组的相应接触部。
12.根据权利要求1-7中任一项所述的微电子器件,其中接触部的第二群组的节距不多于接触部的第一群组的节距的近似70%。
13.根据权利要求1-7中任一项所述的微电子器件,其中接触部的第二群组的节距不多于接触部的第一群组的节距的近似50%。
14.根据权利要求1-7中任一项所述的微电子器件,此外包括用于将第二半导体管芯的接触部的第三群组耦合到第二半导体管芯的相应接触部的构件。
15.根据权利要求14所述的微电子器件,其中所述用于将第二半导体管芯的接触部的第三群组耦合到第二半导体管芯的相应接触部的构件在接触部的第二和第三群组中至少一个的接触部上包括铜支柱。
16.根据权利要求15所述的微电子器件,其中接触部的第二和第三集合二者的接触部包括铜支柱。
17.一种用于形成微电子器件封装的方法,包括:
在第一半导体管芯之上形成经模塑的结构,
其中所述管芯包括接触部的第一和第二群组,
其中所述第一和第二群组中每一个的接触部相应地以第一和第二节距来被布置,并且
其中第二群组的接触部是以比第一群组的接触部更细的节距;
在经模塑的结构的至少一部分以及第一半导体管芯之上形成重分布层;以及
将第二半导体管芯耦合到第一半导体管芯,所述第二半导体管芯在重分布层的与第一半导体管芯相对的侧上,
其中所述第二半导体管芯包括以与第二群组的接触部相同的节距而被布置的接触部的第三群组,并且
其中所述第二半导体管芯被耦合到第一半导体管芯,这至少部分地通过将第三群组的接触部结合到第二群组的相应接触部。
18.根据权利要求17所述的方法,其中将第三群组的接触部结合到第二群组的相应接触部包括将在第二群组的接触部与第三群组的接触部二者上形成的铜支柱结合在一起。
19.根据权利要求18所述的方法,其中所述第二半导体管芯包括在接触部的第三群组之外的至少一个附加接触部,并且其中所述附加接触部被结合到重分布层上的接触部。
20.根据权利要求17所述的方法,其中接触部的第二群组的节距不多于接触部的第一群组的节距的近似70%。
21.根据权利要求17所述的方法,其中接触部的第二群组的节距不多于接触部的第一群组的节距的近似50%。
22.根据权利要求17所述的方法,其中所述封装是扇出封装。
23.一种电子系统,包括:
微电子器件,包括:
第一半导体管芯,所述第一半导体管芯具有以相对于彼此的第一节距的接触部的第一群组,以及以相对于彼此的第二节距的接触部的第二群组,所述第二节距小于所述第一节距;
重分布层,其具有耦合到第一半导体管芯的第一侧;以及
在重分布层的与第一半导体管芯相对侧上并且于是与第一半导体管芯有部分重叠关系的第二半导体管芯,所述第二半导体器件具有以第二节距的接触部的第三群组,所述接触部的第三群组的接触部耦合到接触部的第二群组的相应接触部;以及
可操作地耦合到微电子器件的大容量存储设备和网络接口中的至少一个。
24.根据权利要求23所述的电子系统,其中所述第二半导体器件此外包括在接触部的第三群组外部的至少一个附加接触部。
25.根据权利要求24所述的电子系统,其中所述附加接触部被耦合到重分布层中的接触部。
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- 2017-08-09 WO PCT/US2017/046027 patent/WO2018063512A1/en active Application Filing
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2019
- 2019-07-08 US US16/505,307 patent/US20190333886A1/en not_active Abandoned
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Also Published As
Publication number | Publication date |
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KR20190050777A (ko) | 2019-05-13 |
US20190333886A1 (en) | 2019-10-31 |
DE112017004978T5 (de) | 2019-06-13 |
US10366968B2 (en) | 2019-07-30 |
KR102617627B1 (ko) | 2023-12-27 |
US20180096970A1 (en) | 2018-04-05 |
WO2018063512A1 (en) | 2018-04-05 |
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