CN109638125B - Flip LED chip and manufacturing method thereof - Google Patents
Flip LED chip and manufacturing method thereof Download PDFInfo
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- CN109638125B CN109638125B CN201811256110.9A CN201811256110A CN109638125B CN 109638125 B CN109638125 B CN 109638125B CN 201811256110 A CN201811256110 A CN 201811256110A CN 109638125 B CN109638125 B CN 109638125B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
Abstract
The invention discloses a flip LED chip and a manufacturing method thereof, and belongs to the technical field of semiconductors. The flip LED chip comprises a substrate, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, a reflecting layer, an insulating layer, a P-type electrode, an N-type bonding pad and a P-type bonding pad; and a second groove extending towards the reflecting layer is formed in the insulating layer between the N-type bonding pad and the P-type bonding pad, the depth of the second groove is smaller than the thickness of the insulating layer, and the distance between the second groove and the N-type bonding pad is not equal to the distance between the second groove and the P-type bonding pad. The conduction of the N-type bonding pad and the P-type bonding pad caused by the fact that solder paste is extruded between the two bonding pads when the bonding pads and the support are bonded can be effectively avoided through the additionally arranged second groove, and the reliability of the flip chip is greatly improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a flip LED chip and a manufacturing method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor Diode that can convert electrical energy into Light energy. As a novel light-emitting device, the LED technology is rapidly developed, the application field is wide, the industrial mobility is strong, the energy-saving potential is great, and the LED light-emitting device meets the requirements of low-carbon ecological economy and the development trend of modern emerging industries. Compared with the traditional electric lighting, the LED lighting has the advantages of energy conservation, environmental protection, long service life, high efficiency and the like, and is considered by various countries to have the most development prospect in the lighting industry.
The chip is the core component of the LED and is divided into a forward mounting structure, an inverted mounting structure and a vertical structure. Compared with the traditional forward chip, the flip chip has the advantages of high current, reliability, simplicity and convenience in use and the like, and is applied in a large scale at present.
The existing flip chip comprises a substrate, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, a light reflecting layer, an insulating layer, a P-type electrode, an N-type bonding pad and a P-type bonding pad. The N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the substrate, and the P-type semiconductor layer is provided with a groove extending to the N-type semiconductor layer. The reflecting layer is laid on the P-type semiconductor layer, and a through hole extending to the P-type semiconductor layer is formed in the reflecting layer. The P-type electrode is arranged on the reflecting layer and extends to the P-type semiconductor layer through the through hole; the N-type electrode is arranged on the N-type semiconductor layer in the groove. The insulating layer is laid in the groove except the region where the N-type electrode is located and on the region of the light reflecting layer except the region where the P-type electrode is located. The P-type pad is disposed on the P-type electrode and the insulating layer around the P-type electrode, and the N-type pad is disposed on the N-type electrode and the insulating layer around the N-type electrode.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
in the packaging process of the flip chip, two bonding pads of an N-type bonding pad and a P-type bonding pad are bonded in a designated area of a support by using solder paste, so that current can be injected into the flip chip through pins on the support. Because the solder paste has certain fluidity, the solder paste is easily extruded between the two bonding pads when the bonding pads and the bracket are bonded, and the N-type bonding pad and the P-type bonding pad are conducted.
Disclosure of Invention
The embodiment of the invention provides a flip LED chip and a manufacturing method thereof, which can solve the problem of conduction of an N-type bonding pad and a P-type bonding pad in the prior art. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides a flip LED chip, where the flip LED chip includes a substrate, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, a reflective layer, an insulating layer, a P-type electrode, an N-type pad, and a P-type pad; the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the first surface of the substrate, and a first groove extending to the N-type semiconductor layer is formed in the P-type semiconductor layer; the N-type electrode is arranged on the N-type semiconductor layer in the first groove, the P-type electrode is arranged on the P-type semiconductor layer, and the light reflecting layer is arranged on the region of the P-type semiconductor layer except the region where the P-type electrode is arranged; the insulating layer is laid in the first groove and on the light reflecting layer, and a first through hole extending to the P-type electrode and a second through hole extending to the N-type electrode are formed in the insulating layer; the N-type bonding pad and the P-type bonding pad are arranged on the insulating layer at intervals, the P-type bonding pad extends to the P-type electrode through the first through hole, and the N-type bonding pad extends to the N-type electrode through the second through hole;
and a second groove extending towards the reflecting layer is formed in the insulating layer between the N-type bonding pad and the P-type bonding pad, the depth of the second groove is smaller than the thickness of the insulating layer, and the distance between the second groove and the N-type bonding pad is not equal to the distance between the second groove and the P-type bonding pad.
In a possible implementation manner of the embodiment of the present invention, a third groove extending to the N-type semiconductor layer is disposed on the P-type semiconductor layer, a projection of the second groove on the first surface coincides with a projection of the third groove on the first surface, and a depth of the second groove is equal to a depth of the third groove.
Optionally, the depth of the third groove is equal to the depth of the first groove.
Preferably, the depth of the second groove is 1 μm to 2 μm.
Optionally, a distance between the second groove and the N-type pad is smaller than a distance between the second groove and the P-type pad.
Preferably, the distance between the second groove and the N-type pad is 5-100 μm.
Optionally, the width of the second groove is 10 μm to 50 μm.
In another possible implementation manner of the embodiment of the present invention, a fourth groove communicated with the first through hole and a fifth groove communicated with the second through hole are formed in the insulating layer; the P-type bonding pad is arranged in the fourth groove, and the thickness of the P-type bonding pad is equal to the sum of the depth of the fourth groove and the length of the first through hole; the N-type bonding pad is arranged in the fifth groove, and the thickness of the N-type bonding pad is equal to the sum of the depth of the fifth groove and the length of the second through hole.
Optionally, the depth of the fourth groove is equal to the depth of the second groove, and the depth of the fifth groove is equal to the depth of the second groove.
In another aspect, an embodiment of the present invention provides a method for manufacturing a flip LED chip, where the method includes:
growing an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the first surface of the substrate in sequence;
forming a first groove extending to the N-type semiconductor layer on the P-type semiconductor layer;
forming a light reflecting layer on the P-type semiconductor layer;
arranging an N-type electrode on the N-type semiconductor layer in the first groove, and arranging a P-type electrode on the region of the P-type semiconductor layer except the region where the light reflecting layer is arranged;
forming an insulating layer in the first groove and on the light reflecting layer, wherein the insulating layer is provided with a first through hole extending to the P-type electrode, a second through hole extending to the N-type electrode and a second groove extending to the light reflecting layer, the depth of the second groove is smaller than the thickness of the insulating layer, the second groove is positioned between the first through hole and the second through hole, and the distance between the second groove and the first through hole is not equal to the distance between the second groove and the second through hole;
n type pad and P type pad are set up at the interval on the insulating layer, P type pad passes through first through-hole extends to P type electrode, N type pad passes through the second through-hole extends to N type electrode.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
and a second groove extending towards the reflecting layer is formed in the insulating layer between the N-type bonding pad and the P-type bonding pad, so that solder paste extruded between the two bonding pads when the bonding pads and the support are bonded flows into the second groove. Because the depth of the second groove is smaller than the thickness of the insulating layer, the insulating layer is arranged at the bottom of the second groove, and the conduction of the solder paste in the second groove and the conductive material can be avoided. Meanwhile, the distance between the second groove and the N-type bonding pad is not equal to the distance between the second groove and the P-type bonding pad, so that the condition that solder paste extruded from the two bonding pads flows into the second groove and is conducted due to the fact that the second groove is arranged in the middle of the two bonding pads can be prevented. In conclusion, the second groove additionally arranged in the embodiment of the invention can effectively prevent the solder paste from being extruded between the two bonding pads when bonding the bonding pads and the bracket to cause the conduction of the N-type bonding pad and the P-type bonding pad, thereby greatly improving the reliability of the flip chip.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a flip LED chip according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of another flip LED chip provided in the embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing a flip LED chip according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a flip LED chip formed after step 201 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 5 is a schematic structural diagram of a flip LED chip formed after step 202 is performed according to the manufacturing method provided by the embodiment of the invention;
fig. 6 is a schematic structural diagram of a flip LED chip formed after step 203 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 7 is a schematic structural diagram of a flip LED chip formed after step 204 is performed according to the manufacturing method provided by the embodiment of the invention;
fig. 8 is a schematic structural diagram of a flip LED chip formed after step 205 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 9 is a schematic structural diagram of a flip LED chip formed after step 206 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 10 is a schematic structural diagram of a flip LED chip formed after step 301 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 11 is a schematic structural diagram of a flip LED chip formed after step 302 is performed according to the manufacturing method provided in the embodiment of the invention;
fig. 12 is a schematic structural diagram of a flip LED chip formed after step 303 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 13 is a schematic structural diagram of a flip LED chip formed after step 304 is performed according to the manufacturing method provided in the embodiment of the invention;
fig. 14 is a schematic structural diagram of a flip LED chip formed after step 305 is performed according to the manufacturing method provided by the embodiment of the invention;
fig. 15 is a schematic structural diagram of a flip LED chip formed after step 306 is executed in the manufacturing method according to the embodiment of the invention;
fig. 16 is a schematic structural diagram of a flip LED chip formed after step 401 is performed according to the manufacturing method provided by the embodiment of the invention;
fig. 17 is a schematic structural diagram of a flip LED chip formed after step 402 is performed according to the manufacturing method provided in the embodiment of the invention;
fig. 18 is a schematic structural diagram of a flip LED chip formed after step 403 is performed in the manufacturing method according to the embodiment of the present invention;
fig. 19 is a schematic structural diagram of a flip LED chip formed after step 404 is performed according to the manufacturing method provided by the embodiment of the invention;
fig. 20 is a schematic structural diagram of a flip LED chip formed after step 405 is performed according to the manufacturing method provided in the embodiment of the invention;
fig. 21 is a schematic structural diagram of a flip LED chip formed after step 406 is performed according to the manufacturing method provided by the embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The embodiment of the invention provides a flip LED chip. Fig. 1 is a schematic structural diagram of a flip LED chip according to an embodiment of the present invention. Referring to fig. 1, the flip LED chip includes a substrate 10, an N-type semiconductor layer 21, an active layer 22, a P-type semiconductor layer 23, a light reflecting layer 30, an insulating layer 40, a P-type electrode 51, an N-type electrode 52, an N-type pad 53, and a P-type pad 54. An N-type semiconductor layer 21, an active layer 22, and a P-type semiconductor layer 23 are sequentially stacked on the first surface of the substrate 10, and a first groove 100 extending to the N-type semiconductor layer 21 is formed on the P-type semiconductor layer 23. The N-type electrode 52 is disposed on the N-type semiconductor layer 21 in the first recess 100, the P-type electrode 51 is disposed on the P-type semiconductor layer 23, and the light reflecting layer 30 is on the P-type semiconductor layer 23 except for a region where the P-type electrode 51 is located. The insulating layer 40 is laid in the first groove 100 and on the light reflecting layer 30, and the insulating layer 40 is provided with a first via 200 extending to the P-type electrode 51 and a second via 300 extending to the N-type electrode 52. An N-type pad 53 and a P-type pad 54 are disposed on the insulating layer 40 at an interval, the P-type pad 54 extends to the P-type electrode 51 through the first via 200, and the N-type pad 53 extends to the N-type electrode 52 through the second via 300.
In the present embodiment, as shown in fig. 1, a second groove 400 extending toward the light reflecting layer 30 is disposed on the insulating layer 40 between the N-type pad 53 and the P-type pad 54, a depth d1 of the second groove 400 is smaller than a thickness d2 of the insulating layer 40, and a distance s1 between the second groove 400 and the N-type pad 53 is not equal to a distance s2 between the second groove 400 and the P-type pad 54.
In practical applications, the distance s1 between the second groove 400 and the N-type pad 53 may be smaller than the distance s2 between the second groove 400 and the P-type pad 54, and may also be larger than the distance s2 between the second groove 400 and the P-type pad 54. It should be noted that fig. 1 only illustrates that the distance s1 between the second groove 400 and the N-type pad 53 is smaller than the distance s2 between the second groove 400 and the P-type pad 54, and the invention is not limited thereto.
According to the embodiment of the invention, the second groove extending towards the reflecting layer is formed in the insulating layer between the N-type bonding pad and the P-type bonding pad, so that the solder paste extruded between the two bonding pads flows into the second groove when the bonding pads and the support are bonded. Because the depth of the second groove is smaller than the thickness of the insulating layer, the insulating layer is arranged at the bottom of the second groove, and the conduction of the solder paste in the second groove and the conductive material can be avoided. Meanwhile, the distance between the second groove and the N-type bonding pad is not equal to the distance between the second groove and the P-type bonding pad, so that the condition that solder paste extruded from the two bonding pads flows into the second groove and is conducted due to the fact that the second groove is arranged in the middle of the two bonding pads can be prevented. In conclusion, the second groove additionally arranged in the embodiment of the invention can effectively prevent the solder paste from being extruded between the two bonding pads when bonding the bonding pads and the bracket to cause the conduction of the N-type bonding pad and the P-type bonding pad, thereby greatly improving the reliability of the flip chip. And the realization process is simple and is suitable for industrial production.
In one implementation manner of the present embodiment, as shown in fig. 1, a third groove 500 extending to the N-type semiconductor layer 21 may be disposed on the P-type semiconductor layer 23, a projection of the second groove 400 on the first surface coincides with a projection of the third groove 500 on the first surface, and a depth d1 of the second groove 400 is equal to a depth d3 of the third groove 500.
The third groove is formed in the P-type semiconductor layer in advance, and the reflective layer and the insulating layer are sequentially formed on the P-type semiconductor layer, so that the second groove is naturally formed on the insulating layer by utilizing the height difference between the third groove and other parts of the P-type semiconductor layer, and the position of the second groove can be accurately set.
In practical application, the third groove 500 extending to the N-type semiconductor layer 21 may not be formed on the P-type semiconductor layer 23, and at this time, the insulating layer may be patterned by using a photolithography technique and an etching technique to directly form the second groove, so that the implementation manner is more intuitive.
Alternatively, as shown in fig. 2, the depth d3 of the third groove 500 may be equal to the depth d4 of the first groove 100. The third groove and the first groove can be formed by adopting a photoetching process, so that the realization cost is greatly reduced.
Preferably, the depth d1 of the second groove 400 may be 1 μm to 2 μm. If the depth of the second groove is less than 1 μm, it may be impossible to effectively receive the solder paste squeezed between the pads when bonding the pads and the frame due to the small depth of the second groove; if the depth of the second recess is greater than 2 μm, the thickness of the insulating layer may be greater due to the greater depth of the second recess, which increases the production cost and may also cause epitaxial electrical anomalies.
Alternatively, as shown in fig. 2, a distance s1 between the second groove 400 and the N-type pad 53 may be smaller than a distance s2 between the second groove 400 and the P-type pad 54. The second groove is arranged close to the N-type welding disc, the third groove is also arranged close to the N-type welding disc, the area of the P-type semiconductor layer separated by the third groove can be reduced, and the influence on the light emission of the chip can be avoided as much as possible.
Preferably, the distance s1 between the second groove 400 and the N-type pad 53 may be 5 μm to 100 μm. If the distance between the second groove and the N-type pad is less than 5 μm, the opening of the third groove may be affected due to the smaller distance between the second groove and the N-type pad; if the distance between the second groove and the N-type pad is greater than 100 μm, a large negative effect on chip light emission may be caused due to the large distance between the second groove and the N-type pad.
Alternatively, the width s3 of the second groove 400 may be 10 μm to 50 μm. If the width of the second groove is less than 10 μm, the solder paste extruded between the pads when bonding the pads and the frame may not be effectively accommodated due to the small width of the second groove, and the manufacturing difficulty may be increased; if the width of the second groove is greater than 50 μm, the solder paste extruded from the two pads may flow into the second groove due to the greater width of the second groove to be conducted, and the light emitting area may be reduced, which may adversely affect the brightness.
Fig. 2 is a schematic structural diagram of another flip LED chip according to an embodiment of the present invention. Referring to fig. 2, in another implementation manner of the present embodiment, the insulating layer 40 may be provided with a fourth groove 600 communicating with the first through hole 200, and a fifth groove 700 communicating with the second through hole 300; the P-type pad 54 is disposed in the fourth groove 600, and the thickness d5 of the P-type pad 54 is equal to the sum of the depth d6 of the fourth groove 600 and the length d7 of the first via 200; the N-type pad 53 is disposed in the fifth groove 700, and a thickness d8 of the N-type pad 700 is equal to a sum of a depth d9 of the fifth groove 700 and a length d10 of the second via 300. Through setting up P type pad and N type pad inside insulating, can further avoid the tin cream to be extruded when bonding pad and support between two pads and lead to N type pad and P type pad conduction, improve flip chip's reliability.
Alternatively, the depth d6 of the fourth groove 600 may be equal to the depth of the second groove 400, and the depth d9 of the fifth groove 700 may be equal to the depth of the second groove 400. The fourth groove, the fifth groove and the second groove can be formed by adopting a photoetching process, so that the implementation cost is greatly reduced.
In practical applications, the number of the second grooves 400 may be one or more. For example, the number of the second grooves 400 in fig. 2 is two, the distance between one second groove 400 and the N-type pad 53 is smaller than the distance between the second groove 400 and the P-type pad 54, and the distance between the other second groove 400 and the N-type pad 53 is larger than the distance between the second groove 400 and the P-type pad 54.
Specifically, the material of the substrate 10 may be Sapphire, and is preferably a Patterned Sapphire Substrate (PSS). The material of the N-type semiconductor layer 21 may be N-type doped (e.g., silicon) gan. The active layer 22 may include a plurality of quantum wells and a plurality of quantum barriers, which are alternately stacked; the quantum well can be made of indium gallium nitride, and the quantum barrier can be made of gallium nitride. The P-type semiconductor layer 23 may be made of P-type doped (e.g., mg) gan. The reflective layer 30 may be a metal reflective layer formed of a metal material such as silver and aluminum, and may also be a Distributed Bragg Reflector (DBR). The material of the insulating layer 40 may be silicon dioxide (SiO)2) Or silicon nitride (SiN). The P-type electrodes 51, the N-type electrodes 52, the P-type pads 53, and the N-type pads 54 may be made of one or more of gold (Au), aluminum (Al), copper (Cu), nickel (Ni), platinum (Pt), chromium (Cr), and titanium (Ti).
Optionally, the flip LED chip may further include a transparent conductive film disposed on the P-type semiconductor layer. Furthermore, the transparent conductive film can be made of Indium Tin Oxide (ITO).
The embodiment of the invention provides a manufacturing method of a flip LED chip, which is suitable for manufacturing the flip LED chip shown in figure 1 or figure 2. Fig. 3 is a flowchart of a method for manufacturing a flip LED chip according to an embodiment of the present invention. Referring to fig. 3, the manufacturing method includes:
step 201: an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially grown on the first surface of the substrate.
Fig. 4 is a schematic structural diagram of a flip LED chip formed after step 201 is performed in the manufacturing method according to the embodiment of the present invention. Where 10 denotes a substrate, 21 denotes an N-type semiconductor layer, 22 denotes an active layer, and 23 denotes a P-type semiconductor layer. Referring to fig. 4, an N-type semiconductor layer 21, an active layer 22, and a P-type semiconductor layer 23 are sequentially stacked on one surface of a substrate 10.
Specifically, the step 201 may include:
an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially grown on a substrate by using a Metal Organic Chemical Vapor Deposition (MOCVD) technology.
Step 202: a first groove extending to the N-type semiconductor layer is formed in the P-type semiconductor layer.
Fig. 5 is a schematic structural diagram of a flip LED chip formed after step 202 is executed in the manufacturing method according to the embodiment of the present invention. Wherein 100 denotes a first groove. Referring to fig. 5, the first groove 100 extends from the P-type semiconductor layer 23 to the N-type semiconductor layer 21.
Specifically, this step 202 may include:
forming photoresist with a certain pattern on the P-type semiconductor layer by adopting a photoetching technology, wherein the photoresist is arranged on the region of the P-type semiconductor layer except the region where the first groove is located;
dry etching the P-type semiconductor layer and the active layer which are not covered by the photoresist by adopting an inductively Coupled Plasma etching (ICP) device to form a first groove;
and removing the photoresist.
In a specific implementation, the forming of the patterned photoresist by using the photolithography technique may include:
laying a layer of photoresist;
exposing the photoresist through a mask plate with a certain pattern;
and soaking the exposed photoresist in a developing solution to dissolve part of the photoresist, wherein the remained photoresist is the photoresist with the required pattern.
Step 203: and forming a light reflecting layer on the P-type semiconductor layer.
Fig. 6 is a schematic structural diagram of a flip LED chip formed after step 203 is executed in the manufacturing method according to the embodiment of the present invention. Wherein 30 denotes a light reflecting layer. Referring to fig. 6, the light reflecting layer 30 is disposed on a partial region of the P-type semiconductor layer 23.
Alternatively, when the light reflecting layer is a metal reflecting layer, the step 203 may include:
forming photoresist with a certain pattern in the first groove and on the P-type semiconductor layer by adopting a photoetching technology, wherein the photoresist is arranged in the first groove and on the region of the P-type semiconductor layer except the region where the light reflecting layer is arranged;
laying a metal material on the photoresist and the P-type semiconductor layer by adopting a Physical Vapor Deposition (PVD for short);
and removing the photoresist and the metal material laid on the photoresist, and forming a light reflecting layer by the remaining metal material.
Alternatively, when the light reflecting layer is a DBR, the step 203 may include:
forming DBRs in the first groove and on the P-type semiconductor layer by adopting a PVD technology;
forming a photoresist with a certain pattern on the DBR by adopting a photoetching technology, wherein the photoresist is arranged on a region except the region where the reflecting layer is arranged;
dry etching the DBR not covered by the photoresist, and forming a reflecting layer by the remained DBR;
and removing the photoresist.
Step 204: and arranging an N-type electrode on the N-type semiconductor layer in the first groove, and arranging a P-type electrode on the region of the P-type semiconductor layer except the region where the light reflecting layer is arranged.
Fig. 7 is a schematic structural diagram of a flip LED chip formed after step 204 is performed according to the manufacturing method provided by the embodiment of the invention. Wherein 51 denotes a P-type electrode, and 52 denotes an N-type electrode. Referring to fig. 7, the P-type electrode 51 is disposed on the P-type semiconductor layer 23 except for the region where the light reflecting layer 30 is located, and the N-type electrode 52 is disposed on the N-type semiconductor layer 21 within the first recess 100.
Specifically, this step 204 may include:
forming photoresist with a certain pattern in the first groove and on the reflecting layer by adopting a photoetching technology, wherein the photoresist is arranged in the first groove except for the region where the N-type electrode is arranged;
metal materials are paved on the photoresist, the N-type semiconductor layer and the P-type semiconductor layer by adopting a PVD (physical vapor deposition) technology;
and removing the photoresist and the metal material laid on the photoresist, wherein the metal material on the N-type semiconductor layer forms an N-type electrode, and the metal material on the P-type semiconductor layer forms a P-type electrode.
Step 205: and an insulating layer is formed in the first groove and on the light reflecting layer, a first through hole extending to the P-type electrode, a second through hole extending to the N-type electrode and a second groove extending to the light reflecting layer are arranged on the insulating layer, the depth of the second groove is smaller than the thickness of the insulating layer, the second groove is positioned between the first through hole and the second through hole, and the distance between the second groove and the first through hole is not equal to the distance between the second groove and the second through hole.
Fig. 8 is a schematic structural diagram of a flip LED chip formed after step 205 is executed in the manufacturing method according to the embodiment of the present invention. Where 40 denotes an insulating layer, 200 denotes a first via hole, 300 denotes a second via hole, and 400 denotes a second groove. Referring to fig. 8, the insulating layer 40 is disposed in the first groove 100 and on the light reflecting layer 30, the first via 200 extends from the insulating layer 40 to the P-type electrode 51, the second via 300 extends from the insulating layer 40 to the N-type electrode 52, and the second groove 400 extends from the insulating layer 40 toward the light reflecting layer 30.
Specifically, the step 205 may include:
laying insulating materials in the first groove, on the light reflecting layer and the P-type electrode by adopting a PVD (physical vapor deposition) technology;
forming a photoresist with a certain pattern on the insulating material by adopting a photoetching technology, wherein the photoresist is arranged on an area except for the area where the first through hole and the second through hole are arranged;
dry etching the insulating material without the photoresist covering to form a first through hole and a second through hole;
removing the photoresist;
forming a photoresist with a certain pattern on the insulating material by adopting a photoetching technology, wherein the photoresist is arranged on the region except the region where the second groove is arranged;
dry etching the insulating material which is not covered by the photoresist to form a second groove, and forming an insulating layer by the remaining insulating material;
and removing the photoresist.
In practical application, the second groove may be formed first, and then the first through hole and the second through hole may be formed.
Step 206: n-type bonding pads and P-type bonding pads are arranged on the insulating layer at intervals, the P-type bonding pads extend to the P-type electrodes through the first through holes, and the N-type bonding pads extend to the N-type electrodes through the second through holes.
Fig. 9 is a schematic structural diagram of a flip LED chip formed after step 206 is performed in the manufacturing method according to the embodiment of the present invention. Where 53 denotes an N-type pad and 54 denotes a P-type pad. Referring to fig. 9, an N-type pad 53 and a P-type pad 54 are spaced apart on the insulating layer 40, the P-type pad 54 extends to the P-type electrode 51 through a first via 200, and the N-type pad 53 extends to the N-type electrode 52 through a second via 300.
Specifically, this step 206 may include:
forming photoresist with a certain pattern on the insulating layer by adopting a photoetching technology, wherein the photoresist is arranged on the region except the region where the N-type bonding pad and the P-type bonding pad are arranged;
metal materials are paved on the photoresist, the insulating layer, the P-type semiconductor layer in the first through hole and the N-type semiconductor layer in the second through hole by adopting a PVD (physical vapor deposition) technology;
and removing the photoresist and the metal material laid on the photoresist, wherein the metal material on the P-type semiconductor layer and the insulating layer around the first through hole forms a P-type bonding pad, and the metal material on the N-type semiconductor layer and the insulating layer around the second through hole forms an N-type bonding pad.
The manufacturing method shown in fig. 3 is modified to provide a manufacturing method particularly suitable for manufacturing the flip LED chip shown in fig. 1. Specifically, the manufacturing method may include:
step 301: an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially grown on the first surface of the substrate.
Fig. 10 is a schematic structural diagram of a flip LED chip formed after step 301 is performed according to the manufacturing method provided by the embodiment of the invention. Where 10 denotes a substrate, 21 denotes an N-type semiconductor layer, 22 denotes an active layer, and 23 denotes a P-type semiconductor layer. Referring to fig. 10, an N-type semiconductor layer 21, an active layer 22, and a P-type semiconductor layer 23 are sequentially stacked on one surface of a substrate 10.
Specifically, step 301 may be the same as step 201 and will not be described in detail herein.
Step 302: a first groove extending to the N-type semiconductor layer and a third groove extending to the N-type semiconductor layer are formed in the P-type semiconductor layer.
Fig. 11 is a schematic structural diagram of a flip LED chip formed after step 302 is performed according to the manufacturing method provided by the embodiment of the invention. Wherein 100 denotes a first groove and 500 denotes a third groove. Referring to fig. 11, the first and third grooves 100 and 500 each extend from the P-type semiconductor layer 23 to the N-type semiconductor layer 21, and the depths of the first and third grooves 100 and 500 are equal.
Specifically, the step 302 may include:
forming photoresist with a certain pattern on the P-type semiconductor layer by adopting a photoetching technology, wherein the photoresist is arranged on the region of the P-type semiconductor layer except the region where the first groove and the third groove are arranged;
etching the P-type semiconductor layer and the active layer which are not covered by the photoresist by adopting an ICP (inductively coupled plasma) device in a dry method to form a first groove and a third groove;
and removing the photoresist.
Step 303: and forming a light reflecting layer on the P-type semiconductor layer.
Fig. 12 is a schematic structural diagram of a flip LED chip formed after step 303 is performed according to the manufacturing method provided by the embodiment of the invention. Wherein 30 denotes a light reflecting layer. Referring to fig. 12, the light reflecting layer 30 is disposed on a partial region of the P-type semiconductor layer 23.
Specifically, the step 303 may be the same as the step 203, and is not described in detail herein.
Step 304: and arranging an N-type electrode on the N-type semiconductor layer in the first groove, and arranging a P-type electrode on the region of the P-type semiconductor layer except the region where the light reflecting layer is arranged.
Fig. 13 is a schematic structural diagram of a flip LED chip formed after step 304 is performed according to the manufacturing method provided by the embodiment of the invention. Wherein 51 denotes a P-type electrode, and 52 denotes an N-type electrode. Referring to fig. 13, the P-type electrode 51 is disposed on the P-type semiconductor layer 23 except for the region where the light reflecting layer 30 is located, and the N-type electrode 52 is disposed on the N-type semiconductor layer 21 within the first recess 100.
Specifically, the step 304 may be the same as the step 204 and will not be described in detail herein.
Step 305: and an insulating layer is formed in the first groove and on the light reflecting layer, a first through hole extending to the P-type electrode, a second through hole extending to the N-type electrode and a second groove extending to the light reflecting layer are arranged on the insulating layer, the depth of the second groove is smaller than the thickness of the insulating layer, the second groove is positioned between the first through hole and the second through hole, and the distance between the second groove and the first through hole is not equal to the distance between the second groove and the second through hole.
Fig. 14 is a schematic structural diagram of a flip LED chip formed after step 305 is performed according to the manufacturing method provided by the embodiment of the invention. Where 40 denotes an insulating layer, 200 denotes a first via hole, 300 denotes a second via hole, and 400 denotes a second groove. Referring to fig. 14, an insulating layer 40 is disposed in the first groove 100 and on the light reflecting layer 30, a first via 200 extends from the insulating layer 40 to the P-type electrode 51, a second via 300 extends from the insulating layer 40 to the N-type electrode 52, and a second groove 400 coincides with a projection of a third groove 500 on the first surface of the substrate 10 and extends in the same direction.
Specifically, this step 305 may include:
laying insulating materials in the first groove, on the light reflecting layer and the P-type electrode by adopting a PVD (physical vapor deposition) technology;
forming a photoresist with a certain pattern on the insulating material by adopting a photoetching technology, wherein the photoresist is arranged on an area except for the area where the first through hole and the second through hole are arranged;
dry etching the insulating material which is not covered by the photoresist to form a first through hole and a second through hole, and forming an insulating layer by the remaining insulating material;
and removing the photoresist.
Step 306: n-type bonding pads and P-type bonding pads are arranged on the insulating layer at intervals, the P-type bonding pads extend to the P-type electrodes through the first through holes, and the N-type bonding pads extend to the N-type electrodes through the second through holes.
Fig. 15 is a schematic structural diagram of a flip LED chip formed after step 306 is executed in the manufacturing method according to the embodiment of the present invention. Where 53 denotes an N-type pad and 54 denotes a P-type pad. Referring to fig. 15, an N-type pad 53 and a P-type pad 54 are spaced apart on an insulating layer 40, the P-type pad 54 extends to a P-type electrode 51 through a first via 200, and the N-type pad 53 extends to an N-type electrode 52 through a second via 300.
Specifically, step 306 may be the same as step 206 and will not be described in detail herein.
Compared with the manufacturing method shown in fig. 2, the manufacturing method can avoid the need of separately adopting one photoetching process to form the second groove, reduce the times of the photoetching process and reduce the implementation cost.
The manufacturing method shown in fig. 3 is modified to provide a manufacturing method particularly suitable for manufacturing the flip LED chip shown in fig. 2. Specifically, the manufacturing method may include:
step 401: an N-type semiconductor layer, an active layer and a P-type semiconductor layer are sequentially grown on the first surface of the substrate.
Fig. 16 is a schematic structural diagram of a flip LED chip formed after step 401 is executed in the manufacturing method according to the embodiment of the present invention. Where 10 denotes a substrate, 21 denotes an N-type semiconductor layer, 22 denotes an active layer, and 23 denotes a P-type semiconductor layer. Referring to fig. 16, an N-type semiconductor layer 21, an active layer 22, and a P-type semiconductor layer 23 are sequentially stacked on one surface of a substrate 10.
Specifically, the step 401 may be the same as the step 201, and is not described in detail here.
Step 402: a first groove extending to the N-type semiconductor layer is formed in the P-type semiconductor layer.
Fig. 17 is a schematic structural diagram of a flip LED chip formed after step 402 is performed according to the manufacturing method provided in the embodiment of the present invention. Wherein 100 denotes a first groove. Referring to fig. 17, the first groove 100 extends from the P-type semiconductor layer 23 to the N-type semiconductor layer 21.
Specifically, the step 402 may be the same as the step 202, and is not described in detail herein.
Step 403: and forming a light reflecting layer on the P-type semiconductor layer.
Fig. 18 is a schematic structural diagram of a flip LED chip formed after step 403 is performed according to the manufacturing method provided by the embodiment of the invention. Wherein 30 denotes a light reflecting layer. Referring to fig. 18, the light reflecting layer 30 is disposed on a partial region of the P-type semiconductor layer 23.
Specifically, the step 403 may be the same as the step 203, and is not described in detail here.
Step 404: and arranging an N-type electrode on the N-type semiconductor layer in the first groove, and arranging a P-type electrode on the region of the P-type semiconductor layer except the region where the light reflecting layer is arranged.
Fig. 19 is a schematic structural diagram of a flip LED chip formed after step 404 is performed according to the manufacturing method provided by the embodiment of the invention. Wherein 51 denotes a P-type electrode, and 52 denotes an N-type electrode. Referring to fig. 19, the P-type electrode 51 is disposed on the P-type semiconductor layer 23 except for the region where the light reflecting layer 30 is located, and the N-type electrode 52 is disposed on the N-type semiconductor layer 21 within the first recess 100.
Specifically, the step 404 may be the same as the step 204 and will not be described in detail herein.
Step 405: and an insulating layer is formed in the first groove and on the light reflecting layer, a first through hole extending to the P-type electrode, a fourth groove communicated with the first through hole, a second through hole extending to the N-type electrode, a fifth groove communicated with the second through hole and a second groove extending to the light reflecting layer are arranged on the insulating layer, the depth of the second groove is smaller than the thickness of the insulating layer, the second groove is positioned between the first through hole and the second through hole, and the distance between the second groove and the first through hole is not equal to the distance between the second groove and the second through hole.
Fig. 20 is a schematic structural diagram of a flip LED chip formed after step 405 is performed according to the manufacturing method provided by the embodiment of the invention. Where 40 denotes an insulating layer, 200 denotes a first via hole, 300 denotes a second via hole, 400 denotes a second groove, 600 denotes a fourth groove, and 700 denotes a fifth groove. Referring to fig. 20, the insulating layer 40 is disposed in the first groove 100 and on the light reflecting layer 30, the insulating layer 40 is provided with a second groove 400, a fourth groove 600, and a fifth groove 700 extending toward the light reflecting layer 30, the first via 200 extends from the second groove 400 to the P-type electrode 51, and the second via 300 extends from the fifth groove 700 to the N-type electrode 52.
Specifically, this step 405 may include:
laying insulating materials in the first groove, on the light reflecting layer and the P-type electrode by adopting a PVD (physical vapor deposition) technology;
forming a photoresist with a certain pattern on the insulating material by adopting a photoetching technology, wherein the photoresist is arranged on an area except for the area where the first through hole and the second through hole are arranged;
dry etching the insulating material without the photoresist covering to form a first through hole and a second through hole;
removing the photoresist;
forming photoresist with a certain pattern on the insulating material by adopting a photoetching technology, wherein the photoresist is arranged on the region except the region where the second groove, the fourth groove and the fifth groove are arranged;
dry etching the insulating material which is not covered by the photoresist to form a second groove, a fourth groove and a fifth groove, and forming an insulating layer by the remaining insulating material;
and removing the photoresist.
In practical application, the second groove, the fourth groove and the fifth groove may be formed first, and then the first through hole and the second through hole may be formed.
Step 406: and forming a P-type welding disc in the fourth groove, wherein the P-type welding disc extends to the P-type electrode through the first through hole, forming an N-type welding disc in the fifth groove, and the N-type welding disc extends to the N-type electrode through the second through hole.
Fig. 21 is a schematic structural diagram of a flip LED chip formed after step 406 is performed according to the manufacturing method provided by the embodiment of the invention. Where 53 denotes an N-type pad and 54 denotes a P-type pad. Referring to fig. 21, the P-type pad 54 is disposed in the fourth groove 600 and extends to the P-type electrode 51 through the first via 200, and the thickness of the P-type pad 54 is equal to the sum of the depth of the fourth groove 600 and the length of the first via 200; the N-type pad 53 is disposed in the fifth groove and extends to the N-type electrode 52 through the second via 300, and the thickness of the N-type pad 53 is equal to the sum of the depth of the fifth groove 700 and the length of the second via 300.
Specifically, this step 406 may include:
forming a photoresist with a certain pattern on the insulating layer by adopting a photoetching technology, wherein the photoresist is arranged on the region except the region where the fourth groove and the fifth groove are arranged;
metal materials are paved on the photoresist, the insulating layer, the P-type semiconductor layer in the first through hole and the N-type semiconductor layer in the second through hole by adopting a PVD (physical vapor deposition) technology;
and removing the photoresist and the metal material laid on the photoresist, wherein the metal material in the fourth groove forms a P-type bonding pad, and the metal material in the fifth groove forms an N-type bonding pad.
Compared with the manufacturing method shown in fig. 2, the manufacturing method has the advantages that the fourth groove and the fifth groove are formed simultaneously by utilizing the photoetching process for forming the second groove, the P-type welding disc is placed in the fourth groove, and the N-type welding disc is placed in the fifth groove, so that the condition that the N-type welding disc is conducted with the P-type welding disc due to the fact that solder paste is extruded between the two welding discs when the welding discs and the support are bonded can be further avoided.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A flip LED chip comprises a substrate, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, a reflecting layer, an insulating layer, a P-type electrode, an N-type bonding pad and a P-type bonding pad; the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the first surface of the substrate, and a first groove extending to the N-type semiconductor layer is formed in the P-type semiconductor layer; the N-type electrode is arranged on the N-type semiconductor layer in the first groove, the P-type electrode is arranged on the P-type semiconductor layer, and the light reflecting layer is arranged on the region of the P-type semiconductor layer except the region where the P-type electrode is arranged; the insulating layer is laid in the first groove and on the light reflecting layer, and a first through hole extending to the P-type electrode and a second through hole extending to the N-type electrode are formed in the insulating layer; the N-type bonding pad and the P-type bonding pad are arranged on the insulating layer at intervals, the P-type bonding pad extends to the P-type electrode through the first through hole, and the N-type bonding pad extends to the N-type electrode through the second through hole;
the LED lamp is characterized in that a second groove extending towards the light reflecting layer is formed in the insulating layer between the N-type welding disc and the P-type welding disc, the depth of the second groove is smaller than the thickness of the insulating layer, the distance between the second groove and the N-type welding disc is not equal to the distance between the second groove and the P-type welding disc, and the distance between the second groove and the N-type welding disc and the distance between the second groove and the P-type welding disc are both larger than 0.
2. The flip LED chip of claim 1, wherein a third groove extending to the N-type semiconductor layer is formed on the P-type semiconductor layer, a projection of the second groove on the first surface coincides with a projection of the third groove on the first surface, and a depth of the second groove is equal to a depth of the third groove.
3. The flip LED chip of claim 2, wherein a depth of the third recess is equal to a depth of the first recess.
4. The flip LED chip of claim 3, wherein the second recess has a depth of 1 μ ι η to 2 μ ι η.
5. The flip LED chip of any one of claims 2 to 4, wherein a distance between the second groove and the N-type pad is smaller than a distance between the second groove and the P-type pad.
6. The flip LED chip of claim 5, wherein a distance between the second recess and the N-type pad is 5 μ ι η to 100 μ ι η.
7. The flip LED chip of any one of claims 1 to 4, wherein the width of the second groove is 10 μm to 50 μm.
8. The flip LED chip of claim 1, wherein the insulating layer has a fourth recess in communication with the first via and a fifth recess in communication with the second via; the P-type bonding pad is arranged in the fourth groove, and the thickness of the P-type bonding pad is equal to the sum of the depth of the fourth groove and the length of the first through hole; the N-type bonding pad is arranged in the fifth groove, and the thickness of the N-type bonding pad is equal to the sum of the depth of the fifth groove and the length of the second through hole.
9. The flip LED chip of claim 8, wherein a depth of the fourth recess is equal to a depth of the second recess, and a depth of the fifth recess is equal to a depth of the second recess.
10. A manufacturing method of a flip LED chip is characterized by comprising the following steps:
growing an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the first surface of the substrate in sequence;
forming a first groove extending to the N-type semiconductor layer on the P-type semiconductor layer;
forming a light reflecting layer on the P-type semiconductor layer;
arranging an N-type electrode on the N-type semiconductor layer in the first groove, and arranging a P-type electrode on the region of the P-type semiconductor layer except the region where the light reflecting layer is arranged;
forming an insulating layer in the first groove and on the light reflecting layer, wherein the insulating layer is provided with a first through hole extending to the P-type electrode, a second through hole extending to the N-type electrode and a second groove extending to the light reflecting layer, the depth of the second groove is smaller than the thickness of the insulating layer, the second groove is positioned between the first through hole and the second through hole, and the distance between the second groove and the first through hole is not equal to the distance between the second groove and the second through hole;
n type pad and P type pad are set up at the interval on the insulating layer, P type pad passes through first through-hole extends to P type electrode, N type pad passes through the second through-hole extends to N type electrode, N type pad with distance between the second recess P type pad with distance between the second recess all is greater than 0.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003046142A (en) * | 2001-08-01 | 2003-02-14 | Sanyo Electric Co Ltd | Light emitting device and support base used therefor |
| CN103178181A (en) * | 2011-12-26 | 2013-06-26 | 茂邦电子有限公司 | LED (light emitting diode) element with coplanar electrodes, packaging structure and light reflecting structure |
| CN104638090A (en) * | 2014-12-18 | 2015-05-20 | 上海大学 | Inverted LED (light emitting diode) encapsulation module |
| CN106449924A (en) * | 2016-08-30 | 2017-02-22 | 厦门乾照光电股份有限公司 | Photo-thermal-electric separated flip LED chip and manufacturing method thereof |
| CN108123018A (en) * | 2017-12-18 | 2018-06-05 | 湘能华磊光电股份有限公司 | A kind of GaN-based flip-chip structure light-emitting device and preparation method thereof |
| CN108336207A (en) * | 2018-01-05 | 2018-07-27 | 佛山市国星半导体技术有限公司 | A kind of high reliability LED chip and preparation method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105244419A (en) * | 2014-06-18 | 2016-01-13 | 晶能光电（常州）有限公司 | Preparation method of wafer level thin-film flip LED chip |
| TWI582928B (en) * | 2016-01-19 | 2017-05-11 | 矽品精密工業股份有限公司 | Substrate structure and method of manufacturing the same |
| CN207558821U (en) * | 2017-10-23 | 2018-06-29 | 山东晶泰星光电科技有限公司 | A kind of LED support with overflow ducts and overflow launder |
| CN107833960A (en) * | 2017-10-23 | 2018-03-23 | 山东晶泰星光电科技有限公司 | A kind of LED support and its manufacture method with overflow ducts and overflow launder |
-
2018
- 2018-10-26 CN CN201811256110.9A patent/CN109638125B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003046142A (en) * | 2001-08-01 | 2003-02-14 | Sanyo Electric Co Ltd | Light emitting device and support base used therefor |
| CN103178181A (en) * | 2011-12-26 | 2013-06-26 | 茂邦电子有限公司 | LED (light emitting diode) element with coplanar electrodes, packaging structure and light reflecting structure |
| CN104638090A (en) * | 2014-12-18 | 2015-05-20 | 上海大学 | Inverted LED (light emitting diode) encapsulation module |
| CN106449924A (en) * | 2016-08-30 | 2017-02-22 | 厦门乾照光电股份有限公司 | Photo-thermal-electric separated flip LED chip and manufacturing method thereof |
| CN108123018A (en) * | 2017-12-18 | 2018-06-05 | 湘能华磊光电股份有限公司 | A kind of GaN-based flip-chip structure light-emitting device and preparation method thereof |
| CN108336207A (en) * | 2018-01-05 | 2018-07-27 | 佛山市国星半导体技术有限公司 | A kind of high reliability LED chip and preparation method thereof |
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