CN109613328B - Cross-coupling rapid overcurrent detection circuit - Google Patents

Cross-coupling rapid overcurrent detection circuit Download PDF

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CN109613328B
CN109613328B CN201910030403.3A CN201910030403A CN109613328B CN 109613328 B CN109613328 B CN 109613328B CN 201910030403 A CN201910030403 A CN 201910030403A CN 109613328 B CN109613328 B CN 109613328B
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tube
pmos
detection circuit
pmos transistor
current
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CN109613328A (en
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周泽坤
王安琪
王韵坤
石跃
王卓
张波
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University of Electronic Science and Technology of China
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Abstract

A cross-coupling rapid overcurrent detection circuit belongs to the technical field of electronic circuits. The third NMOS tube, the fourth NMOS tube and the fifth NMOS tube form a current mirror for mirroring the bias current; the first PMOS tube, the second PMOS tube, the third PMOS tube and the fourth PMOS tube form a cross-coupling structure, so that the rapid detection of the overcurrent state is realized; the detection state is accurately controlled by arranging a fifth PMOS (P-channel metal oxide semiconductor) tube, a sixth PMOS tube and a seventh PMOS tube which are enable tubes; in addition, the protection resistor and the phase inverter are arranged, so that the internal current of the over-current detection circuit can be controlled not to be too large, and the output signal can be shaped. According to the invention, through the cross-coupling structure of the comparator, the falling edge turning speed of the comparator is enhanced, the function of quickly detecting that the power tube enters an overcurrent state from a normal working state is realized, and the time delay of overcurrent detection is reduced, so that the accuracy of overcurrent detection is improved, the damage of the overcurrent state to the power tube is favorably reduced, and the integral reliability of a power supply system is improved.

Description

Cross-coupling rapid overcurrent detection circuit
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to a cross-coupling rapid overcurrent detection circuit.
Background
When the switching power supply is used, the situation that the current is too large, the heat is increased, and a power tube is damaged is caused due to the fact that the load suddenly generates the change of inevitable peripheral factors such as special conditions and the like, and the whole system is damaged to a certain extent. As a key module of various devices, a switching power supply should avoid this situation as much as possible, and therefore an overcurrent protection circuit should be added to the switching power supply. The overcurrent protection circuit is mainly divided into two parts, namely a current detection part and a current limiting part. When the current detection part detects that the current is too large, the current limiting part adjusts the current by controlling the loop, so that the purpose of protecting the chip is achieved.
From the viewpoint of the detection of current, overcurrent protection is mainly classified into two types: direct current detection type and indirect current detection type. The direct current detection type is to directly sample the voltage drop of the power tube or a resistor connected in series in the power tube path to judge whether the power tube is in an overcurrent state. The indirect current detection type is realized by indirectly adopting a current having a certain relation with the current of the power tube, and a commonly used method is to connect a plurality of transistors which are the same as the power tube with the grid electrode and the source electrode of the power tube together so as to achieve the purpose of copying the current of the power tube in proportion.
Fig. 1 (a) shows an overcurrent protection circuit of a direct current detection type, wherein the operating principle of a conventional overcurrent detection circuit applied in the overcurrent protection circuit of the direct current detection type can be understood by an equivalent diagram shown on the left side of fig. 1 (b): current detection is carried out when the upper tube is opened, and the opened upper tube is equivalent to a resistor Rds,onWhen the voltage at the switch node SW is VSW＝VDD-IOUTRds,onI.e. VSWCan reflect the load current IOUTIn the case of a load current IOUTThe larger, VSWThe smaller the voltage of (C), and the comparison point V of the overcurrent limitLIMFrom an off-chip resistance RLIMAnd through an off-chip resistor RLIMCurrent I ofSINKCollectively define that the specific expression is VLIM＝VDD-ISINKRLIMThrough an off-chip resistor RLIMCurrent I ofSINKThe value of (A) is given by human, and the voltage of the point SW is V when the critical overcurrent occursSW,OCWhen the critical overcurrent occurs, the following conditions are provided:
Figure BDA0001944009570000011
from this, the over-current limit I is obtainedOUT,OCBy means of which the current-limiting resistance R can be varied as desiredLIMThereby setting the over-flow limit. Then, the current limiting part of the overcurrent protection circuit is based on the obtained load current IOUTAnd determining whether to carry out next overcurrent protection control on the system according to the overcurrent information. When the source input comparator is adopted to realize the over-current detection comparator, the working principle is similar, and a more accurate schematic diagram is shown on the right side of fig. 1 (b). Compared to the load current IOUTCurrent Δ I flowing into source input comparator<<IOUTTherefore, the voltage at point SW is approximated by the supply voltage VDD, the load current I onlyOUTAnd upper tube equivalent resistance Rds,onIt is determined that for a source input comparator, one can approximately consider SW to be a voltage source.
A conventional source input comparator applied to such an over-current detection scheme is shown in fig. 2. In the left branch, the current-limiting resistor R is adjustedLIMCan change the over-current limit comparison point VLIMThereby achieving the purpose of changing the current limit. Current limiting resistor RLIMAfter the value of (c) is set, the left path is equivalent to static bias, and M is given to the right pathP2The tube provides a gate bias. When the input end of the over-current detection circuit is opened, the voltage V at the joint point SW is immediatelySWWhen changed, M is connected to the voltageP2The source of the tube, its change is reflected in the right branch current change in a quadratic form, and thus has a higher speed.
The structure shown in FIG. 2 has the disadvantage that when the upper tube is over-current, the voltage V at the point SW is increased because the voltage drop on the on-resistance of the upper tube is increasedSWWill be lowered and therefore will be turned down when an overcurrent anomaly occurs. From the perspective of Slew Rate (SR), when the output voltage of the conventional source input comparator is lowered, a constant current is discharged to the parasitic capacitance of the output node, i.e. M flows throughB2Current of (I)B2. When the output voltage is over-high, i.e. the system is switched from the over-current state to the normal state, because the SW point potential V is at this timeSWIncrease, MP2The current in the tube increases quadratically, thisThe increased current charges the output node parasitic capacitance faster. Unfortunately, for over-current detection circuits, it is of greater concern to detect the moment at which the circuit enters an over-current state from a normal operating state. This is due to the relatively short duration of time that the top tube is open, and the over-current that often occurs when the top tube is about to close. If the time delay of the over-current comparator is large and not fast enough, the over-current can not be detected, so that the system always works in an over-current state in the period of the tube to be closed in each period, and heat accumulation, equipment damage and normal working life of the power tube can be shortened if the system is in the over-current state for a long time.
Disclosure of Invention
Aiming at the phenomena that the existing overcurrent detection circuit has large time delay and cannot detect overcurrent, the invention provides a cross-coupling rapid overcurrent detection circuit which can rapidly detect the moment when a power tube enters an overcurrent state from a normal working state, reduce the time delay of overcurrent detection and improve the precision of overcurrent detection.
The technical scheme of the invention is as follows:
a cross-coupled rapid overcurrent detection circuit comprises a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor and a current-limiting resistor,
one end of the current-limiting resistor is connected with the power supply voltage, and the other end of the current-limiting resistor is connected with an overcurrent limit comparison point of the overcurrent detection circuit;
the grid-drain short circuit of the third PMOS tube is connected with the grid electrode of the fourth PMOS tube and the drain electrode of the fifth NMOS tube, and the source electrode of the third PMOS tube is connected with the source electrode of the first PMOS tube and the overcurrent limit comparison point of the overcurrent detection circuit;
the grid-drain short circuit of the second PMOS tube is connected with the grid electrode of the first PMOS tube and the drain electrode of the fourth NMOS tube, and the source electrode of the second PMOS tube is connected with the source electrode of the fourth PMOS tube and the input end of the over-current detection circuit;
the grid-drain short circuit of the first NMOS tube is connected with the drain electrode of the first PMOS tube and the grid electrode of the second NMOS tube, and the source electrode of the first NMOS tube is connected with the source electrodes of the second NMOS tube, the third NMOS tube, the fourth NMOS tube and the fifth NMOS tube and is grounded;
the grid-drain short circuit of the third NMOS tube is connected with the grids of the fourth NMOS tube and the fifth NMOS tube and the bias current;
and the drain electrode of the second NMOS tube is connected with the drain electrode of the fourth PMOS tube and is connected with the output end of the over-current detection circuit.
Specifically, the first PMOS tube, the second PMOS tube, the third PMOS tube and the fourth PMOS tube have the same size; the first NMOS tube and the second NMOS tube have the same size; the size of the fourth NMOS tube is the same as that of the fifth NMOS tube.
Specifically, a fifth PMOS transistor and a sixth PMOS transistor are further arranged between the input end of the over-current detection circuit and the source electrode of the second PMOS transistor, the gate of the fifth PMOS transistor is connected with the gate of the sixth PMOS transistor and an enable signal, the source electrode of the fifth PMOS transistor is connected with the input end of the over-current detection circuit, and the drain electrode of the fifth PMOS transistor is connected with the drain electrode of the sixth PMOS transistor and the source electrode of the second PMOS transistor; and the source electrode of the sixth PMOS tube is connected with the power supply voltage.
Specifically, a seventh PMOS transistor is further disposed between the over-current limit comparison point of the over-current detection circuit and the source electrode of the first PMOS transistor, the fifth PMOS transistor, the sixth PMOS transistor and the seventh PMOS transistor are the same in size, the gate of the seventh PMOS transistor is grounded, the source electrode of the seventh PMOS transistor is connected to the over-current limit comparison point of the over-current detection circuit, and the drain electrode of the seventh PMOS transistor is connected to the source electrode of the first PMOS transistor.
Specifically, the overcurrent detection circuit further comprises a first resistor, a second resistor and a third resistor, wherein the first resistor, the second resistor and the third resistor are the same in resistance value, the first resistor is connected in series between the source electrode of the fifth PMOS transistor and the input end of the overcurrent detection circuit, the second resistor is connected in series between the source electrode of the sixth PMOS transistor and the power supply voltage, and the third resistor is connected in series between the source electrode of the seventh PMOS transistor and the overcurrent limit comparison point of the overcurrent detection circuit.
Specifically, an even number of inverters are connected in series between the drain of the second NMOS transistor and the output of the over-current detection circuit.
The invention has the beneficial effects that: according to the invention, through the cross-coupling structure of the comparator, the falling edge turning speed of the comparator is enhanced, the function of quickly detecting that the power tube enters an overcurrent state from a normal working state is realized, and the time delay of overcurrent detection is reduced, so that the accuracy of overcurrent detection is improved, the damage of the overcurrent state to the power tube is favorably reduced, and the integral reliability of a power supply system is improved.
Drawings
Fig. 1 is a topological diagram of a direct current detection type overcurrent protection circuit and an equivalent schematic diagram of a conventional overcurrent detection structure.
Fig. 2 is a schematic structural diagram of a conventional current detection circuit.
Fig. 3 is a schematic structural diagram of a cross-coupled fast overcurrent detection circuit according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention is further described with reference to the accompanying drawings and specific embodiments.
When the cross-coupled rapid overcurrent detection circuit provided by the invention is applied to the direct current detection type overcurrent protection circuit shown in fig. 1, rapid detection of the overcurrent state of the power tube can be realized through the source input comparator of the cross-coupled structure, and the purpose that the limit current Iout cannot be too large is achieved by controlling the voltage drop on the power tube not to be higher than the voltage drop on the current limiting resistor RLIM. As shown in fig. 3, in the over-current detection circuit provided by the present invention, the first PMOS transistor MP3A second PMOS transistor MP4And the third PMOS transistor MP5And a fourth PMOS transistor MP6Forming a cross-coupled structure, a first NMOS transistor MN1And a second NMOS transistor MN2Forming a mirror structure, a third NMOS transistor MB0And a fourth NMOS transistor MB1And a fifth NMOS transistor MB2Forming a current mirror; in order not to introduce offset, a first PMOS transistor M is providedP3A second PMOS transistor MP4And the third PMOS transistor MP5And a fourth PMOS transistor MP6The size is the same, and a first NMOS tube M is arrangedN1And a second NMOS transistor MN2The size is the same, and the fourth NMOS tube MB1And a fifth NMOS transistor MB2Is the same as the third NMOS transistor MB0In a certain proportion, bias current I0Mirroring is performed; the specific proportion can be set according to the needsWhen the bias current of the mirror image is large, the power consumption is large but the speed is high, and when the bias current of the mirror image is small, the speed is low but the power consumption is low.
In some embodiments, an enable module may be further provided, as shown in fig. 3, the over-current detection circuit in this embodiment is a fifth PMOS transistor Me1And a sixth PMOS transistor Me2To enable the transistor, taking the application of the over-current detection circuit of the present invention to the direct current detection type over-current protection circuit shown in fig. 1 as an example, since the potential at the switch node SW is close to the ground potential when the lower tube is turned on, the over-current detection circuit only needs to detect when the upper tube is turned on, and when the lower tube is turned on, the output voltage should still be in a normal state. The specific implementation method is to introduce a control signal H _ ctrl of an upper tube driving signal, turn on the upper tube when H _ ctrl is high, turn off the upper tube when H _ ctrl is low, and connect an inverted signal of the control signal H _ ctrl of the upper tube driving signal as an enable signal to a fifth PMOS tube Me1And a sixth PMOS transistor Me2The fifth PMOS transistor M is connected with the second PMOS transistor M through the pair of the enable transistorse1And a sixth PMOS transistor Me2So that the fifth PMOS transistor M is turned one1Conducting, sixth PMOS transistor Me2And turning off the switch, and detecting the potential of the SW point by the over-current detection circuit. When the upper tube is closed, the SW point potential is not switched into the detection circuit, but the sixth PMOS tube M is usede2Conducting, fifth PMOS transistor Me1And (4) switching off, and switching a higher potential, such as a power supply potential, into the detection end, thereby outputting a normal signal representing that the system is not overcurrent when the lower tube is switched on. Another benefit of this is that the comparator is not turned off, and there is no need to restart the internal node, so that a fast switch between the two states can be achieved.
One end of the detection circuit is always connected to an enabling tube, namely a fifth PMOS tube Me1Or the sixth PMOS transistor Me2In order to reduce offset voltage, a fifth PMOS transistor M can be placed at the same position of the other input end of the circuite1And a sixth PMOS transistor Me2Enable tube with same size, namely seventh PMOS tube Me3As matching, it does not play a role of switching the input potential, but can reduce the effect caused by the addition of the left input end enable tubeThe comparator is de-tuned.
In this embodiment, three current-limiting resistors with equal resistance, i.e., the first resistor R, are respectively disposed at the source ends of the three enable transistors4A second resistor R5And a third resistor R6The current in the circuit is not too large, and the first resistor R4Is connected in series to a fifth PMOS tube Me1Between the source and the input of the over-current detection circuit, a second resistor R5Is connected in series to a sixth PMOS tube Me2Between the source of the first resistor and the supply voltage VDD, and a third resistor R6Is connected in series with a seventh PMOS tube Me3And an over-current limit comparison point of the over-current detection circuit. In addition, the second NMOS transistor M is connectedN2Even number of inverters are connected in series between the drain electrode of the over-current detection circuit and the output end of the over-current detection circuit, and the purpose of shaping output signals can be achieved.
The working process and the working principle of the present embodiment are further explained below.
When the potential at the switch node SW connected with the input end of the over-current detection circuit is increased, the second PMOS tube MP4The current in the second PMOS transistor M is not changed, so that the second PMOS transistor MP4Will rise, resulting in the first PMOS transistor MP3The gate potential of (1) rises, so that the first PMOS transistor MP3Has a reduced possibility of reducing the current in the resistor RLIMWill decrease, thereby causing the over-current limit comparison point VLIMThe potential increases. If this happens, it means that the comparison point potential rises synchronously with the rise of the detection potential, and vice versa. This may cause the circuit to operate frequently in the vicinity of the comparison point, thereby generating an error signal. To ensure that this does not happen, it should be proven that: overcurrent detection circuit input end potential VSWChange of (Δ V)SWAlways greater than the over-current limit caused by the over-current limit comparison point potential VLIMChange of (Δ V)LIM. First, the changed Δ VLIMIs composed of a first PMOS transistor MP3Current change Δ I inP3Directly caused, the specific relation is as follows:
Figure BDA0001944009570000051
wherein the content of the first and second substances,
Figure BDA0001944009570000052
is a first PMOS transistor MP3A second PMOS transistor MP4And the third PMOS transistor MP5And the fourth PMOS transistor MP6Width to length ratio of (u)pIs the mobility of the PMOS tube, COXIs a unit area gate capacitance, VOV,P3＝VSG,P3-|VTHPI is a first PMOS tube MP3Over-drive voltage of, i.e. the first PMOS transistor MP3Gate source voltage V ofSG,P3And threshold voltage | VTHPDifference of |, Δ VOV,P3Is a VOV,P3The amount of change in (c). Since the PMOS tubes of the same type are adopted, the threshold voltage of each PMOS is approximately considered to be the same in the following calculation, namely | VTHP|。
Due to the fact that
Figure BDA0001944009570000053
One is greater than 0, so there is:
ΔVLIM×ΔVOV,P3＜0
at this time, Δ VOV,P3＝ΔVLIM-ΔVSWSubstituting the formula to obtain:
ΔVLIM×(ΔVLIM-ΔVSW)＜0
ΔVLIM×ΔVSW＞(ΔVLIM)2＞0
suppose Δ VLIMIf > 0, then there are:
ΔVSW> 0, and Δ VSW＞ΔVLIM
On the contrary, assume Δ VLIMIf < 0, then:
ΔVSW< 0, and Δ VSW＜ΔVLIM
This gives: whether V or notLIMIncrease or decrease, i.e. irrespective of Δ VLIMPositive or negative, with a trend consistent with previous qualitative analysis, i.e. VLIMIncrease or decrease ofPotential and VSWThe same, but it can be determined that:
|ΔVSW|＞|ΔVLIM|
this means that the voltage variation of the over-current limit comparison point ILIM caused by the change at the input terminal SW of the over-current detection circuit in this embodiment is always smaller than the voltage variation at the point SW, that is, in the case of a large signal, the positive feedback is larger than the negative feedback, and the frequent action of the output voltage due to the too strong negative feedback is not caused. On this basis, the slew rate SR is further calculated.
Firstly, a fourth PMOS (P-channel metal oxide semiconductor) transistor M closely related to the output SR (sequence number) is calculatedP6And a second NMOS transistor MN2The current in the two tubes is neglected because the voltage drop on the enabling tube and the current-limiting resistor is small, and a fourth PMOS tube M can be obtainedP6And a second NMOS transistor MN2Current in both tubes IP6And IN2Are respectively:
Figure BDA0001944009570000061
Figure BDA0001944009570000062
wherein, the fourth NMOS transistor MB1And a fifth NMOS transistor MB2Are the same size, so MP4And MP5So that the source and gate voltage differences are equal, denoted as VSG0。
The slew rate SR-at which the output voltage is ramped down is therefore:
Figure BDA0001944009570000063
wherein, CparIs the output node of the comparator, i.e. the second NMOS transistor MN2The parasitic capacitance of the junction at the drain.
Because the input end potential V of the over-current detection circuitSWComparing point potential V with over-current limitLIMDecreases faster and so the slew rate SR-of the output voltage falling increases. When V isSWWhen it is low enough, the fourth PMOS transistor MP6Turn-off, fourth PMOS transistor MP6Current I inP60A, so there is:
Figure BDA0001944009570000071
similarly, at this time, the output voltage is turned down to have a slew rate SR-Increasing at a squared rate.
Next, the slew rate SR of the output voltage ramp is calculated+：
Figure BDA0001944009570000072
Because the input end potential V of the over-current detection circuitSWComparing point potential V with over-current limitLIMIncrease faster so that the output voltage is raised+It will also increase. In contrast to the slew rate SR of the conventional current sensing arrangement shown in FIG. 2, the conventional current sensing arrangement outputs a slew rate SR1 with a voltage drop-And a slew rate SR1 of the ramp-up+The expression of (a) is as follows:
Figure BDA0001944009570000073
Figure BDA0001944009570000074
wherein IB2And IP2Is M in the conventional current detection structureB2Pipe and MP2Current in the tube, CparFor the output node of a conventional current sensing arrangement, i.e. MB2Parasitic capacitance at the junction at the drain of the tube. Due to IB2Is a constant current, so SR1-Is a constant value at MP2If the tube is not turned off due to too low SW point, its value will beSmaller; in SR1+In the expression of (a) in (b),
Figure BDA0001944009570000075
is MP2Width to length ratio of VG,P2Is MP2Gate voltage of the tube of value MP1Is determined at a current limiting resistor RLIMThe resistance value is determined to be a constant value, so that the traditional current detection circuit only leads the rising edge SR1+The effect of the increase. As analyzed before, the overcurrent detection circuit applied in such a scenario is more concerned about whether it can quickly detect an abnormal situation in which the SW point potential is lower than the comparison point, i.e., more concerned about the speed of the falling edge. The cross-coupled comparator provided by the invention enhances the falling edge turning speed of the comparator, realizes the function of quickly detecting that the power tube enters the overcurrent state from the normal working state, reduces the time delay of overcurrent detection, is more suitable for a current detection scheme for judging whether the power tube is overcurrent or not by detecting the potential of the SW point when the upper tube is opened, can improve the overcurrent detection precision, is beneficial to reducing the damage of the overcurrent state to the power tube and improves the integral reliability of a power supply system.
Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.

Claims (5)

1. A cross-coupling rapid overcurrent detection circuit is characterized by comprising a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube, a fifth NMOS tube, a first PMOS tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube and a current-limiting resistor, wherein the first PMOS tube, the second PMOS tube, the third PMOS tube and the fourth PMOS tube have the same size; the first NMOS tube and the second NMOS tube have the same size; the sizes of the fourth NMOS tube and the fifth NMOS tube are the same;
one end of the current-limiting resistor is connected with the power supply voltage, and the other end of the current-limiting resistor is connected with an overcurrent limit comparison point of the overcurrent detection circuit;
the grid-drain short circuit of the third PMOS tube is connected with the grid electrode of the fourth PMOS tube and the drain electrode of the fifth NMOS tube, and the source electrode of the third PMOS tube is connected with the source electrode of the first PMOS tube and the overcurrent limit comparison point of the overcurrent detection circuit;
the grid-drain short circuit of the second PMOS tube is connected with the grid electrode of the first PMOS tube and the drain electrode of the fourth NMOS tube, and the source electrode of the second PMOS tube is connected with the source electrode of the fourth PMOS tube and the input end of the over-current detection circuit;
the grid-drain short circuit of the first NMOS tube is connected with the drain electrode of the first PMOS tube and the grid electrode of the second NMOS tube, and the source electrode of the first NMOS tube is connected with the source electrodes of the second NMOS tube, the third NMOS tube, the fourth NMOS tube and the fifth NMOS tube and is grounded;
the grid-drain short circuit of the third NMOS tube is connected with the grids of the fourth NMOS tube and the fifth NMOS tube and the bias current;
and the drain electrode of the second NMOS tube is connected with the drain electrode of the fourth PMOS tube and is connected with the output end of the over-current detection circuit.
2. The cross-coupled rapid overcurrent detection circuit of claim 1, wherein a fifth PMOS transistor and a sixth PMOS transistor are further disposed between the input terminal of the overcurrent detection circuit and the source electrode of the second PMOS transistor, a gate of the fifth PMOS transistor is connected to a gate of the sixth PMOS transistor and an enable signal, a source electrode of the fifth PMOS transistor is connected to the input terminal of the overcurrent detection circuit, and a drain electrode of the fifth PMOS transistor is connected to a drain electrode of the sixth PMOS transistor and a source electrode of the second PMOS transistor; and the source electrode of the sixth PMOS tube is connected with the power supply voltage.
3. The cross-coupled rapid overcurrent detection circuit of claim 2, wherein a seventh PMOS transistor is further disposed between the overcurrent limit comparison point of the overcurrent detection circuit and the source of the first PMOS transistor, the fifth PMOS transistor, the sixth PMOS transistor and the seventh PMOS transistor have the same size, the gate of the seventh PMOS transistor is grounded, the source thereof is connected to the overcurrent limit comparison point of the overcurrent detection circuit, and the drain thereof is connected to the source of the first PMOS transistor.
4. The cross-coupled rapid overcurrent detection circuit of claim 3, further comprising a first resistor, a second resistor, and a third resistor having the same resistance, wherein the first resistor is connected in series between the source of the fifth PMOS transistor and the input terminal of the overcurrent detection circuit, the second resistor is connected in series between the source of the sixth PMOS transistor and the supply voltage, and the third resistor is connected in series between the source of the seventh PMOS transistor and the overcurrent limit comparison point of the overcurrent detection circuit.
5. The cross-coupled rapid overcurrent detection circuit according to claim 1 or 4, wherein an even number of inverters are connected in series between the drain of the second NMOS transistor and the output of the overcurrent detection circuit.
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