CN106374929A - Rapid-response dynamic latch comparator - Google Patents
Rapid-response dynamic latch comparator Download PDFInfo
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- CN106374929A CN106374929A CN201611096658.2A CN201611096658A CN106374929A CN 106374929 A CN106374929 A CN 106374929A CN 201611096658 A CN201611096658 A CN 201611096658A CN 106374929 A CN106374929 A CN 106374929A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
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Abstract
The invention discloses a rapid-response dynamic latch comparator which comprises a tail switch unit, a pre-amplification input unit, a pre-amplification reset unit, a latch input unit, a cross-coupling latch structure unit, a disconnecting switch unit, a latch reset unit and a positive feedback unit. The disconnecting switch unit is cut off in a reset phase, the grid potential of a PMOS transistor in the cross-coupling latch structure is ground GND under the effect of a latch input NMOS pair transistor, the grid potential of an NMOS transistor in the cross-coupling latch structure is VDD under the effect of a latch reset PMOS pair transistor, the cross-coupling latch structure establishes positive feedback rapidly in the comparison phase, and the speed of the comparator is improved. On the premise that power consumption is not increased, the disadvantage that time delay of a traditional double-tail dynamic latch comparator is increased rapidly with decrease of a differential input voltage, time delay of the comparator is less sensitive to the differential input voltage, and the comparator performance is improved.
Description
Technical field
The present invention relates to IC design technical field is and in particular to a kind of quick response dynamic latch comparator.
Background technology
With the fast development of digital processing technology and semiconductor technology, substantial amounts of analogue signal all needs to be converted to numeral letter
Number processing, analogue-to-digital converters (adc), as the bridge connecting analogue signal and digital signal, play ever more important
Role, the high speed development of Information Communication equally puts forward higher requirement to analog-digital converter.
Comparator has to the performance of whole adc as the nucleus module of adc, the index such as its precision, time delay, power consumption, imbalance
Vital impact, or even the performance of impact whole system.Traditional pre-amplification single-stage dynamic latch comparator although with quiet
Speed is higher by contrast for state comparator, but power consumption is larger due to generation dynamic power consumption；And typically have from power supply to ground multiple
Mos pipe stacks, thus require higher to supply voltage.Traditional double tail dynamic latch comparators, do not have the waste of quiescent dissipation,
But its time delay sharply increases with the reduction of differential voltage, this greatly limits the highest frequency that comparator can work,
Reduce the speed of comparator；And the use of multi-phase clock increased the complexity of circuit.With the development of semiconductor technology,
Delay performance under less differential voltage for the conventional dynamic latched comparator can not meet demand.
Content of the invention
To be solved by this invention is that delay performance under less differential voltage for the conventional dynamic latched comparator cannot be expired
The problem of sufficient demand, provides a kind of quick response dynamic latch comparator.
For solving the above problems, the present invention is achieved by the following technical solutions:
A kind of quick response dynamic latch comparator, including comparator body.This comparator body include tail switch element,
Pre-amplification input block, pre-amplification reset unit, latch input block, cross-couplings latch structure unit, latch reset unit
With positive feedback unit.It is a difference in that, described comparator body still further comprises Disconnecting switch unit, this disconnecting switch list
Unit is arranged on cross-couplings latch structure unit.Above-mentioned Disconnecting switch unit, in reseting stage, ends and disconnects positive feedback.
In comparison phase, the pmos pipe grid current potential in cross-couplings latch structure is made to be ground in the presence of latch input nmos is to pipe
Gnd, makes the nmos pipe grid current potential in cross-couplings latch structure be vdd simultaneously in the presence of latch reset pmos is to pipe, makes
Obtain cross-couplings latch structure and set up rapidly positive feedback when entering comparison phase, and then improve the speed of comparator body.
In such scheme, tail switch element input clock signal clk, and connect pre-amplification input block.Tail switch element
For providing discharge channel in comparison phase for pre-amplification input block, thus producing electric current.Pre-amplification input block forms ratio
Compared with the input of device body, input positive input signal ip and anti-input signal in, and connect pre-amplification reset unit, tail switch list
Unit and latch input block.Pre-amplification input block exports latch stage after being used for amplifying the voltage signal of input.Pre-amplification
Reset unit input clock signal clk, and connect pre-amplification input block and latch input block.Pre-amplification reset unit is used for
Output fp, fn of making pre-amplification reset unit in reseting stage draw high power supply vdd.Latch the connection of input block input to put in advance
The outfan of big input block, and connect cross-couplings latch structure unit and positive feedback unit.Latch input block is used for will
The voltage signal of input is converted to current signal, and is pulled down to ground in reseting stage by the input of cross-couplings latch structure unit
gnd.Cross-couplings latch structure unit connects latch input block, Disconnecting switch unit and latch reset unit, and forms ratio
Compared with the outfan of device body, export positive output signal outp and inverted output signal outn.Cross-couplings latch structure unit is used for
Accelerate the velocity of discharge in comparison phase, and in latch stage latch data.Disconnecting switch unit input clock signal clk, and even
Connect cross-couplings latch structure unit, latch reset unit, latch input block and positive feedback unit.Disconnecting switch unit is used for
Disconnect positive feedback in reseting stage, and so that positive feedback is set up in comparison phase.Latch reset unit input clock signal clk, and
Connect cross-couplings latch structure unit and Disconnecting switch unit.Latch reset unit is used for comparator body in reseting stage
Output move power supply vdd to.Positive feedback unit connects latch input block and cross-couplings latch structure unit.Positive feedback unit
For turning in comparison phase, and cross-couplings latch structure unit is made to increase discharge paths in comparison phase.
In such scheme, described tail switch element includes mos pipe m1.Mos pipe m1Source electrode with ground gnd be connected.Mos pipe m1
Grid be connected with clock signal clk.Mos pipe m1Drain electrode and pre-amplification input block mos pipe m2、m3Drain electrode be connected.
In such scheme, described pre-amplification input block includes mos pipe m2～m3.Mos pipe m2With mos pipe m3Source electrode with
The mos pipe m of tail switch element1Drain electrode connect.Mos pipe m2Grid formed comparator body positive input terminal, connect positive input letter
Number ip.Mos pipe m3Grid formed comparator body anti-input, reversed input signal in.Mos pipe m2Drain electrode and mos manage
m4Drain electrode be connected after, formed pre-amplification input block reinfusion end fn.Mos pipe m3Drain electrode and mos pipe m5Drain electrode be connected
Afterwards, form the positive output end fp of pre-amplification input block.
In such scheme, described pre-amplification reset unit includes mos pipe m4～m5.Mos pipe m4With mos pipe m5Source electrode with
Power supply vdd connects.Mos pipe m4With mos pipe m5Grid connect clock signal clk.Mos pipe m4Drain electrode and pre-amplification input block
Reinfusion end fn be connected.Mos pipe m5Drain electrode be connected with the positive output end fp of pre-amplification input block.
In such scheme, described latch input block includes just latching input block and locks and deposit input block.Above-mentioned just
Latch input block and include mos pipe m6.Mos pipe m6Source electrode be connected with ground gnd.Mos pipe m6Grid and pre-amplification input block
Reinfusion end fn be connected.Mos pipe m6Drain electrode and cross-couplings latch structure unit mos pipe m8Drain electrode be connected after, formed
The positive input terminal v1 of cross-couplings latch structure unit.Above-mentioned locking is deposited input block and is included mos pipe m7.Mos pipe m7Source electrode with
Ground gnd is connected.Mos pipe m7Grid be connected with the positive output end fp of pre-amplification input block.Mos pipe m7Drain electrode with intersect coupling
Close the mos pipe m of latch structure unit9Drain electrode be connected after, formed cross-couplings latch structure unit anti-input v2.
In such scheme, described cross-couplings latch structure unit includes mos pipe m8～m11.Mos pipe m8With mos pipe m9's
Source electrode is connected with ground gnd.Mos pipe m10With mos pipe m11Source electrode be connected with power supply vdd.Mos pipe m8Grid and mos pipe m11's
After drain electrode is connected, form comparator body reinfusion end outn.Mos pipe m9Grid and mos pipe m10Drain electrode be connected after, formed
Comparator body positive output end outp.Mos pipe m10Grid and mos pipe m9Drain electrode and cross-couplings latch structure unit anti-
Input v2 is connected.Mos pipe m11Grid and mos pipe m8Drain electrode and cross-couplings latch structure unit positive input terminal v1 phase
Even.
In such scheme, described Disconnecting switch unit includes positive Disconnecting switch unit and anti-Disconnecting switch unit.Above-mentioned just
Disconnecting switch unit includes mos pipe m12.Mos pipe m12Source electrode be connected with the positive input terminal v1 of cross-couplings latch structure unit.
Mos pipe m12Grid be connected with clock signal clk.Mos pipe m12Drain electrode be connected with the positive output end outp of comparator body.
Above-mentioned anti-Disconnecting switch unit includes mos pipe m13.Mos pipe m13Source electrode and cross-couplings latch structure unit anti-input
V2 is connected.Mos pipe m13Grid be connected with clock signal clk.Mos pipe m13Drain electrode and comparator body reinfusion end
Outn is connected.
In such scheme, described latch reset unit includes positive latch reset unit and deposits reset unit with locking.Above-mentioned just
Latch reset unit includes mos pipe m14.Mos pipe m14Source electrode be connected with power supply vdd.Mos pipe m14Grid and clock signal
Clk connects.Mos pipe m14Drain electrode be connected with the positive output end outp of comparator body.Above-mentioned locking is deposited reset unit and is included mos
Pipe m15.Mos pipe m15Source electrode be connected with power supply vdd.Mos pipe m15Grid be connected with clock signal clk.Mos pipe m15Drain electrode
It is connected with the reinfusion end outn of comparator body.
In such scheme, described positive feedback unit includes positive positive feedback unit and feedback unit anyway.Positive positive feedback unit
Including mos pipe m16.Mos pipe m16Source electrode be connected with ground gnd.Mos pipe m16Grid and comparator body reinfusion end outn even
Connect.Mos pipe m16Drain electrode be connected with the positive input terminal v1 of cross-couplings latch structure unit.Anyway feedback unit includes mos pipe
m17.Mos pipe m17Source electrode be connected with ground gnd.Mos pipe m17Grid be connected with comparator body positive output end outp.Mos manages
m17Drain electrode be connected with the anti-input v2 of cross-couplings latch structure unit.
Compared with prior art, the present invention has a characteristic that
1st, add a pair of disconnecting switch between two positive feedbacks of comparator latch stage so that cross-couplings latch structure list
Pmos tube grid current potential in unit is latched input nmos and pipe is set to ground gnd, cross-couplings latch structure in reseting stage
Nmos tube grid current potential in unit is latched reset pmos and is set to power supply vdd to pipe in reseting stage, thus work as comparing rank
When section starts, two groups of positive feedbacks in cross-couplings latch structure unit can be set up rapidly；And to cross-couplings latch structure
In unit, the dependence of input current is less, and then improves dynamic comparer speed, and makes it in less differential input voltage
Under still can obtain less time delay；
2nd, add a pair switch by output control, one end is connected to the input of cross-couplings latch structure unit, one
End is connected to ground, when dynamic latch comparator is operated in comparison phase so that circuit increases a discharge path, thus accelerating
The separation of regeneration node voltage, and then lift the speed of dynamic latch comparator, be equivalent to a positive feedback unit path；
3rd, only need single phase clock to control i.e. and can achieve reset and comparing function；
4th, on the premise of not increasing power consumption, improve traditional double tail dynamic latch comparator and reduce with differential input voltage
The deficiency that time delay sharply increases, reduces the sensitivity to differential input voltage for the comparator time delay, improves comparator performance.
Brief description
Fig. 1 is a kind of schematic diagram of quick response dynamic latch comparator.
Fig. 2 is that the present invention is compared with differential voltage change simulation result with traditional double tail dynamic latch comparator time delay.
Fig. 3 is simulation result during rising edge of the present invention.
Fig. 4 declines time delay simulation result for the present invention.
Fig. 5 is functional verification result of the present invention.
Specific embodiment
With reference to the accompanying drawings and examples, describe technical scheme in detail:
A kind of quick response dynamic latch comparator, as shown in figure 1, include tail switch element, pre-amplification input block, pre-
Amplify reset unit, latch input block, cross-couplings latch structure unit, Disconnecting switch unit, latch reset unit and just
Feedback unit.
Tail switch element: provide electric current for pre-amplification input block in comparison phase.In a preferred embodiment of the invention, institute
The tail switch element stated includes mos pipe m1；Mos pipe m1Source electrode with ground gnd be connected；Mos pipe m1Grid and clock signal clk
Connect；Mos pipe m1Drain electrode and mos pipe m2、m3Drain electrode be connected.
Pre-amplification input block: export latch stage after the differential voltage signal of input is amplified, be latch input signal
Gain is provided, amplifies input signal, and will input and export isolation, thus reduction recalcitrates noise, the speed of raising comparator with
Precision.In a preferred embodiment of the invention, described pre-amplification input block includes mos pipe m2～m3；Mos pipe m2、m3Source electrode with
Mos pipe m1Drain electrode connect；Mos pipe m2Grid meet comparator body positive input signal ip；Mos pipe m3Grid connect comparator
Anti- input signal in；Mos pipe m2Drain electrode and mos pipe m4Drain electrode be connected after, formed pre-amplification input block reinfusion end fn；
Mos pipe m3Drain electrode and mos pipe m5Drain electrode be connected after, formed pre-amplification input block positive output end fp.
Pre-amplification reset unit: in reseting stage, pre-amplification outfan is latched input block input and draws high electricity
Source vdd, resets to pre-amplification outfan；In comparison phase cut-off.In a preferred embodiment of the invention, described pre-amplification is multiple
Bit location includes mos pipe m4～m5；Mos pipe m4、m5Source electrode be connected with power supply vdd；Mos pipe m4、m5Grid connect clock signal
clk；Mos pipe m4Drain electrode be connected with pre-amplification input block reinfusion end fn；Mos pipe m5Drain electrode and pre-amplification input block
Positive output end fp is connected.
Latch input block: the voltage signal of input is converted to current signal, and isolation and amplifier, reduce and recalcitrate noise,
In reseting stage, the input of cross-couplings latch structure unit is pulled down to ground gnd.In a preferred embodiment of the invention, described
Latch input block and include mos pipe m6～m7；Mos pipe m6、m7Source electrode be connected with ground gnd；Mos pipe m6Grid defeated with pre-amplification
Enter unit reinfusion end fn to be connected；Mos pipe m7Grid be connected with pre-amplification input block positive output end fp；Mos pipe m6Drain electrode
With mos pipe m8Drain electrode be connected after formed cross-couplings latch structure unit positive input terminal v1；Mos pipe m7Drain electrode and mos pipe m9
Drain electrode be connected after formed the anti-input v2 of cross-couplings latch structure unit.
Cross-couplings latch structure unit: complete comparing function, and accelerate to compare speed using two positive feedbacks, that is, than
Accelerate the velocity of discharge compared with the stage, in latch stage latch data.In a preferred embodiment of the invention, described cross-couplings latch knot
Structure unit includes mos pipe m8～m11；Mos pipe m8、m9Source electrode be connected with ground gnd；Mos pipe m10、m11Source electrode and power supply vdd phase
Even；Mos pipe m8Grid and mos pipe m11Drain electrode be connected after, formed comparator body reinfusion end outn；Mos pipe m9Grid
Pole and mos pipe m10Drain electrode be connected after, formed comparator body positive output end outp；Mos pipe m10Grid and mos pipe m9Leakage
Pole input v2 anti-with cross-couplings latch structure unit is connected；Mos pipe m11Grid and mos pipe m8Drain electrode and cross-couplings
Latch structure unit positive input terminal v1 is connected.
Disconnecting switch unit: in reseting stage cut-off, disconnect positive feedback, and make in the presence of latch input nmos is to pipe
Pmos pipe m in cross-couplings latch structure unit10、m11Grid be pulled down to ground gnd, in the work to pipe for the latch reset pmos
With under make in cross-couplings latch structure unit nmos pipe m8、m9Grid draw high power supply vdd so that cross-couplings lock
Deposit construction unit positive feedback when entering comparison phase can set up rapidly, and then improve comparator speed；Lead in comparison phase
Logical, make two branch roads of cross-couplings latch structure unit have electric current to flow through, positive feedback is set up, cross-couplings latch structure unit
Normal work, exports after input signal is compared.In a preferred embodiment of the invention, described Disconnecting switch unit includes
Mos pipe m12～m13；Mos pipe m12Source electrode be connected with cross-couplings latch structure unit positive input terminal v1；Mos pipe m13Source electrode
Input v2 anti-with cross-couplings latch structure unit is connected；Mos pipe m12、m13Grid be connected with clock signal clk；Mos manages
m12Drain electrode be connected with comparator body positive output end outp；Mos pipe m13Drain electrode and comparator body reinfusion end outn phase
Even；
Latch reset unit: in reseting stage conducting, comparator output terminal is moved to vdd；In comparison phase cut-off.At this
In invention preferred embodiment, described latch reset unit includes mos pipe m14～m15；Mos pipe m14、m15Source electrode and power supply vdd even
Connect；Mos pipe m14、m15Grid be connected with clock signal clk；Mos pipe m14Drain electrode and comparator body positive output end outp phase
Even；Mos pipe m15Drain electrode be connected with comparator body reinfusion end outn.
Positive feedback unit: in comparison phase conducting, increase discharge paths, improve the speed of comparator.In the present invention
In preferred embodiment, described positive feedback unit includes mos pipe m16～m17；Mos pipe m16、m17Source electrode be connected with ground gnd；Mos manages
m16Grid be connected with comparator body reinfusion end outn；Mos pipe m17Grid and comparator body positive output end outp phase
Even；Mos pipe m16Drain electrode be connected with cross-couplings latch structure unit positive input terminal v1；Mos pipe m17Drain electrode and cross-couplings
Latch structure unit anti-input v2 is connected.
Work process of the present invention can be divided into three phases.
Reseting stage: when clk is for low level, mos pipe m1、m12、m13Cut-off, mos pipe m4、m5、m14、m15Conducting, fn,
Fp, outp and outn are driven high, mos pipe m6、m7Conducting, v1, v2 current potential is pulled down to ground gnd.
Comparison phase: when clk rises to high level by low level, mos pipe m4、m5、m14、m15Cut-off, m1Turn on as mos
Pipe m2Branch road and mos pipe m3Branch road provides a discharge channel, thus producing discharge current, mos pipe m14、m15Cut-off, m12、m13
Turn on as mos pipe m8、m12、m10Branch road and mos pipe m9、m13、m11Branch road provides electric current so as to turn on, comparator body positive input
The difference of signal ip and anti-input signal in voltage makes pre-amplification input positive output end output fp and pre-amplification input reinfusion end
The voltage of output fp declines at different rates.Mos pipe m6Branch road and mos pipe m7Branch road is under the control of fn, fp with different speed
Degree electric discharge, causes mos pipe m8、m12、m10Branch road and mos pipe m9、m13、m11The current mismatch of branch road, outp, outn voltage is not with
Same speed declines, and mos pipe m in cross-couplings latch units8、m9With mos pipe m10、m11One in the presence of two groups of positive feedbacks
End is rapid to discharge, and current potential continues to decline, and charge rapidly in one end, current potential raises again, mos pipe m16、m17Outfan outn,
It is that wherein side increases a discharge channel, thus aggravating mos pipe m under the control of outp voltage8、m12、m10Branch road is managed with mos
m9、m13、m11The current mismatch of branch road, accelerates the separating rate of outp, outn current potential, accelerates the speed of comparator, makes comparator
Body output final one end of outp, outn is high level, and one end is low level.
Latch stage: clk maintains high level, compares end, and all voltages keep constant.
Due to mos pipe m4、m5Before comparison phase, pre-amplification output node fn, fp are moved to power supply vdd, mos pipe m6、m7
In the presence of fn, fp, cross-couplings latch structure unit input v1, v2 are pulled down to ground gnd, mos pipe m14、m15To compare
Device output node outp, outn draw high power supply vdd, make all nodes in circuit all be reset to the magnitude of voltage of a determination,
This removes the memory function of comparator so that the comparative result of comparator is not affected by a front comparative result, improve
The precision of comparator；And, cross-couplings latch structure unit input v1, v2 are pulled down to gnd, comparator before comparison phase
Output node outp, outn draw high vdd so that when cross-couplings latch structure unit enters comparison phase, positive feedback is permissible
Rapid foundation, and reduce the dependence of the size to cross-couplings latch structure unit input current, thus improving comparator speed；
Pre-amplification circuit and latch input mos pipe m6、m7Use make multi-stage isolation between input signal and output signal, thus can
Recalcitrate effect of noise to reduce, improve comparator precision；Pre-amplification input circuit provides certain gain for input signal, increases
Add the voltage difference of latch stage input, thus improve comparator precision；Tail switchs mos pipe m1Comparing as pseudo- current source
Stage provides electric current for pre-amplification input block, replaces the quiescent current source in traditional pre-amplification circuit, thus reducing comparator
Power consumption；Positive feedback unit mos pipe m16、m17Increase one-level positive feedback in comparison phase for cross-couplings latch structure unit, and increase
Plus a discharge channel, thus improve comparator speed.
Using smic 0.18um cmos technique, the present invention is designed emulating with traditional double tail dynamic latch comparator,
Supply voltage 1.8v, sampling clock is 1ghz.The present invention is changed with differential voltage with traditional double tail dynamic latch comparator time delay
Simulation result compares referring to Fig. 2.Simulation result shows, when input difference voltage is less, traditional double tail dynamic latch comparator
Time delay sharply increase, and time delay of the present invention is stable and maintains all the time in 200ps it can be seen that delay performance has greatly changes
Enter.It is under 900mv triangular signal, the present invention to be emulated in the input amplitude of oscillation.During rising edge of the present invention, simulation result is referring to figure
3, the present invention declines time delay simulation result referring to Fig. 4, and functional verification result of the present invention is referring to Fig. 5.Simulation result shows, the present invention
Delay under inputting big signal only has 90.797ps.As can be seen here, the present invention can improve on the premise of not increasing power consumption
Traditional double tail dynamic latch comparator reduces, with differential input voltage, the deficiency that time delay sharply increases, and reduces comparator time delay
Sensitivity to differential input voltage, improves comparator performance.
Claims (10)
1. a kind of quick response dynamic latch comparator, including comparator body；This comparator body includes tail switch element, pre-
Amplify input block, pre-amplification reset unit, latch input block, cross-couplings latch structure unit, latch reset unit and
Positive feedback unit；It is characterized in that:
Described comparator body still further comprises Disconnecting switch unit, and this Disconnecting switch unit is arranged on cross-couplings and latches knot
On structure unit；
Above-mentioned Disconnecting switch unit, in reseting stage, ends and disconnects positive feedback；In comparison phase, latching input nmos pair
The pmos pipe grid current potential in cross-couplings latch structure is made to be ground gnd in the presence of pipe, simultaneously in latch reset pmos to pipe
The nmos pipe grid current potential in cross-couplings latch structure is made to be vdd so that cross-couplings latch structure compares in entrance under effect
Set up rapidly positive feedback during the stage, and then improve the speed of comparator body.
2. a kind of quick response dynamic latch comparator according to claim 1 it is characterised in that:
Tail switch element input clock signal clk, and connect pre-amplification input block；Tail switch element is used for
Pre-amplification input block provides discharge channel, thus producing electric current；
Pre-amplification input block forms the input of comparator body, input positive input signal ip and anti-input signal in, and even
Connect pre-amplification reset unit, tail switch element and latch input block；Pre-amplification input block is used for the voltage signal of input
Latch stage is exported after amplification；
Pre-amplification reset unit input clock signal clk, and connect pre-amplification input block and latch input block；Pre-amplification is multiple
Output fp, fn that bit location is used for making pre-amplification reset unit in reseting stage draw high power supply vdd；
Latch input block input connect pre-amplification input block outfan, and connect cross-couplings latch structure unit and
Positive feedback unit；Latch input block to be used for for the voltage signal of input being converted to current signal, and will intersect in reseting stage
The input that construction unit is latched in coupling is pulled down to ground gnd；
Cross-couplings latch structure unit connects latch input block, Disconnecting switch unit and latch reset unit, and forms ratio
Compared with the outfan of device body, export positive output signal outp and inverted output signal outn；Cross-couplings latch structure unit is used for
Accelerate the velocity of discharge in comparison phase, and in latch stage latch data；
Disconnecting switch unit input clock signal clk, and connect cross-couplings latch structure unit, latch reset unit, latch
Input block and positive feedback unit；Disconnecting switch unit is used for disconnecting positive feedback in reseting stage, and makes positive and negative in comparison phase
Feedback is set up；
Latch reset unit input clock signal clk, and connect cross-couplings latch structure unit and Disconnecting switch unit；Latch
Reset unit is used for moving the output of comparator body to power supply vdd in reseting stage；
Positive feedback unit connects latch input block and cross-couplings latch structure unit；Positive feedback unit is used in comparison phase
Conducting, and make cross-couplings latch structure unit increase discharge paths in comparison phase.
3. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: described tail switch element
Including mos pipe m1；Mos pipe m1Source electrode with ground gnd be connected；Mos pipe m1Grid be connected with clock signal clk；Mos pipe m1's
Drain electrode and the mos pipe m of pre-amplification input block2、m3Drain electrode be connected.
4. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: the input of described pre-amplification
Unit includes mos pipe m2～m3；Mos pipe m2With mos pipe m3Source electrode and tail switch element mos pipe m1Drain electrode connect；Mos manages
m2Grid formed comparator body positive input terminal, meet positive input signal ip；Mos pipe m3Grid form comparator body
Anti- input, reversed input signal in；Mos pipe m2Drain electrode and mos pipe m4Drain electrode be connected after, formed pre-amplification input block
Reinfusion end fn；Mos pipe m3Drain electrode and mos pipe m5Drain electrode be connected after, formed pre-amplification input block positive output end
fp.
5. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: described pre-amplification resets
Unit includes mos pipe m4～m5；Mos pipe m4With mos pipe m5Source electrode be connected with power supply vdd；Mos pipe m4With mos pipe m5Grid
Connect clock signal clk；Mos pipe m4Drain electrode be connected with the reinfusion end fn of pre-amplification input block；Mos pipe m5Drain electrode with pre-
The positive output end fp amplifying input block is connected.
6. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: it is described that to latch input single
Unit's inclusion is just being latched input block and is being deposited input block with locking；
The above-mentioned input block that just latching includes mos pipe m6；Mos pipe m6Source electrode be connected with ground gnd；Mos pipe m6Grid with put in advance
The reinfusion end fn of big input block is connected；Mos pipe m6Drain electrode and cross-couplings latch structure unit mos pipe m8Drain electrode
After being connected, form the positive input terminal v1 of cross-couplings latch structure unit；
Above-mentioned locking is deposited input block and is included mos pipe m7；Mos pipe m7Source electrode be connected with ground gnd；Mos pipe m7Grid with put in advance
The positive output end fp of big input block is connected；Mos pipe m7Drain electrode and cross-couplings latch structure unit mos pipe m9Drain electrode
After being connected, form the anti-input v2 of cross-couplings latch structure unit.
7. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: described cross-couplings lock
Deposit construction unit and include mos pipe m8～m11；Mos pipe m8With mos pipe m9Source electrode be connected with ground gnd；Mos pipe m10With mos pipe m11
Source electrode be connected with power supply vdd；Mos pipe m8Grid and mos pipe m11Drain electrode be connected after, formed comparator body reinfusion end
outn；Mos pipe m9Grid and mos pipe m10Drain electrode be connected after, formed comparator body positive output end outp；Mos pipe m10's
Grid and mos pipe m9Drain electrode be connected with the anti-input v2 of cross-couplings latch structure unit；Mos pipe m11Grid and mos
Pipe m8Drain electrode be connected with cross-couplings latch structure unit positive input terminal v1.
8. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: described disconnecting switch list
Unit includes positive Disconnecting switch unit and anti-Disconnecting switch unit；
Above-mentioned positive Disconnecting switch unit includes mos pipe m12；Mos pipe m12Source electrode and cross-couplings latch structure unit positive input
End v1 is connected；Mos pipe m12Grid be connected with clock signal clk；Mos pipe m12Drain electrode and comparator body positive output end
Outp is connected；
Above-mentioned anti-Disconnecting switch unit includes mos pipe m13；Mos pipe m13Source electrode enter with the reverse pumping of cross-couplings latch structure unit
End v2 is connected；Mos pipe m13Grid be connected with clock signal clk；Mos pipe m13Drain electrode and comparator body reinfusion end
Outn is connected.
9. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: described latch reset list
Unit includes positive latch reset unit and deposits reset unit with locking；
Above-mentioned positive latch reset unit includes mos pipe m14；Mos pipe m14Source electrode be connected with power supply vdd；Mos pipe m14Grid with
Clock signal clk connects；Mos pipe m14Drain electrode be connected with the positive output end outp of comparator body；
Above-mentioned locking is deposited reset unit and is included mos pipe m15；Mos pipe m15Source electrode be connected with power supply vdd；Mos pipe m15Grid with
Clock signal clk connects；Mos pipe m15Drain electrode be connected with the reinfusion end outn of comparator body.
10. a kind of quick response dynamic latch comparator according to claim 2 it is characterised in that: described positive feedback list
Unit's positive positive feedback unit of inclusion and anyway feedback unit；
Positive positive feedback unit includes mos pipe m16；Mos pipe m16Source electrode be connected with ground gnd；Mos pipe m16Grid and comparator this
Body reinfusion end outn connects；Mos pipe m16Drain electrode be connected with the positive input terminal v1 of cross-couplings latch structure unit；
Anyway feedback unit includes mos pipe m17；Mos pipe m17Source electrode be connected with ground gnd；Mos pipe m17Grid and comparator this
Body positive output end outp connects；Mos pipe m17Drain electrode be connected with the anti-input v2 of cross-couplings latch structure unit.
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Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107944099A (en) * | 2017-11-10 | 2018-04-20 | 东南大学 | A kind of high-speed, high precision comparator circuit design |
| CN108494406A (en) * | 2018-03-23 | 2018-09-04 | 上海唯捷创芯电子技术有限公司 | A kind of high speed dynamic latch type comparator, chip and communication terminal |
| CN108540130A (en) * | 2018-04-10 | 2018-09-14 | 中国科学院微电子研究所 | Dynamic comparator |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030034804A1 (en) * | 2001-08-16 | 2003-02-20 | Hrl Laboratories, Llc | Comparator with very fast regeneration time constant |
| US20040027265A1 (en) * | 2002-06-06 | 2004-02-12 | Analog Devices, Inc. | BiCMOS latches with npn control devices for current limiting of npn regeneration devices |
| CN101562441A (en) * | 2008-10-08 | 2009-10-21 | 西安电子科技大学 | Ultrahigh-speed comparator with low offset |
| CN104242879A (en) * | 2013-06-20 | 2014-12-24 | 西安电子科技大学 | High-speed low-imbalance dynamic comparator for high-speed analog-digital converter |
| CN105375910A (en) * | 2015-10-23 | 2016-03-02 | 广州金升阳科技有限公司 | Zero crossing comparison method and zero crossing comparator |
| CN106026996A (en) * | 2016-06-01 | 2016-10-12 | 桂林电子科技大学 | Positive feedback isolating dynamic latch comparator |
-
2016
- 2016-12-02 CN CN201611096658.2A patent/CN106374929B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030034804A1 (en) * | 2001-08-16 | 2003-02-20 | Hrl Laboratories, Llc | Comparator with very fast regeneration time constant |
| US20040027265A1 (en) * | 2002-06-06 | 2004-02-12 | Analog Devices, Inc. | BiCMOS latches with npn control devices for current limiting of npn regeneration devices |
| CN101562441A (en) * | 2008-10-08 | 2009-10-21 | 西安电子科技大学 | Ultrahigh-speed comparator with low offset |
| CN104242879A (en) * | 2013-06-20 | 2014-12-24 | 西安电子科技大学 | High-speed low-imbalance dynamic comparator for high-speed analog-digital converter |
| CN105375910A (en) * | 2015-10-23 | 2016-03-02 | 广州金升阳科技有限公司 | Zero crossing comparison method and zero crossing comparator |
| CN106026996A (en) * | 2016-06-01 | 2016-10-12 | 桂林电子科技大学 | Positive feedback isolating dynamic latch comparator |
Cited By (20)
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|---|---|---|---|---|
| CN107944099B (en) * | 2017-11-10 | 2021-12-07 | 东南大学 | High-speed high-precision comparator circuit design |
| CN107944099A (en) * | 2017-11-10 | 2018-04-20 | 东南大学 | A kind of high-speed, high precision comparator circuit design |
| CN108494406A (en) * | 2018-03-23 | 2018-09-04 | 上海唯捷创芯电子技术有限公司 | A kind of high speed dynamic latch type comparator, chip and communication terminal |
| CN108494406B (en) * | 2018-03-23 | 2022-03-18 | 上海唯捷创芯电子技术有限公司 | High-speed dynamic latch type comparator, chip and communication terminal |
| CN108540130A (en) * | 2018-04-10 | 2018-09-14 | 中国科学院微电子研究所 | Dynamic comparator |
| CN108964639A (en) * | 2018-06-06 | 2018-12-07 | 电子科技大学 | A kind of two-way hysteresis comparator |
| CN109613328B (en) * | 2019-01-14 | 2020-11-27 | 电子科技大学 | Cross-coupling rapid overcurrent detection circuit |
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| US11456734B2 (en) | 2020-08-10 | 2022-09-27 | Changxin Memory Technologies, Inc. | Comparator |
| WO2022033006A1 (en) * | 2020-08-10 | 2022-02-17 | 长鑫存储技术有限公司 | Comparator |
| CN112653433A (en) * | 2020-12-14 | 2021-04-13 | 重庆百瑞互联电子技术有限公司 | Hybrid two-tail dynamic latch comparator |
| CN112653433B (en) * | 2020-12-14 | 2023-05-09 | 重庆百瑞互联电子技术有限公司 | Hybrid double-tail dynamic latching comparator |
| WO2023284092A1 (en) * | 2021-07-12 | 2023-01-19 | 长鑫存储技术有限公司 | Comparator and decision feedback equalization circuit |
| US11626869B2 (en) | 2021-07-12 | 2023-04-11 | Changxin Memory Technologies, Inc. | Comparator and decision feedback equalization circuit |
| CN113472327A (en) * | 2021-08-17 | 2021-10-01 | 安徽大学 | High-speed low-power-consumption double-tail current dynamic comparator circuit |
| CN113472327B (en) * | 2021-08-17 | 2023-06-20 | 安徽大学 | High-speed low-power-consumption double-tail current dynamic comparator circuit |
| CN114389585A (en) * | 2022-01-13 | 2022-04-22 | 电子科技大学 | High-speed low-offset latch comparator |
| TWI835095B (en) * | 2022-03-21 | 2024-03-11 | 瑞昱半導體股份有限公司 | Low kickback noise comparator |
| CN116488622A (en) * | 2023-04-03 | 2023-07-25 | 广东工业大学 | Low-power consumption dynamic comparator |
| CN116488622B (en) * | 2023-04-03 | 2024-02-02 | 广东工业大学 | Low-power consumption dynamic comparator |
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