CN109584825A - Display driving assembly and display device - Google Patents
Display driving assembly and display device Download PDFInfo
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- CN109584825A CN109584825A CN201811586506.XA CN201811586506A CN109584825A CN 109584825 A CN109584825 A CN 109584825A CN 201811586506 A CN201811586506 A CN 201811586506A CN 109584825 A CN109584825 A CN 109584825A
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- 239000004973 liquid crystal related substance Substances 0.000 description 6
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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Abstract
The application discloses display driving subassembly and display device, wherein, display driving subassembly is including the multistage drive circuit that cascades the setting, and drive circuit includes pre-charge sub-circuit, and pre-charge sub-circuit sets up to the level of pre-charging that produces first preset scanning signal according to this level of scanning signal, and pre-charge sub-circuit includes first edge trigger, and the pulse input end of first edge trigger is connected in this level of scanning line, and the intrinsic output or the inverting output of first edge trigger are connected in first preset scanning line. The technical scheme of the application provides the display device who charges evenly, has improved the display effect.
Description
Technical field
This application involves field of display technology, in particular to a kind of display driving assembly and display device.
Background technique
Here statement only provides background information related with the application, without inevitably constituting the prior art.Display dress
It sets and has become display platform important in the fields such as modern information technologies, have a wide range of applications in the products such as video signal.
In a kind of display device, driving signal is generated according to picture signal to be shown, generallys use the mode of progressive scan driving,
Realize the driving to display panel in display device.
However, the resolution ratio with display panel is higher and higher, it is easy to charging unevenness, especially display panel occur
Charge unsaturated phenomenon for distal end.
Summary of the invention
The main purpose of the application is to propose a kind of display driving assembly, realizes a kind of uniform display device of charging,
Improve display effect.
To achieve the above object, the display driving assembly that the application proposes, the multiple drive power circuit including cascade setting, institute
Stating driving circuit includes preliminary filling sub-circuit, and the preliminary filling sub-circuit is set as being swept according to the first default grade of the same level scanning signal generation
The precharge level of signal is retouched, the preliminary filling sub-circuit includes the first edge triggered flip flop, and the pulse of first edge triggered flip flop is defeated
Enter end and be connected to the same level scan line, it is default that the intrinsic output end or reversed-phase output of first edge triggered flip flop are connected to first
Grade scan line.
Optionally, the preliminary filling sub-circuit includes switching device, and the gate electrode of the switching device is connected to described first
The intrinsic output end or reversed-phase output of edge triggered flip flop, the source electrode of the switching device are connected to high level signal source, institute
The drain electrode for stating switching device is connected to the described first default grade scan line.
Optionally, the described first default grade scan line is the rear two-stage scan line of the same level scan line.
Optionally, the preliminary filling sub-circuit includes the first phase inverter, and the input terminal of first phase inverter is connected to described
The intrinsic output end of first edge triggered flip flop, the output end of first phase inverter are connected to the control of first edge triggered flip flop
Input terminal processed；Wherein, the switching device is negative type metal oxide semiconductor thin film transistor (TFT), first edge triggered flip flop
For rising edge flip-flops.
Optionally, the preliminary filling sub-circuit includes the first one way conducting device, the anode of first one way conducting device
It is connected to the output end of first phase inverter, the cathode of first one way conducting device is connected to the grid of the switching device
Electrode.
Optionally, the driving circuit includes charging sub-circuit, and the charging sub-circuit, which is set as being scanned according to the same level, to be believed
Number generating the unblocked level of the second default grade scanning signal, the charging sub-circuit includes the second edge triggered flip flop, and described second
The pulse input end of edge triggered flip flop is connected to the same level scan line, and the intrinsic output end or reverse phase of second edge triggered flip flop are defeated
Outlet is connected to the second default grade scan line.
Optionally, the described second default grade scan line is the rear stage scan line of the same level scan line.
Optionally, the charging sub-circuit includes the second phase inverter, and the input terminal of second phase inverter is connected to described
The intrinsic output end of second edge triggered flip flop, the output end of second phase inverter are connected to the control of second edge triggered flip flop
Input terminal processed, and the output end of second phase inverter is connected to the rear stage scan line；Wherein, second edging trigger
Device is failing edge trigger.
Optionally, the charging sub-circuit includes the second one way conducting device, the anode of second one way conducting device
It is connected to the rear stage scan line, the cathode of second one way conducting device is connected to the arteries and veins of second edge triggered flip flop
Rush input terminal.
To achieve the above object, the application also proposes a kind of display device, the display device include display panel and
Show driving assembly, the display panel includes multi-strip scanning line；The display driving assembly includes that the multistage of cascade setting drives
Dynamic circuit, the driving circuit includes preliminary filling sub-circuit, and the preliminary filling sub-circuit is set as generating the according to the same level scanning signal
The precharge level of one default grade scanning signal, the preliminary filling sub-circuit include the first edge triggered flip flop, first edging trigger
The pulse input end of device is connected to the same level scan line, intrinsic output end or the reversed-phase output connection of first edge triggered flip flop
In the first default grade scan line.
In technical scheme, display driving assembly includes the multiple drive power circuit of cascade setting, and driving circuit includes
Preliminary filling sub-circuit, preliminary filling sub-circuit are set as generating the precharge level of the first default grade scanning signal according to the same level scanning signal,
Preliminary filling sub-circuit includes the first edge triggered flip flop, and the pulse input end of the first edge triggered flip flop is connected to the same level scan line, and first
The intrinsic output end or reversed-phase output of edge triggered flip flop are connected to the first default grade scan line.In the work of the first edge triggered flip flop
Under, when the same level scanning signal in the same level scan line is in rising edge or failing edge, the first edge triggered flip flop it is intrinsic defeated
Outlet or reversed-phase output output phase answer level, directly generation precharge level or turn by other components in preliminary filling sub-circuit
Generation precharge level is changed, first default grade of scan line is pre-charged, to avoid the distal end undercharge of display panel, improves charging
Uniformity, so as to improve the display effect of display device, also, the circuit structure of technical scheme is simple, helps to drop
The cost of low display device.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the structural schematic diagram of display device in an example；
Fig. 2 is the electrical block diagram that driving assembly and scan line are shown in one embodiment of the application display device；
Fig. 3 is the time diagram of the same level scanning signal, rear stage scanning signal and rear two-stage scan signal in Fig. 2.
The embodiments will be further described with reference to the accompanying drawings for realization, functional characteristics and the advantage of the application purpose.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiment is only a part of the embodiment of the application, instead of all the embodiments.Base
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
His embodiment, shall fall in the protection scope of this application.
It is to be appreciated that if relating to directionality instruction (such as up, down, left, right, before and after ...) in the embodiment of the present application,
Then directionality instruction be only used for explain under a certain particular pose (as shown in the picture) between each component relative positional relationship,
Motion conditions etc., if the particular pose changes, directionality instruction is also correspondingly changed correspondingly.
In addition, being somebody's turn to do " first ", " second " etc. if relating to the description of " first ", " second " etc. in the embodiment of the present application
Description be used for description purposes only, be not understood to indicate or imply its relative importance or implicitly indicate indicated skill
The quantity of art feature." first " is defined as a result, the feature of " second " can explicitly or implicitly include at least one spy
Sign.In addition, the meaning of the "and/or" occurred in full text is, and including three schemes arranged side by side, by taking " A and/or B " as an example, including A
The scheme that scheme or B scheme or A and B meet simultaneously.In addition, the technical solution between each embodiment can be combined with each other,
It but must be based on can be realized by those of ordinary skill in the art, when conflicting or nothing occurs in the combination of technical solution
Method realize when will be understood that the combination of this technical solution is not present, also not this application claims protection scope within.
Hereinafter the technical solution of the application will be elaborated by taking liquid crystal display device as an example, for the aobvious of other types
Showing device, those skilled in the art can refer to technical solution described hereinafter, improve to corresponding display driving assembly.
In an example, as shown in Figure 1, liquid crystal display device includes showing driving assembly 100 ' and display panel 200 ',
Wherein, display driving assembly 100 ' includes grid drive chip (Gate-chip on film, G-COF) 110 ' and source drive
Chip (Source-chip on film, S-COF) 120 ' etc.；Display panel 200 ' has viewing area 210 ' and non-display area
220'.Backlight module (not shown) is additionally provided in liquid crystal display device, backlight module is set as generating relatively uniform back
Light, the light source as liquid crystal display device.Display panel 200 ' includes multiple pixels, multiple data lines, multi-strip scanning line etc.,
In, multiple pixels are arranged in viewing area 210 ', and other relevant circuits etc. are equipped in non-display area 220 '.Display panel
The usual rectangular array shape arrangement of pixel on 200 ', pixel includes pixel electrode and pixel switch device.Pixel switch device
Usually thin film transistor (TFT) (Thin-film transistor, TFT), under the action of the scanning signal in scan line, TFT control
Data line processed charges to corresponding pixel electrode, so that voltage is formed between the pixel electrode and public electrode of pixel capacitance,
Control the deflection angle of liquid crystal in pixel.In general, including three kinds of red pixel, green pixel and blue pixel pictures in display panel 200 '
Element, the blue pixel of at least one red pixel, a green pixel and one forms a pixel group, to show colour according to spacing color mixed principle
Picture.Under the collective effect of data-signal of the pixel in the scanning signal and data line in scan line, liquid crystal hair therein
Raw deflection, light transmittance are accordingly modulated, and certain grayscale is gone out in conjunction with backlight display.In order to keep the pixel level on pixel electrode
To ensure display effect, storage capacitance etc. can also be set within the pixel.Scan line on display panel 200 ' is connected to display
The G-COF110 ' of driving assembly 100 ' is run under the scanning signal effect of G-COF110 ' output, and data line is connected to display
The S-COF120 ' of driving assembly 100 ' is run under the action of the data-signal of S-COF120 ' output.Certainly, driving group is shown
Part 100 ' can also include printed circuit board (Printed Circuit Board, PCB), timing controller (Timer
Control register Integrated Circuit, TCON IC) etc..In large scale display panel, in order to avoid filling
The non-uniform situation of electricity generates, and can be set multiple G-COF110 ', i.e. G-COF1111 ' shown in Fig. 1, G-COF2112 ',
G-COF3113 ' etc. charges respectively to the different zones of display panel.And in order to ensure effective biography of large-scale display data
It is defeated, multiple S-COF120 ', i.e. S-COF1121 ' shown in Fig. 1, S-COF2122 ' etc. can also be set, to reduce each S-
The burden of COF.However, the cost of the display device in the example is also relatively high due to the higher cost of G-COF, S-COF.
The application proposes a kind of display driving assembly, by the way that preliminary filling sub-circuit, realization pair are arranged in display driving assembly
The uniform charging of display panel, so as to improve display effect.
In the embodiment of the application, as shown in Fig. 2, display driving assembly includes the multiple drive power circuit of cascade setting
110, driving circuit 110 includes preliminary filling sub-circuit 111, and preliminary filling sub-circuit 111 is set as generating first according to the same level scanning signal
The precharge level of default grade scanning signal, preliminary filling sub-circuit 111 include the first edge triggered flip flop D1, the first edge triggered flip flop D1's
Pulse input end C is connected to the same level scan line 210, the intrinsic output end Q or reversed-phase output of the first edge triggered flip flop D1Even
It is connected to the first default grade scan line 210.
Specifically, display driving assembly is cascade setting, each stage drive circuit 110 and the same level scan line 210 and phase
Adjacent level-one or what scan line 220 are connected, and driving circuit 110 includes preliminary filling sub-circuit 111, with the same level in the same level scan line
The lower precharge level for generating rear class scan line of scanning signal control, is in advance pre-charged rear class scan line, to compensate display surface
In plate the problem of the undercharge of distal end.In the present embodiment, preliminary filling sub-circuit 111 includes the first edge triggered flip flop D1, wherein side
The a certain agreement jump (rising edge or failing edge) that can receive pulse along trigger comes input data then, common edge
Trigger includes d type flip flop etc..When the pulse input end C of the first edge triggered flip flop D1 receives the rising edge of the same level scanning signal
Or when failing edge, intrinsic output end Q or reversed-phase outputLevel related with the level of control signal D will be exported.It is logical
The the first edge triggered flip flop D1 for crossing selection suitable species, can be by its intrinsic output end Q or reversed-phase outputThe level of output
Directly as the precharge level of the first default grade scan line；Alternatively, by the conversion of other components in preliminary filling sub-circuit 111,
By its intrinsic output end Q or reversed-phase outputThe level conversion of output is the precharge level of the first default grade scan line, is realized
To the preliminary filling of the first default grade scan line.Wherein, the Series Relations between the first default grade scan line and the same level scan line and drive
Sequential relationship in dynamic circuit 110 between each signal is related.First edge triggered flip flop D1 can be rising edge flip-flops or decline
Along trigger, and its intrinsic output end Q and reversed-phase outputThe mutual reverse phase of the signal exported.
In this example it is shown that driving assembly includes the multiple drive power circuit 110 of cascade setting, driving circuit 110 is wrapped
Preliminary filling sub-circuit 111 is included, preliminary filling sub-circuit 111 is set as generating the pre- of the first default grade scanning signal according to the same level scanning signal
Chargin level, preliminary filling sub-circuit 111 include the first edge triggered flip flop D1, and the pulse input end C of the first edge triggered flip flop D1 is connected to
The same level scan line, the intrinsic output end Q or reversed-phase output of the first edge triggered flip flop D1It is connected to the first default grade scan line.
Under the action of the first edge triggered flip flop D1, when the same level scanning signal in the same level scan line is in rising edge or failing edge,
The intrinsic output end Q or reversed-phase output of first edge triggered flip flop D1Output phase answers level, directly generation precharge level or warp
The conversion for crossing other components in preliminary filling sub-circuit generates precharge level, is pre-charged to first default grade of scan line, to avoid aobvious
Show the distal end undercharge of panel, improves charging uniformity, so as to improve the display effect of display device, also, the application skill
The circuit structure of art scheme is simple, facilitates the cost for reducing display device.
As shown in Fig. 2, hereinafter will be with N stage drive circuit 110 and N grades of scan line Gate line (N), N+1 grades
It is described in detail for relationship between scan line Gate line (N+1) and N+2 grades of scan line Gate line (N+2), also
It is to preset grade scan line using the rear two-stage scan line Gate line (N+2) of the same level scan line Gate line (N) as first, when
When needing to be pre-charged other grades of scan lines, between 110 relative scanning line 120 of each signal sequence and driving circuit
Connection type etc. is adaptively adjusted.
Optionally, as shown in Fig. 2, preliminary filling sub-circuit 111 includes switching device M, the gate electrode of switching device M is connected to the
The intrinsic output end Q or reversed-phase output of one edge triggered flip flop D1The source electrode of switching device M is connected to high level signal
Source, the drain electrode of switching device are connected to the first default grade scan line.
As shown in Figures 2 and 3, as the intrinsic output end Q or reversed-phase output of the first edge triggered flip flop D1Control switch
When device M is in the conductive state, it is connected between the source electrode and drain electrode of switching device M, therefore the generation of high level signal source
High level Vgh ' can be exported on Gate line (N+2), be pre-charged to Gate line (N+2), and Gate line (N is made
+ 2) level of the scanning signal G (N+2) at least reaches time high level state in advance.Further, as Gate line (N+2)
When itself is in the open state, scanning signal G (N+2) reaches the high level state for meeting display driving demand, to drive correspondence
The display of pixel.Wherein, the source electrode of switching device M can be connected with constant pressure high level signal source；It can also be with other scannings
Line is connected, that is, using other scan lines with high level state as high level signal source, is pre-charged to rear class scan line,
In this setup, need to be connected in the source electrode of switching device M according to the sequential relationship determination between each signal
The series of scan line.In Fig. 3, the period of each scanning signal is suitable with display one frame duration of picture, in general, display is to use
Driving method is realized line by line.
In a specific example, as shown in Fig. 2, preliminary filling sub-circuit 111 includes the first phase inverter B1, the first phase inverter B1's
Input terminal is connected to the intrinsic output end Q of the first edge triggered flip flop D1, and the output end of the first phase inverter B1 is connected to the first edge
The control signal D of trigger D1；Wherein, switching device M is negative type metal oxide semiconductor thin film transistor (TFT) (N-Metal
Oxide Semiconductor TFT, NMOS TFT), the first edge triggered flip flop D1 is rising edge flip-flops.
As shown in figure 3, when N grades of scanning signal G (N) are converted to high level state by low level state, due to first
Edge triggered flip flop D1 is rising edge flip-flops, specifically can be rising edge d type flip flop, and function is when pulse input end C is received
To scanning signal G (N) rising edge when, the logic level of its control signal D is assigned to intrinsic output end Q, then at this time
The input end of one phase inverter B1 is in low level state.By the inverting function of the first phase inverter B1, switching device M is because of its grid
It is connected in high level state, then high level signal source exports high level Vgh ' to the drain electrode for being connected to switching device M
Gate line (N+2) is pre-charged Gate line (N+2).
Optionally, as shown in Fig. 2, preliminary filling sub-circuit 111 includes the first one way conducting device A1, the first one way conducting device
The anode of A1 is connected to the output end of the first phase inverter B1, and the cathode of the first one way conducting device A1 is connected to switching device M's
Gate electrode.
Wherein, the first one way conducting device A1 can be the diode etc. with unilateal conduction characteristic.When the first phase inverter
The output of B1 is when the gate electrode of high level state, switching device M are in low level state, the first one way conducting device A1
Conducting, so that the gate electrode of switching device M is converted to high level state and is connected, to be pre-charged to Gate line (N+2).
When the output of the first phase inverter B1 is in high level state in the gate electrode of low level state, switching device M, first is single
Reversely end to conduction device A1, to avoid interference signal influences Gate line (N+2) and causes display mistake.
In above-described embodiment of the application, as shown in Fig. 2, driving circuit includes charging sub-circuit 112, charge sub-circuit
112 are set as generating the unblocked level of the second default grade scanning signal according to the same level scanning signal, and charging sub-circuit 112 includes the
Two edge triggered flip flop D2, the pulse input end C of the second edge triggered flip flop D2 are connected to the same level scan line, the second edge triggered flip flop D2
Intrinsic output end Q or reversed-phase outputIt is connected to the second default grade scan line.
Specifically, charging sub-circuit 112 includes the second edge triggered flip flop D2, when the pulse input of the second edge triggered flip flop D2
When end C receives the rising edge or failing edge of the same level scanning signal, intrinsic output end Q or reversed-phase outputThe level of output
It is related with the level of control signal D.It, can be by its intrinsic output end by selecting the second edge triggered flip flop D2 of suitable species
Q or reversed-phase outputFor the level of output directly as the unblocked level of the second default grade scan line, it is pre- that control is connected to second
If each pixel in grade scan line opens and shows image；Alternatively, by the conversion of other components in charging sub-circuit 112,
By its intrinsic output end Q or reversed-phase outputThe level conversion of output is the unblocked level of the second default grade scan line, with reality
The display of existing image.Wherein, each in the Series Relations and driving circuit 110 between the second default grade scan line and the same level scan line
Sequential relationship between signal is related.Second edge triggered flip flop D2 can be rising edge flip-flops or failing edge trigger, and its
Intrinsic output end Q and reversed-phase outputThe mutual reverse phase of the signal exported.
As shown in Fig. 2, hereinafter will be using the second default grade scan line as the rear stage of the same level scan line Gate line (N)
It is described in detail for scan line Gate line (N), when needing to generate the unblocked level of other grades of scan lines, when to each signal
Connection type etc. between 110 relative scanning line 120 of sequence and driving circuit is adaptively adjusted.
Optionally, as shown in Fig. 2, the input terminal that charging sub-circuit 112 includes the second phase inverter B2, the second phase inverter B2 connects
It is connected to the intrinsic output end Q of the second edge triggered flip flop D2, the output end of the second phase inverter B2 is connected to the second edge triggered flip flop D2
Control signal D, and the output end of the second phase inverter B2 is connected to rear stage scan line；Wherein, the second edge triggered flip flop D2
For failing edge trigger.
As shown in Figures 2 and 3, when N grades of scanning signal G (N) are converted to high level state by low level state, due to
Second edge triggered flip flop D2 is failing edge trigger, specifically can be failing edge d type flip flop, and function is as pulse input end C
When receiving the failing edge of scanning signal G (N), the logic level of its control signal D is assigned to intrinsic output end Q, then this
When the second phase inverter B2 input end in low level state.By the inverting function of the second phase inverter B2, the same level scanning is exported
The unblocked level of signal G (N) makes to be connected to Gate to the Gate line (N+1) for the output end for being connected to the second phase inverter B2
Each pixel column of line (N+1) is opened, to show certain image.In general, the unblocked level Vgh of scanning signal can be greater than
Or the precharge level Vgh ' equal to the output of high level signal source.
Optionally, as shown in Fig. 2, charging sub-circuit 112 includes the second one way conducting device A2, the second one way conducting device
The anode of A2 is connected to rear stage scan line Gate line (N+1), and the cathode of the second one way conducting device A2 is connected to the second side
Along the pulse input end C of trigger D2.
Wherein, the second one way conducting device A2 can be the diode etc. with unilateal conduction characteristic.When the second phase inverter
For the output of B2 when the pulse input end C of high level state, the second edge triggered flip flop D2 are in low level state, second is single
It is connected to conduction device A2, to ensure the normal operation of driving circuit 110.When the output of the second phase inverter B2 is in low level
Pulse input end C when being in high level state of state, the second edge triggered flip flop D2, the second one way conducting device A2 is reversely cut
Only, to avoid interfering with each other between signal.
As shown in Fig. 2, the application also proposes a kind of display device, which includes display panel and display driving group
Part, display panel include multi-strip scanning line 210, and the specific structure of the display driving assembly is referring to above-described embodiment, herein no longer
It repeats one by one.
The foregoing is merely the alternative embodiments of the application, are not intended to limit the scope of the patents of the application, all at this
Under the inventive concept of application, using equivalent structure transformation made by present specification and accompanying drawing content, or directly/use indirectly
In the scope of patent protection that other related technical areas are included in the application.
Claims (10)
1. a kind of display driving assembly, which is characterized in that the display driving assembly includes the multiple drive power circuit of cascade setting,
The driving circuit includes:
Preliminary filling sub-circuit, the preliminary filling sub-circuit are set as generating the pre- of the first default grade scanning signal according to the same level scanning signal
Chargin level, the preliminary filling sub-circuit include the first edge triggered flip flop, and the pulse input end of first edge triggered flip flop is connected to
The same level scan line, the intrinsic output end or reversed-phase output of first edge triggered flip flop are connected to the first default grade scan line.
2. display driving assembly as described in claim 1, which is characterized in that the preliminary filling sub-circuit includes:
Switching device, the gate electrode of the switching device be connected to first edge triggered flip flop intrinsic output end or reverse phase it is defeated
Outlet, the source electrode of the switching device are connected to high level signal source, and the drain electrode of the switching device is connected to described
One default grade scan line.
3. display driving assembly as claimed in claim 2, which is characterized in that the described first default grade scan line is described the same level
The rear two-stage scan line of scan line.
4. display driving assembly as claimed in claim 3, which is characterized in that the preliminary filling sub-circuit includes:
First phase inverter, the input terminal of first phase inverter are connected to the intrinsic output end of first edge triggered flip flop, institute
The output end for stating the first phase inverter is connected to the control signal of first edge triggered flip flop；
Wherein, the switching device is negative type metal oxide semiconductor thin film transistor (TFT), and first edge triggered flip flop is upper
It rises along trigger.
5. display driving assembly as claimed in claim 4, which is characterized in that the preliminary filling sub-circuit includes:
First one way conducting device, the anode of first one way conducting device are connected to the output end of first phase inverter,
The cathode of first one way conducting device is connected to the gate electrode of the switching device.
6. the display driving assembly as described in any one of claims 1 to 5, which is characterized in that the driving circuit includes:
Charge sub-circuit, and the charging sub-circuit is set as generating opening for the second default grade scanning signal according to the same level scanning signal
Level is opened, the charging sub-circuit includes the second edge triggered flip flop, and the pulse input end of second edge triggered flip flop is connected to
The same level scan line, the intrinsic output end or reversed-phase output of second edge triggered flip flop are connected to the second default grade scan line.
7. display driving assembly as claimed in claim 6, which is characterized in that the described second default grade scan line is described the same level
The rear stage scan line of scan line.
8. display driving assembly as claimed in claim 7, which is characterized in that the charging sub-circuit includes:
Second phase inverter, the input terminal of second phase inverter are connected to the intrinsic output end of second edge triggered flip flop, institute
The output end for stating the second phase inverter is connected to the control signal of second edge triggered flip flop, and second phase inverter is defeated
Outlet is connected to the rear stage scan line；
Wherein, second edge triggered flip flop is failing edge trigger.
9. display driving assembly as claimed in claim 7, which is characterized in that the charging sub-circuit includes:
Second one way conducting device, the anode of second one way conducting device are connected to the rear stage scan line, and described
The cathode of two one way conducting devices is connected to the pulse input end of second edge triggered flip flop.
10. a kind of display device, which is characterized in that the display device includes:
Display panel, the display panel include multi-strip scanning line；And
Display driving assembly as claimed in any one of claims 1-9 wherein.
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