CN115547271B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN115547271B CN115547271B CN202211327757.2A CN202211327757A CN115547271B CN 115547271 B CN115547271 B CN 115547271B CN 202211327757 A CN202211327757 A CN 202211327757A CN 115547271 B CN115547271 B CN 115547271B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The application discloses a display panel and a display device, wherein the display panel comprises at least one precharge circuit which is simultaneously connected with at least 3 rows of scanning lines; the precharge circuit comprises a pulse trigger, a first switch, a second switch, a third switch, a first diode, a second diode and a third diode, and when the nth row scanning line receives a scanning signal, the pulse trigger controls the first switch and the second switch to be opened so as to precharge pixels corresponding to the n+a th row scanning line and the n+b th row scanning line; when the n+1th row scanning line receives a scanning signal, the pulse trigger controls the third switch to be opened, so that pixels corresponding to the n+c row scanning line are precharged. Through the design, the pixels in the display panel can be precharged, the response time of liquid crystal is shortened, and the charging rate of the pixels is improved.
Description
The present application is a divisional application of chinese patent application with application number 2021116486448, titled "display panel, method of pre-charging display panel and display device", whose entire contents are incorporated herein by reference, on application day 2021, 12 and 30.
Technical Field
The present application relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
The liquid crystal display panel mainly comprises an array substrate and a color film substrate which are opposite to each other and sandwich liquid crystal therebetween, wherein a scanning line, a data line, a pixel electrode and a thin film transistor are formed on the array substrate, a common electrode is formed on the color film substrate, and the pixel electrode and the corresponding common electrode form a pixel. Each pixel electrode is controlled by a thin film transistor, and when the thin film transistor is turned on, the pixel is charged for an on time, and after the thin film transistor is turned off, the pixel voltage is maintained to be charged again until the next scanning.
With the development of display technology, the scanning frequency is higher and higher, which can lead to insufficient charging time for pixels; the liquid crystal is driven by alternating current, that is, the polarity of the pixel voltage of the currently charged pixel is opposite to the polarity of the pixel voltage of the last frame stored in the pixel, if the charging time of the pixel is insufficient, the response time of the liquid crystal is prolonged, and the picture display is affected.
Disclosure of Invention
The application aims to provide a display panel and a display device, which are used for precharging pixels in the display panel, accelerating response time of liquid crystal and improving charging rate of the pixels.
The application discloses a display panel, which comprises a plurality of scanning lines arranged in parallel and at least one precharge circuit, wherein the precharge circuit is simultaneously connected with at least 3 rows of scanning lines; the precharge circuit comprises a pulse trigger, a first switch, a second switch, a first diode, a second diode, a third diode and a third switch, wherein the pulse trigger comprises a first input end, a second input end, a first output end and a second output end, the first input end is connected with an nth row scanning line, the second input end is connected with a first high-level signal line, and the first output end and the second output end output opposite level signals; the first switch is an N-type switch, the base electrode of the first switch is connected with the first output end, the collector electrode of the first switch is connected with a second high-level signal line, and the emitter electrode of the first switch is connected with an n+a line scanning line; the second switch is a P-type switch, the base electrode of the second switch is connected with the second output end, the collector electrode of the second switch is connected with a third high-level signal line, and the emitter electrode of the second switch is connected with an n+b row scanning line;
the positive electrode of the first diode is connected with the nth row scanning line, and the negative electrode of the first diode is connected with the first input end; the positive electrode of the second diode is connected with the n+a row scanning line, and the negative electrode of the second diode is connected with the first input end; the positive electrode of the third diode is connected with the joint of the positive electrode of the second diode and the n+a row scanning line, and the negative electrode of the third diode is connected with the emitter of the first switch; the third switch is an N-type switch, the base electrode of the third switch is connected with the second output end, the collector electrode of the third switch is connected with a fourth high-level signal line, and the emitter electrode of the third switch is connected with an n+c row scanning line;
when the nth row scanning line receives a scanning signal, the pulse trigger controls the first switch and the second switch to be opened, so that pixels corresponding to the nth+a row scanning line and the nth+b row scanning line are precharged; when the n+1th row scanning line receives a scanning signal, the pulse trigger controls the third switch to be opened so as to precharge pixels corresponding to the n+c th row scanning line; wherein n, a, b, c is a natural number equal to or greater than 1, and a is not equal to b and c is not equal to b.
Optionally, a is equal to 1.
Optionally, the n+a-th line scan line, the n+b-th line scan line, and the n+c-th line scan line are adjacent scan lines.
Alternatively, b is equal to 2 and c is equal to 3.
Optionally, the pulse trigger is a T-type trigger or a T-type leading edge pulse trigger.
Optionally, the second high-level signal line, the third high-level signal line and the fourth high-level signal line are connected.
The application also discloses a display panel, which comprises a plurality of scanning lines which are arranged in parallel and at least one precharge circuit, wherein the precharge circuit is simultaneously connected with at least 3 rows of scanning lines; the precharge circuit comprises a pulse trigger, a first switch, a second switch, a first diode, a second diode, a third diode and a third switch, wherein the pulse trigger comprises a first input end, a second input end, a first output end and a second output end, the first input end is connected with an nth row scanning line, the second input end is connected with a first high-level signal line, and the first output end and the second output end output opposite level signals; the first switch is an N-type switch, the base electrode of the first switch is connected with the first output end, the collector electrode of the first switch is connected with a second high-level signal line, and the emitter electrode of the first switch is connected with an n+a line scanning line; the second switch is a P-type switch, the base electrode of the second switch is connected with the second output end, the collector electrode of the second switch is connected with a third high-level signal line, and the emitter electrode of the second switch is connected with an n+b row scanning line;
the positive electrode of the first diode is connected with the nth row scanning line, and the negative electrode of the first diode is connected with the first input end; the positive electrode of the second diode is connected with the n+a row scanning line, and the negative electrode of the second diode is connected with the first input end; the positive electrode of the third diode is connected with the joint of the positive electrode of the second diode and the n+a row scanning line, and the negative electrode of the third diode is connected with the emitter of the first switch; the third switch is a P-type switch, the base electrode of the third switch is connected with the first output end, the collector electrode of the third switch is connected with a fourth high-level signal line, and the emitter electrode of the third switch is connected with an n+c row scanning line;
when the nth row scanning line receives a scanning signal, the pulse trigger controls the first switch and the second switch to be opened, so that pixels corresponding to the nth+a row scanning line and the nth+b row scanning line are precharged; when the n+1th row scanning line receives a scanning signal, the pulse trigger controls the third switch to be opened so as to precharge pixels corresponding to the n+c th row scanning line; wherein n, a, b, c is a natural number equal to or greater than 1, and a is not equal to b and c is not equal to b.
Optionally, the n+a-th line scan line, the n+b-th line scan line, and the n+c-th line scan line are adjacent scan lines.
Alternatively, a is equal to 1, b is equal to 3, and c is equal to 2.
The application also discloses a display device which comprises the backlight module and the display panel, wherein the backlight module provides backlight for the display panel.
According to the application, the precharge circuit is additionally arranged in the display panel, and the principle of two opposite output ends in the pulse trigger is utilized, and the first switch, the second switch and the third switch of two different types are combined, so that when the pixels corresponding to the nth row scanning line are charged, the first switch and the second switch are simultaneously opened by the pulse trigger, and the pixels corresponding to the n+a row scanning line and the n+b row scanning line are precharged; when the n+1th row scanning line receives a scanning signal, the pulse trigger controls the third switch to be opened so as to precharge pixels corresponding to the n+c th row scanning line; when the n+a line scanning line, the n+b line scanning line and the n+c line scanning line receive scanning signals, after the voltage of the previous precharge process is combined, the charging voltage can be adjusted to a higher level, so that the response time of liquid crystal is shortened, the charging rate of pixels is improved, and the display effect of pictures is ensured. Moreover, the voltages for precharging the pixels corresponding to the n+a-th, n+b-th, and n+c-th row scanning lines come from the high-level signal line instead of the voltage in the scanning line, thereby avoiding the problem of voltage division causing the voltage corresponding to the n+a-th row scanning line to decrease.
Drawings
The accompanying drawings, which are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is evident that the figures in the following description are only some embodiments of the application, from which other figures can be obtained without inventive effort for a person skilled in the art. In the drawings:
FIG. 1 is a schematic diagram of a display device according to the present application;
fig. 2 is a flowchart of a method for precharging a display panel according to the present application;
FIG. 3 is a schematic diagram of a display panel circuit according to a first embodiment of the present application;
FIG. 4 is a schematic diagram of a display panel circuit according to a second embodiment of the present application;
FIG. 5 is a schematic diagram of a display panel circuit according to a third embodiment of the present application;
FIG. 6 is a schematic diagram of a display panel circuit according to a fourth embodiment of the present application;
fig. 7 is a flowchart of a precharge method of a display panel in a fourth embodiment of the present application.
10, a display device; 100. a display panel; 110. a scanning line; 120. a first high-level signal line; 130. a second high-level signal line; 140. a third high-level signal line; 150. a fourth high-level signal line; 160. a fifth high-level signal line; 200. a precharge circuit; 210. a pulse trigger; 211. a first input; 212. a second input terminal; 213. a first output terminal; 214. a second output terminal; 220. a first switch, 230, a second switch; 240. a third switch; 250. a fourth switch; 260. a first diode; 270. a second diode; 280. a third diode; 300. and a backlight module.
Detailed Description
It is to be understood that the terminology used herein, the specific structural and functional details disclosed are merely representative for the purpose of describing particular embodiments, but that the application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
The application is described in detail below with reference to the attached drawings and alternative embodiments.
As shown in fig. 1 and 3, the present application discloses a display device 10, wherein the display device 10 includes a backlight module 300 and a display panel 100, and the backlight module 300 provides backlight for the display panel 100. The display panel 100 includes a precharge circuit 200, specifically, the display panel 100 includes a plurality of scan lines 110 arranged in parallel and at least one precharge circuit 200, and the precharge circuit 200 is simultaneously connected to at least 3 rows of scan lines 110; the precharge circuit 200 includes a pulse trigger 210, a first switch 220, and a second switch 230, the pulse trigger 210 includes a first input terminal 211, a second input terminal 212, a first output terminal 213, and a second output terminal 214, the first input terminal 211 is connected to the nth row scan line 110, the second input terminal 212 is connected to the first high level signal line 120, and the first output terminal 213 and the second output terminal 214 output opposite level signals.
The first switch 220 is an N-type switch, a base electrode of the first switch 220 is connected to the first output end 213, a collector electrode of the first switch 220 is connected to the second high-level signal line 130, and an emitter electrode of the first switch 220 is connected to the n+a-th row scanning line 110; the second switch 230 is a P-type switch, a base electrode of the second switch 230 is connected to the second output terminal 214, a collector electrode of the second switch 230 is connected to the third high-level signal line 140, and an emitter electrode of the second switch 230 is connected to the n+b-th row scanning line 110; when the nth row scan line 110 receives a scan signal, the pulse trigger 210 controls the first switch 220 and the second switch 230 to be turned on, so that the pixels corresponding to the n+a and the n+b th row scan lines 110 are precharged; wherein n, a and b are natural numbers greater than or equal to 1, and a is not equal to b.
In the application, when a row of pixels is charged, at least two rows of pixels can be precharged, by adding the precharge circuit 200 in the display panel 100 and utilizing the principle of two opposite output ends in the pulse trigger 210 and combining two different types of the first switch 220 and the second switch 230, when the pixels corresponding to the nth row scanning line 110 are charged, the pulse trigger 210 simultaneously opens the first switch 220 and the second switch 230 and precharges the pixels corresponding to the n+a row scanning line 110 and the n+b row scanning line 110, so that when the nth+a row scanning line 110 and the nth+b row scanning line 110 receive scanning signals, the charging voltage can be adjusted to a higher level after combining the voltage of the previous precharge process, thereby accelerating the response time of liquid crystal, improving the charging rate of the pixels and ensuring the display effect of pictures. Also, the voltages for precharging the pixels corresponding to the n+a-th and n+b-th scanning lines 110 and 110 come from the high-level signal line instead of the voltage in the scanning line 110, thereby avoiding the problem that the voltage corresponding to the n+a-th scanning line 110 is lowered due to the voltage division.
Specifically, the pulse trigger 210 may be a T-type trigger or a T-type leading edge pulse trigger, and its specific working principle is as follows: when the gate driving chip outputs the CLK signal to the n-th row scan line 110, the first input terminal 211 of the pulse trigger 210 receives the CLK signal, the input signal t=1, the states of the pulse trigger 210 are opposite, i.e., the states of the first output terminal 213 and the second output terminal 214 are opposite, at this time, the signal output from the first output terminal 213 is 1 or 0, the signal output from the second output terminal 214 is 0 or 1, and the first output terminal 213 and the second output terminal 214 can only open different types of switches, thereby precharging the pixels corresponding to the n+a-th row scan line 110 and the n+b-th row scan line 110.
The first high-level signal line 120 may be externally connected to a power supply, or may be directly connected to the working voltage vdd inside the display panel 100; the second high-level signal line 130 and the third high-level signal line 140 may be connected to an external power source or connected to the gate-on signal line VGH in the display panel 100.
The precharge circuit 200 can be implemented in a driving chip to reduce the frame of the display panel 100, and avoid other problems caused by the complicated structure of the display panel 100 due to the complicated structure of the circuit. Also, by the precharge circuit 200 built inside the driving chip, peripheral circuits can be provided, and the on-time of the pulse flip-flop 210 can be adjusted by adjusting Vdd. While precharge circuit 200 may or may not be on-board. In addition, vdd can be regulated, so that precharge can be guaranteed on some pictures, but not all pictures, and further more use requirements can be met.
It should be noted that the technical solution of the present application is applicable not only to the dot inversion driving method but also to the column inversion or other inversion driving methods.
Correspondingly, as shown in fig. 2, the application also discloses a method for precharging the display panel, which is used for precharging the display panel 100, and comprises the following steps:
s1: the first high-level signal line, the second high-level signal line and the third high-level signal line are conducted, so that a second input end of a pulse trigger in the precharge circuit, a collector electrode of the first switch and a collector electrode of the second switch are connected with high-level signals;
s2: the nth row scanning line receives the scanning signal and charges the pixels corresponding to the nth row scanning line;
s3: a first input end of a pulse trigger in the precharge circuit receives a high-level signal, and a first output end and a second output end of the trigger output opposite signals, so that a first switch and a second switch are opened;
s4: the n+a-th row scanning line receives the high-level signal of the second high-level signal line and precharges pixels corresponding to the n+a-th row scanning line; the n+b-th scanning line receives the high-level signal of the third high-level signal line, and precharges the pixels corresponding to the n+b-th scanning line.
The precharge circuit 200 of the present application may form a group of charge structures with three scan lines 110 and pixels thereof, each three scan lines 110 corresponding to one precharge circuit 200; the precharge circuit 200 may also form a group of charging structures with four scan lines 110 and pixels thereof, each four scan lines 110 corresponding to one precharge circuit 200; the precharge circuit 200 may also form a group of charging structures with five scan lines 110 and pixels thereof, and each of the five scan lines 110 corresponds to one precharge circuit 200, which is described in detail in the following embodiments.
Embodiment one:
as shown in fig. 3, the precharge circuit 200 is connected to three scan lines 110 simultaneously, and each three scan lines 110 corresponds to one precharge circuit 200, and when the pixels corresponding to the first scan line 110 in the charging structure are charged, the pixels corresponding to the other two scan lines 110 are precharged simultaneously.
In this embodiment, the precharge circuit 200 may be connected to any three scan lines 110, i.e., a, b are natural numbers equal to or greater than 1, and a is not equal to b. When a is equal to 1 and b is equal to 2, the precharge circuit 200 is connected to the adjacent three scan lines 110, and at this time, if the pixels corresponding to the current scan line 110 are charged, the pixels corresponding to the next two scan lines 110 can be precharged at the same time; in addition, the arrangement mode of the precharge circuit 200 is regular, and one precharge circuit 200 is designed for every three scan lines 110, so that the design and the installation of the precharge circuit 200 are convenient, and errors are avoided.
Taking the display panel 100 with a resolution of 3840×2160 as an example, the number of effective scan lines 110 is 2160, and thus 2160/3=720 registers are required, and one precharge circuit 200 is disposed on each register.
Embodiment two:
as shown in fig. 4, unlike the first embodiment, the precharge circuit 200 is connected to four scan lines 110 at the same time, and each four scan lines 110 corresponds to one precharge circuit 200.
At this time, the precharge circuit 200 further includes a first diode 260, a second diode 270, a third diode 280, and a third switch 240, wherein an anode of the first diode 260 is connected to the nth row scan line 110, and a cathode of the first diode 260 is connected to the first input terminal 211; the anode of the second diode 270 is connected to the n+1th row scanning line 110, and the cathode of the second diode 270 is connected to the first input terminal 211; the positive electrode of the third diode 280 is connected to the junction between the positive electrode of the second diode 270 and the n+1th row scanning line 110, and the negative electrode of the third diode 280 is connected to the emitter of the first switch 220. When the nth row scan line 110 receives the scan signal, a high level from the nth row scan line 110 is supplied to the first input terminal 211 of the pulse trigger 210 through the first diode 260, but cannot be supplied to the n+1th row scan line 110 through the second diode 270; when a=1, the n+1 row scan line 110 is the next row scan line 110, and when the n-th row scan line 110 receives the scan signal, the first switch 220 is turned on to precharge the pixels corresponding to the n+1 row scan line 110, and at this time, the high level signal does not enter the first input terminal 211 of the pulse trigger 210 through the second diode 270 due to the effect of the third diode 280.
The third switch 240 is an N-type switch, a base electrode of the third switch 240 is connected to the second output end 214, a collector electrode of the third switch 240 is connected to the fourth high-level signal line 150, and an emitter electrode of the third switch 240 is connected to the n+c-th row scanning line 110; when the nth row scan line 110 receives a scan signal, the pulse trigger 210 controls the first switch 220 and the second switch 230 to be turned on, so that the pixels corresponding to the n+a and the n+b th row scan lines 110 are precharged; when the n+1th row scanning line 110 receives a scanning signal, the pulse trigger 210 controls the third switch 240 to be turned on, so that the pixels corresponding to the n+c th row scanning line 110 are precharged; wherein a, b and c are natural numbers greater than or equal to 1, and a, b and c are not equal to each other.
Since the T-type flip-flop changes the output state once every pulse, i.e. when the n-th row scan line 110 receives the scan signal, the first input terminal 211 of the pulse flip-flop 210 receives the high level signal, the output signal of the first output terminal 213 is 1, and the output signal of the second output terminal 214 is 0, and at this time, the first switch 220 and the second switch 230 can only be controlled to be opened to precharge the pixels corresponding to the n+a-th row scan line 110 and the n+b-th row scan line 110. When the n+1th row scan line 110 receives the scan signal, the first input terminal 211 of the pulse trigger 210 also receives the high level signal, but the output signal of the first output terminal 213 is 0, and the output signal of the second output terminal 214 is 1, and only the third switch 240 is controlled to be turned on, so as to precharge the pixels corresponding to the n+c row scan line 110.
Compared to the first embodiment, the present embodiment can precharge the pixels corresponding to all the scan lines 110 by fewer precharge circuits 200, and the precharge effect is not reduced yet. At this time, also taking the display panel 100 with the resolution of 3840×2160 as an example, the number of effective scan lines 110 is 2160, so 2160/4=540 registers are needed, and one precharge circuit 200 is disposed on each register, which is beneficial to reducing the number of registers and precharge circuits 200 and reducing the cost.
In addition, the n+a-th line 110, the n+b-th line 110, and the n+c-th line 110 may be any three lines 110, and it is preferable that the three lines 110 are adjacent lines 110, specifically, a is equal to 1, b is equal to 2, and c is equal to 3, so as to facilitate circuit design.
Embodiment III:
as shown in fig. 5, in this embodiment, the precharge circuit 200 is also connected to four scan lines 110, and precharges pixels corresponding to three scan lines 110, unlike the second embodiment, the third switch 240 in the precharge circuit 200 is a P-type switch, the base of the third switch 240 is connected to the first output terminal 213, the collector of the third switch 240 is connected to the fourth high-level signal line 150, and the emitter of the third switch 240 is connected to the n+c-th scan line 110; when the nth row scan line 110 receives a scan signal, the pulse trigger 210 controls the first switch 220 and the second switch 230 to be turned on, so that the pixels corresponding to the n+a-th row scan line 110 and the n+b-th row scan line 100 are precharged; when the n+1th row scanning line 110 receives a scanning signal, the pulse trigger 210 controls the third switch 240 to be turned on, so that the pixels corresponding to the n+c th row scanning line 110 are precharged; wherein a, b and c are natural numbers greater than or equal to 1, and a, b and c are not equal to each other.
Similarly, when the nth row scan line 110 receives the scan signal, the first input terminal 211 of the pulse trigger 210 receives the high level signal, the output signal of the first output terminal 213 is 1, the output signal of the second output terminal 214 is 0, and the first switch 220 and the second switch 230 can only be controlled to be turned on to precharge the pixels corresponding to the n+a row scan line 110 and the n+b row scan line 110. When the n+1th row scan line 110 receives the scan signal, the first input terminal 211 of the pulse trigger 210 also receives the high level signal, but the output signal of the first output terminal 213 is 0, and the output signal of the second output terminal 214 is 1, and only the third switch 240 is controlled to be turned on, so as to precharge the pixels corresponding to the n+c row scan line 110.
In this embodiment, the n+a-th line 110, the n+b-th line 110 and the n+c-th line 110 may be any three lines 110, and preferably the three lines 110 are adjacent lines 110, specifically, a is equal to 1, b is equal to 3, and c is equal to 2, so as to facilitate circuit design.
Embodiment four:
as shown in fig. 6, in this embodiment, the precharge circuit 200 is connected to five scan lines 110 at the same time, and unlike the first embodiment, the precharge circuit 200 further includes a first diode 260, a second diode 270, a third diode 280, a third switch 240, and a fourth switch 250, wherein an anode of the first diode 260 is connected to the nth row scan line 110, and a cathode of the first diode 260 is connected to the first input terminal 211; the anode of the second diode 270 is connected to the n+1th row scanning line 110, and the cathode of the second diode 270 is connected to the first input terminal 211; the positive electrode of the third diode 280 is connected to the junction between the positive electrode of the second diode 270 and the n+1th row scanning line 110, and the negative electrode of the third diode 280 is connected to the emitter of the first switch 220.
The third switch 240 is an N-type switch, a base electrode of the third switch 240 is connected to the second output end 214, a collector electrode of the third switch 240 is connected to the fourth high-level signal line 150, and an emitter electrode of the third switch 240 is connected to the n+c-th row scanning line 110; the fourth switch 250 is a P-type switch, a base electrode of the fourth switch 250 is connected to the first output end 213, a collector electrode of the fourth switch 250 is connected to the fifth high-level signal line 160, and an emitter electrode of the fourth switch 250 is connected to the n+dth row scanning line 110.
When the nth row scan line 110 receives a scan signal, the pulse trigger 210 controls the first switch 220 and the second switch 230 to be turned on, so that the pixels corresponding to the nth+a row scan line 110 and the nth+b row scan line 110 are precharged; when the n+1th row scanning line 110 receives a scanning signal, the pulse trigger 210 controls the third switch 240 and the fourth switch 250 to be turned on, so that the pixels corresponding to the n+c th row scanning line 110 and the n+dth row scanning line 110 are precharged; wherein a, b, c, d are natural numbers of 1 or more and a, b, c, d are not equal to each other.
The present embodiment fully utilizes the characteristics of the pulse trigger 210 and the type of the switch to maximize the precharge efficiency of the precharge circuit 200, and further precharges the pixels corresponding to all the scan lines 110 through fewer precharge circuits 200 on the basis of the other embodiments, as compared to the other embodiments. Also taking the display panel 100 with a resolution of 3840×2160 as an example, the number of effective scan lines 110 is 2160, then 2160/5=432 registers are required, and one precharge circuit 200 is disposed on each register, so that the number of registers and precharge circuits 200 is further reduced, and the cost is further reduced.
Of course, the first output terminal 213 and the second output terminal 214 may be further connected to more switches, and may be used for simultaneously precharging more rows of pixels, so as to improve the precharge efficiency.
The n+a-th, n+b-th, n+c-th, and n+d-th scanning lines 110, 110 are adjacent scanning lines 110. Further, a is equal to 1, b is equal to 3, c is equal to 4, and d is equal to 2; the first switch 220 is arranged in parallel with the fourth switch 250, and the second switch 230 is arranged in parallel with the third switch 240. The precharge circuit 200 can be reasonably arranged, and wiring confusion can be avoided.
Correspondingly, as shown in fig. 7, the present embodiment further discloses a method for pre-charging the display panel 100, that is, after step S4, the method further includes the steps of:
s5: the n+1th row scanning line receives the scanning signal and charges the pixels corresponding to the n+1th row scanning line;
s6: the first input end of the pulse trigger receives a high-level signal through the second diode, and the first output end and the second output end of the trigger output opposite signals, so that the third switch and the fourth switch are opened;
s7: the n+c row scanning line receives the high-level signal of the fourth high-level signal line and precharges pixels corresponding to the n+c row scanning line; the n+d-th row scanning line receives the high-level signal of the fifth high-level signal line and precharges pixels corresponding to the n+d-th row scanning line.
In the above embodiments, the second high-level signal line 130, the third high-level signal line 140, the fourth high-level signal line 150 and/or the fifth high-level signal line 160 may be connected together and directly connected to the external power line, so that the wiring design is convenient, and the high-level signal lines can always maintain the state of receiving the high-level signal without adjustment, which is more convenient to use. Of course, the second high-level signal line 130, the third high-level signal line 140, the fourth high-level signal line 150, and/or the fifth high-level signal line 160 may also be connected to corresponding gate-on signal lines.
In addition, the display panel 100 of the present application may be matched with the precharge circuit 200 of different embodiments according to the requirement, and the precharge circuit 200 of different embodiments may be combined into the same display panel 100, so as to satisfy more use requirements.
It should be noted that, the limitation of each step in the present solution is not to be considered as limiting the sequence of steps on the premise of not affecting the implementation of the specific solution, and the steps written in the previous step may be executed before, or executed after, or even executed simultaneously, so long as the implementation of the present solution is possible, all the steps should be considered as falling within the protection scope of the present application.
The above description of the application in connection with specific alternative embodiments is further detailed and it is not intended that the application be limited to the specific embodiments disclosed. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the application, and these should be considered to be within the scope of the application.
Claims (10)
1. A display panel, comprising:
a plurality of scan lines arranged in parallel;
at least one precharge circuit connected to at least 3 row scan lines at the same time;
the precharge circuit includes:
the pulse trigger comprises a first input end, a second input end, a first output end and a second output end, wherein the first input end is connected with an nth row scanning line, the second input end is connected with a first high-level signal line, and the first output end and the second output end output opposite level signals;
the first switch is an N-type switch, the base electrode of the first switch is connected with the first output end, the collector electrode of the first switch is connected with the second high-level signal line, and the emitter electrode of the first switch is connected with the n+a line scanning line;
the second switch is a P-type switch, the base electrode of the second switch is connected with the second output end, the collector electrode of the second switch is connected with a third high-level signal line, and the emitter electrode of the second switch is connected with an n+b row scanning line;
the positive electrode of the first diode is connected with the nth row scanning line, and the negative electrode of the first diode is connected with the first input end;
the anode of the second diode is connected with the n+a row scanning line, and the cathode of the second diode is connected with the first input end;
the anode of the third diode is connected with the joint of the anode of the second diode and the n+a row scanning line, and the cathode of the third diode is connected with the emitter of the first switch; and
the third switch is an N-type switch, the base electrode of the third switch is connected with the second output end, the collector electrode of the third switch is connected with a fourth high-level signal line, and the emitter electrode of the third switch is connected with an n+c row scanning line;
when the nth row scanning line receives a scanning signal, the pulse trigger controls the first switch and the second switch to be opened, so that pixels corresponding to the nth+a row scanning line and the nth+b row scanning line are precharged;
when the n+1th row scanning line receives a scanning signal, the pulse trigger controls the third switch to be opened so as to precharge pixels corresponding to the n+c th row scanning line;
wherein n, a, b, c is a natural number equal to or greater than 1, and a is not equal to b and c is not equal to b.
2. The display panel of claim 1, wherein a is equal to 1.
3. The display panel of claim 2, wherein the n+a-th, n+b-th, and n+c-th scanning lines are adjacent scanning lines.
4. A display panel as claimed in claim 3, characterized in that b is equal to 2 and c is equal to 3.
5. The display panel of claim 1, wherein the pulse trigger is a T-type trigger or a T-type leading edge pulse trigger.
6. The display panel according to claim 1, wherein the second high-level signal line, the third high-level signal line, and the fourth high-level signal line are connected.
7. A display panel, comprising:
a plurality of scan lines arranged in parallel;
at least one precharge circuit connected to at least 3 row scan lines at the same time;
the precharge circuit includes:
the pulse trigger comprises a first input end, a second input end, a first output end and a second output end, wherein the first input end is connected with an nth row scanning line, the second input end is connected with a first high-level signal line, and the first output end and the second output end output opposite level signals;
the first switch is an N-type switch, the base electrode of the first switch is connected with the first output end, the collector electrode of the first switch is connected with the second high-level signal line, and the emitter electrode of the first switch is connected with the n+a line scanning line;
the second switch is a P-type switch, the base electrode of the second switch is connected with the second output end, the collector electrode of the second switch is connected with a third high-level signal line, and the emitter electrode of the second switch is connected with an n+b row scanning line;
the positive electrode of the first diode is connected with the nth row scanning line, and the negative electrode of the first diode is connected with the first input end;
the anode of the second diode is connected with the n+a row scanning line, and the cathode of the second diode is connected with the first input end;
the anode of the third diode is connected with the joint of the anode of the second diode and the n+a row scanning line, and the cathode of the third diode is connected with the emitter of the first switch; and
the third switch is a P-type switch, the base electrode of the third switch is connected with the first output end, the collector electrode of the third switch is connected with a fourth high-level signal line, and the emitter electrode of the third switch is connected with an n+c row scanning line;
when the nth row scanning line receives a scanning signal, the pulse trigger controls the first switch and the second switch to be opened, so that pixels corresponding to the nth+a row scanning line and the nth+b row scanning line are precharged;
when the n+1th row scanning line receives a scanning signal, the pulse trigger controls the third switch to be opened so as to precharge pixels corresponding to the n+c th row scanning line;
wherein n, a, b, c is a natural number equal to or greater than 1, and a is not equal to b and c is not equal to b.
8. The display panel of claim 5, wherein the n+a-th, n+b-th, and n+c-th scanning lines are adjacent scanning lines.
9. The display panel of claim 6, wherein a is equal to 1, b is equal to 3, and c is equal to 2.
10. A display device comprising a backlight module and a display panel according to any one of claims 1-9, the backlight module providing backlight for the display panel.
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| CN114283758B (en) | 2023-01-10 |
| CN114283758A (en) | 2022-04-05 |
| CN115547271A (en) | 2022-12-30 |
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