CN109616068A - GOA scanning circuit and liquid crystal display device - Google Patents
GOA scanning circuit and liquid crystal display device Download PDFInfo
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- CN109616068A CN109616068A CN201910009062.1A CN201910009062A CN109616068A CN 109616068 A CN109616068 A CN 109616068A CN 201910009062 A CN201910009062 A CN 201910009062A CN 109616068 A CN109616068 A CN 109616068A
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- film transistor
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
Abstract
This announcement provides GOA scanning circuit and liquid crystal display device.GOA scanning circuit includes cascade multiple GOA circuit units.Each GOA circuit unit includes two directions' inputing module, output module and pull-down module.Two directions' inputing module includes first film transistor and the second thin film transistor (TFT).Pull-down module connect with first node and for exporting the first clock signal according to the current potential of first node.This announcement is able to achieve bilateral scanning function, and required thin film transistor (TFT) and signal wire is less.
Description
[technical field]
This announcement is related to field of display technology, in particular to a kind of GOA (gate driver on array) scanning circuit
And liquid crystal display device.
[background technique]
Liquid crystal display (liquid crystal display, LCD) has many advantages, such as that fuselage is thin and power saving, has obtained wide
General application.Such as applied to LCD TV, mobile phone, personal digital assistant (personal digital assistant,
PDA), digital camera, computer screen or laptop screen etc., occupy an leading position in flat display field.
Liquid crystal display on existing market is largely backlight liquid crystal display comprising liquid crystal display panel and back
Optical mode group (backlight module).The working principle of liquid crystal display panel is in thin-film transistor array base-plate and colored filter
Liquid crystal molecule is poured between mating plate substrate, and on two plate bases applies driving voltage to control the direction of rotation of liquid crystal molecule,
Picture is generated to come out the light refraction of backlight module.
In active liquid crystal display, each pixel is electrically connected a thin film transistor (TFT), and the grid of thin film transistor (TFT) connects
It is connected to horizontal scanning line, drain electrode is connected to the data line of vertical direction, and source electrode is then connected to pixel electrode.On horizontal scanning line
Apply enough voltage, so that all thin film transistor (TFT)s being electrically connected on this horizontal scanning line are opened, thus data line
On signal voltage can writing pixel, control the light transmittance of different liquid crystal and then achieve the effect that control color and brightness.Mesh
The driving of the horizontal scanning line of preceding active liquid crystal display panel is mainly by external integrated circuit board (integrated
Circuit, IC) it completes, external IC can control the charging and discharging step by step of horizontal scanning lines at different levels.And GOA (gate
Driver on array) technology, that is, array substrate row actuation techniques, it can use original array process of liquid crystal display panel will
The driving circuit of horizontal scanning line is produced on the substrate around viewing area, makes it to substitute external IC to complete horizontal scanning line
Driving.GOA technology can be reduced welding (bonding) process of external IC, has an opportunity to promote production capacity and reduces product cost, and
And liquid crystal display panel can be made to be more suitable for making the display product of narrow frame or Rimless.
The thin film transistor (TFT) that existing GOA scanning circuit needs is more, and the signal wire used is more, causes non-effective aobvious
It is more to show that area occupies, is unfavorable for narrow frame or Rimless design.
Therefore it is in need a kind of GOA scanning circuit and liquid crystal display device be provided, it is of the existing technology to solve the problems, such as.
[summary of the invention]
In order to solve the above technical problems, the one of this announcement is designed to provide GOA (gate driver on array) and sweeps
Scanning circuit and liquid crystal display device are able to achieve bilateral scanning function, and required thin film transistor (TFT) and signal wire is less.
To reach above-mentioned purpose, this announcement provides a GOA scanning circuit.The GOA scanning circuit includes cascade multiple
GOA circuit unit.Each GOA circuit unit includes two directions' inputing module, output module and pull-down module.The two directions' inputing
Module includes first film transistor and the second thin film transistor (TFT).The control terminal of the first film transistor connects lower level Four
The grade communication number of GOA circuit unit.The control terminal of second thin film transistor (TFT) connects the grade communication of upper level Four GOA circuit unit
Number.First path terminal of the first film transistor is for inputting the first constant voltage.The of the first film transistor
Two path terminals connect first node.First path terminal of second thin film transistor (TFT) is for inputting the second constant voltage.It is described
The alternate path end of second thin film transistor (TFT) connects the first node.The output module connect and uses with the first node
In the grade communication number for exporting the same level GOA circuit unit according to the current potential of the first node and export the same level GOA circuit list
The scanning signal of member.The pull-down module connect with the first node and for according to the current potential of first node output the
One clock signal.
In this announcement embodiment therein, the output module includes third thin film transistor (TFT) and the 4th film crystal
The control terminal of pipe, the control terminal of the third thin film transistor (TFT) and the 4th thin film transistor (TFT) is all connected with the first node,
For first path terminal of the third thin film transistor (TFT) for exporting second clock signal, the second of the third thin film transistor (TFT) is logical
Terminal is used to export the grade communication number of the same level GOA circuit unit, the first path terminal of the 4th thin film transistor (TFT)
For exporting the second clock signal, the alternate path end of the 4th thin film transistor (TFT) is for exporting the same level GOA electricity
The scanning signal of road unit.
In this announcement embodiment therein, the pull-down module includes the 5th thin film transistor (TFT) and the 6th film crystal
Pipe, when the control terminal of the 5th thin film transistor (TFT) and the control terminal of the 6th thin film transistor (TFT) are used to export described first
Clock signal, the first path terminal of the 5th thin film transistor (TFT) connect the first node, and the of the 5th thin film transistor (TFT)
Two path terminals connect the first voltage of voltage regulation, and the first path terminal of the 6th thin film transistor (TFT) is for exporting the same level GOA electricity
The alternate path end of the scanning signal of road unit, the 6th thin film transistor (TFT) connects the second voltage of voltage regulation.
In this announcement embodiment therein, each GOA circuit unit further includes that the 7th thin film transistor (TFT) and the 8th are thin
First path terminal of film transistor, the 7th thin film transistor (TFT) connects the first node, the 7th thin film transistor (TFT)
Alternate path end connects first voltage of voltage regulation, and the first path terminal of the 8th thin film transistor (TFT) is for exporting described the same level
The alternate path end of the scanning signal of GOA circuit unit, the 8th thin film transistor (TFT) connects second voltage of voltage regulation.
In this announcement embodiment therein, each GOA circuit unit further includes the 9th thin film transistor (TFT), the tenth film
Transistor, the 11st thin film transistor (TFT) and the 12nd thin film transistor (TFT), the control terminal of the 9th thin film transistor (TFT) and first are led to
The equal output low frequency clock signal of terminal, the alternate path end of the 9th thin film transistor (TFT) connect the tenth thin film transistor (TFT)
First path terminal, the control terminal of the tenth thin film transistor (TFT) connect the first node, and the of the tenth thin film transistor (TFT)
Two path terminals connect second voltage of voltage regulation, and the control terminal of the 11st thin film transistor (TFT) connects the 9th film crystal
The second channel end of pipe and the first passage end of the tenth thin film transistor (TFT), the 11st thin film transistor (TFT)
First path terminal exports the low-frequency clock signal, and the second channel end connection the described 7th of the 11st thin film transistor (TFT) is thin
The control terminal of the control terminal of film transistor, the 12nd thin film transistor (TFT) connects the described of the tenth thin film transistor (TFT)
The first passage end of control terminal, the 12nd thin film transistor (TFT) connects the second channel of the 11st thin film transistor (TFT)
The control terminal at end and the 7th thin film transistor (TFT), the second channel end connection described the of the 12nd thin film transistor (TFT)
Two voltage of voltage regulation.
In this announcement embodiment therein, first clock signal and the second clock signal inversion.
In this announcement embodiment therein, the control of the first film transistor to the 12nd thin film transistor (TFT)
End processed is grid.
In this announcement embodiment therein, described the of the first film transistor to the 12nd thin film transistor (TFT)
One tunnel ends are source electrode.
In this announcement embodiment therein, described the of the first film transistor to the 12nd thin film transistor (TFT)
Two tunnel ends are drain electrode.
It includes above-mentioned GOA scanning circuit that this announcement, which also provides a liquid crystal display device,.
Since in the GOA scanning circuit of this revealed embodiment and the liquid crystal display device, the GOA scanning is electric
Road includes cascade multiple GOA circuit units.Each GOA circuit unit includes the two directions' inputing module, the output module
And the pull-down module.The two directions' inputing module includes the first film transistor and second thin film transistor (TFT).
The pull-down module connect with the first node and believes for exporting first clock according to the current potential of the first node
Number.This revealed embodiment is able to achieve bilateral scanning function, and required thin film transistor (TFT) and signal wire is less, is conducive to narrow frame
Or Rimless design.
For the above content of this announcement can be clearer and more comprehensible, preferred embodiment is cited below particularly, and cooperate institute's accompanying drawings, makees
Detailed description are as follows:
[Detailed description of the invention]
Fig. 1 shows the structural representation of a scanning circuit unit of the GOA scanning circuit of the embodiment according to this announcement
Figure；
Fig. 2 shows the structural schematic diagram of the GOA scanning circuit of the embodiment according to this announcement；
Fig. 3 shows the structural schematic diagram of the GOA scanning circuit of the embodiment according to this announcement；And
Fig. 4 shows the schematic diagram of the liquid crystal display device of the embodiment according to this announcement.
[specific embodiment]
In order to which the above-mentioned and other purposes of this announcement, feature, advantage can be clearer and more comprehensible, it is excellent that spy is hereafter lifted into this announcement
Embodiment is selected, and cooperates institute's accompanying drawings, is described in detail below.Furthermore the direction term that this announcement is previously mentioned, such as above and below,
Top, bottom, front, rear, left and right, inside and outside, side layer, around, center, it is horizontal, laterally, vertically, longitudinally, axial direction, radial direction, top layer or
Lowest level etc. is only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand this announcement, and
It is non-to limit this announcement.
The similar unit of structure is to be given the same reference numerals in the figure.
Referring to Fig.1, the GOA scanning circuit of an embodiment of this announcement includes cascade multiple GOA circuit units.Each
GOA circuit unit includes two directions' inputing module 10, output module 12 and pull-down module 14.Two directions' inputing module 10 includes first
Thin film transistor (TFT) T1 and the second thin film transistor (TFT) T2.The control terminal of first film transistor T1 connects lower level Four GOA circuit unit
Grade communication STn-4.The control terminal of second thin film transistor (TFT) T2 connects the grade communication STn+4 of upper level Four GOA circuit unit.
The first path terminal of first film transistor T1 is for inputting the first constant voltage VGH1.The second of first film transistor T1 is logical
Terminal connects first node Q.The first path terminal of second thin film transistor (TFT) T2 is for inputting the second constant voltage VGH2.Second is thin
The alternate path end of film transistor T2 connects first node Q.Output module 12 connect with first node Q and for according to first segment
The current potential of point Q exports the grade communication STn of the same level GOA circuit unit and the scanning signal Gn of output the same level GOA circuit unit.Under
Drawing-die block 14 connect with first node Q and for exporting the first clock signal XCK according to the current potential of first node Q.
Since pull-down module 14 exports the first clock signal XCK, i.e. pull-down module 14 uses under the first clock signal XCK
It draws, therefore drop-down signal (i.e. the first clock signal XCK) is non-directional, does not need newly-increased signal wire and the newly-increased reverse phase that provides scans
Thin film transistor (TFT).The circuit of the GOA circuit unit of the present embodiment is simple, and newly-increased signal line is few, can be used for transmitted in both directions
In the GOA circuit of demand, increase the compatibility of GOA circuit.
In addition, two directions' inputing module 10 uses two two directions' inputing components (i.e. first film transistor T1 and the second films
Transistor T2), first film transistor T1, the grade communication STn-4 of upper level Four GOA circuit unit and the are used when reverse phase scans
One constant voltage VGH1 input, reverse phase also use the second thin film transistor (TFT) T2, the grade communication of lower level Four GOA circuit unit when scanning
Number STn+4 and the second constant voltage VGH2 input, to prevent two two directions' inputing component (i.e. first film transistor T1 and second
Thin film transistor (TFT) T2) it interferes with each other, such as when reverse phase scanning, the second thin film transistor (TFT) T2 may be in lower level Four GOA circuit unit
Grade communication STn+4 when trigger, cause output module 12 accidentally export, increase a constant voltage signal.When permanent using first
When constant voltage VGH1 anti-phase input, the second constant voltage VGH2 is given to low signal, guarantee that the second thin film transistor (TFT) T2 is closed, oncontacting
Send out risk.
The circuit of the GOA circuit unit of the present embodiment is simple, and newly-increased signal line is few, can be used for having two-way transmission requirement
In GOA circuit, increase the compatibility of GOA circuit.
Specifically, the same level GOA circuit unit is, for example, n-th grade of GOA circuit unit, and n is positive integer and n is greater than 1.In forward direction
When scanning, scanning signal G1~Gn successively is provided to corresponding pixel unit from the 1st grade to the sequence of n-th grade of GOA circuit unit,
When reverse phase scans, the sequence of grade GOA circuit unit successively provides scanning signal Gn to corresponding pixel unit from n-th grade to the 1st
~G1.
Specifically, output module 12 includes third thin film transistor (TFT) T3 and the 4th thin film transistor (TFT) T4.Third film crystal
The control terminal of pipe T3 and the control terminal of the 4th thin film transistor (TFT) T4 are all connected with first node Q, and the first of third thin film transistor (TFT) T3
Path terminal is for exporting second clock signal CK, and the alternate path end of third thin film transistor (TFT) T3 is for exporting the same level GOA circuit
The grade communication STn of unit.The first path terminal of 4th thin film transistor (TFT) T4 is for exporting second clock signal CK, the 4th film
The alternate path end of transistor T4 is used to export the scanning signal Gn of the same level GOA circuit unit.
Specifically, pull-down module 14 includes the 5th thin film transistor (TFT) T5 and the 6th thin film transistor (TFT) T6.5th film crystal
The control terminal of pipe T5 and the control terminal of the 6th thin film transistor (TFT) T6 are used to the first clock signal XCK of output.5th film crystal
The first path terminal of pipe T5 connects first node Q, and the alternate path end of the 5th thin film transistor (TFT) T5 connects the first voltage of voltage regulation
VSSQ.The first path terminal of 6th thin film transistor (TFT) T6 is used to export the scanning signal Gn of the same level GOA circuit unit, the 6th film
The alternate path end of transistor T6 connects the second voltage of voltage regulation VSSG.
Since the control terminal of the 5th thin film transistor (TFT) T5 of pull-down module 14 and the control terminal of the 6th thin film transistor (TFT) T6 are equal
For exporting the first clock signal XCK, the i.e. control terminal and the 6th film crystal of the 5th thin film transistor (TFT) T5 of pull-down module 14
The control terminal of pipe T6 uses the first clock signal XCK to pull down, therefore it is directionless to pull down signal (i.e. the first clock signal XCK)
Property, do not need newly-increased signal wire and the newly-increased thin film transistor (TFT) that reverse phase is provided and is scanned.In addition, the third film of output module 12 is brilliant
The first path terminal of body pipe T3 and the first path terminal of the 4th thin film transistor (TFT) T4 are used to output second clock signal CK, because of the
Two clock signal CK and the first clock signal XCK are reverse phase signals, and no reverse phase scans interference problem, are conducive to bilateral scanning.
Specifically, each GOA circuit unit further includes the 7th thin film transistor (TFT) T7 and the 8th thin film transistor (TFT) T8.7th is thin
The first path terminal of film transistor T7 connects first node Q, and the alternate path end of the 7th thin film transistor (TFT) T7 connects the first pressure stabilizing
Voltage VSSQ.The first path terminal of 8th thin film transistor (TFT) T8 is used to export the scanning signal Gn of the same level GOA circuit unit, and the 8th
The alternate path end of thin film transistor (TFT) T8 connects the second voltage of voltage regulation VSSG.
Specifically, each GOA circuit unit further includes the 9th thin film transistor (TFT) T9, the tenth thin film transistor (TFT) T10, the 11st
Thin film transistor (TFT) T11 and the 12nd thin film transistor (TFT) T12.The control terminal and the first path terminal of 9th thin film transistor (TFT) T9 exports
The alternate path end of low-frequency clock signal LC, the 9th thin film transistor (TFT) T9 connect the first path terminal of the tenth thin film transistor (TFT) T10.
The control terminal of tenth thin film transistor (TFT) T10 connects first node Q, the alternate path end connection second of the tenth thin film transistor (TFT) T10
Voltage of voltage regulation VSSG.The control terminal of 11st thin film transistor (TFT) T11 connects the second channel end and the of the 9th thin film transistor (TFT) T9
The first passage end of ten thin film transistor (TFT) T10, the first path terminal output low frequency clock signal of the 11st thin film transistor (TFT) T11
The second channel end of LC, the 11st thin film transistor (TFT) T11 connect the control terminal of the 7th thin film transistor (TFT) T7.12nd film crystal
The control terminal of pipe T12 connects the control terminal of the tenth thin film transistor (TFT) T10, and the first passage end of the 12nd thin film transistor (TFT) T12 connects
Connect the second channel end of the 11st thin film transistor (TFT) T11 and the control terminal of the 7th thin film transistor (TFT) T7, the 12nd thin film transistor (TFT)
The second channel end of T12 connects the second voltage of voltage regulation VSSG.
Specifically, the first constant voltage VGHl's and the second constant voltage VGH2 equal in magnitude, the first constant voltage VGHl
It can be the same signal wire VGH of connection with the second constant voltage VGH2.In other embodiments, the first constant voltage VGHl can be with
Greater than the second constant voltage VGH2, with the pressure difference between the drain electrode and source electrode of first film transistor Tl during being maintained at non-output
Vgs is greater than 0, to reduce electric leakage.
Specifically, first to the 12nd thin film transistor (TFT) Tl~T12 is P-type TFT.In other embodiments,
First to the 12nd thin film transistor (TFT) Tl~T12 is N-type TFT.
Specifically, the control terminal of first to the 12nd thin film transistor (TFT) Tl~T12 is grid.First to the 12nd film
The first passage end of transistor Tl~T12 is source electrode.The second channel end of first to the 12nd thin film transistor (TFT) Tl~T12 is equal
For drain electrode.
Specifically, the first clock signal XCK and second clock signal CK reverse phase.
Referring to Fig.1 and 2, in one embodiment, using start signal is uploaded, i.e. the second trigger signal STV2 and second is constant
Voltage VGH2, resumes from top to bottom, and the first trigger signal STV1 and the first constant voltage VGH1 low potential guarantee that reverse phase passes at this time
Defeated signal will not interfere.When resuming from the bottom up using reverse phase, the first trigger signal STV1 and the first constant voltage are used
VGH1, the second trigger signal STV2 and the second constant voltage VGH2 give low level VSS at this time, prevent from interfering.
Referring to Fig.1 and 3, in one embodiment, because of the setting of the first constant voltage VGH1 and the second constant voltage VGH2
The output of controllable first film transistor Tl and the second thin film transistor (TFT) T2, it is possible to only with a trigger signal, with the
One constant voltage VGH1 and the transmission of the second constant voltage VGH2 height control circuit forward direction or inverter transfer, can save one
Signal line, circuit design are also simpler.
In one embodiment, forward and reverse scanning signal output of GOA scanning circuit mould is simulated, forward and reverse scanning can be just
Normal output signal.
Referring to Fig. 4, in one embodiment, liquid crystal display device 20 is including liquid crystal display panel 22 and is located at 22 side of liquid crystal display panel
GOA scanning circuit 24.GOA scanning circuit 24 is GOA scanning circuit described in any of the above-described embodiment.
Since in the GOA scanning circuit of this revealed embodiment and the liquid crystal display device, the GOA scanning is electric
Road includes cascade multiple GOA circuit units.Each GOA circuit unit includes the two directions' inputing module, the output module
And the pull-down module.The two directions' inputing module includes the first film transistor and second thin film transistor (TFT).
The pull-down module connect with the first node and believes for exporting first clock according to the current potential of the first node
Number.This revealed embodiment is able to achieve bilateral scanning function, and required thin film transistor (TFT) and signal wire is less, is conducive to narrow frame
Or Rimless design.
Although this announcement, those skilled in the art have shown and described relative to one or more implementations
It will be appreciated that equivalent variations and modification based on the reading and understanding to the specification and drawings.This announcement includes all such repairs
Change and modification, and is limited only by the scope of the following claims.In particular, to various functions executed by the above components, use
It is intended to correspond in the term for describing such component and executes the specified function of the component (such as it is functionally of equal value
) random component (unless otherwise instructed), even if in structure with execute the exemplary of this specification shown in this article and realize
The open structure of function in mode is not equivalent.In addition, although the special characteristic of this specification is relative to several realization sides
Only one in formula is disclosed, but this feature can with such as can be for a given or particular application expectation and it is advantageous
One or more other features combinations of other implementations.Moreover, with regard to term " includes ", " having ", " containing " or its deformation
For being used in specific embodiments or claims, such term is intended to wrap in a manner similar to the term " comprising "
It includes.
The above is only the preferred embodiments of this announcement, it is noted that for those of ordinary skill in the art, is not departing from
Under the premise of this announcement principle, several improvements and modifications can also be made, these improvements and modifications also should be regarded as the guarantor of this announcement
Protect range.
Claims (10)
1. a kind of GOA scanning circuit, which is characterized in that the GOA scanning circuit includes cascade multiple GOA circuit units, often
A GOA circuit unit includes:
Two directions' inputing module, including first film transistor and the second thin film transistor (TFT), wherein the first film transistor
Control terminal connects the grade communication number of lower level Four GOA circuit unit and the control terminal connection upper four of second thin film transistor (TFT)
The grade communication number of grade GOA circuit unit, wherein the first path terminal of the first film transistor is for inputting the first constant electricity
The alternate path end of pressure, the first film transistor connects first node, the first path terminal of second thin film transistor (TFT)
Alternate path end for inputting the second constant voltage and second thin film transistor (TFT) connects the first node；
Output module is connect and for exporting the same level GOA circuit list according to the current potential of the first node with the first node
The grade communication number of member and the scanning signal for exporting the same level GOA circuit unit；And
Pull-down module is connect and for exporting the first clock signal according to the current potential of the first node with the first node.
2. GOA scanning circuit as described in claim 1, which is characterized in that the output module includes third thin film transistor (TFT)
With the 4th thin film transistor (TFT), the control terminal of the control terminal of the third thin film transistor (TFT) and the 4th thin film transistor (TFT) is all connected with
The first node, the first path terminal of the third thin film transistor (TFT) is for exporting second clock signal, the third film
The alternate path end of transistor is used to export the grade communication number of the same level GOA circuit unit, the 4th film crystal
First path terminal of pipe is for exporting the second clock signal, and the alternate path end of the 4th thin film transistor (TFT) is for exporting
The scanning signal of the same level GOA circuit unit.
3. GOA scanning circuit as claimed in claim 2, which is characterized in that the pull-down module includes the 5th thin film transistor (TFT)
With the 6th thin film transistor (TFT), the control terminal of the 5th thin film transistor (TFT) and the control terminal of the 6th thin film transistor (TFT) are used to
Exporting first clock signal, the first path terminal of the 5th thin film transistor (TFT) connects the first node, and the described 5th
The alternate path end of thin film transistor (TFT) connects the first voltage of voltage regulation, and the first path terminal of the 6th thin film transistor (TFT) is for exporting
The alternate path end of the scanning signal of the same level GOA circuit unit, the 6th thin film transistor (TFT) connects the second pressure stabilizing
Voltage.
4. GOA scanning circuit as claimed in claim 3, which is characterized in that each GOA circuit unit further includes the 7th film crystalline substance
Body pipe and the 8th thin film transistor (TFT), the first path terminal connection first node of the 7th thin film transistor (TFT), the described 7th
The alternate path end of thin film transistor (TFT) connects first voltage of voltage regulation, and the first path terminal of the 8th thin film transistor (TFT) is used for
The scanning signal of the same level GOA circuit unit is exported, described in the alternate path end connection of the 8th thin film transistor (TFT)
Second voltage of voltage regulation.
5. GOA scanning circuit as claimed in claim 4, which is characterized in that each GOA circuit unit further includes the 9th film crystalline substance
Body pipe, the tenth thin film transistor (TFT), the 11st thin film transistor (TFT) and the 12nd thin film transistor (TFT), the control of the 9th thin film transistor (TFT)
End processed and the equal output low frequency clock signal of the first path terminal, the alternate path end connection the described tenth of the 9th thin film transistor (TFT)
The control terminal of first path terminal of thin film transistor (TFT), the tenth thin film transistor (TFT) connects the first node, and the described tenth is thin
The alternate path end of film transistor connects second voltage of voltage regulation, described in the control terminal connection of the 11st thin film transistor (TFT)
The second channel end of 9th thin film transistor (TFT) and the first passage end of the tenth thin film transistor (TFT), the described 11st
First path terminal of thin film transistor (TFT) exports the low-frequency clock signal, and the second channel end of the 11st thin film transistor (TFT) connects
The control terminal of the 7th thin film transistor (TFT) is connect, the control terminal of the 12nd thin film transistor (TFT) connects the tenth film
The first passage end of the control terminal of transistor, the 12nd thin film transistor (TFT) connects the 11st thin film transistor (TFT)
The control terminal at the second channel end and the 7th thin film transistor (TFT), the second channel of the 12nd thin film transistor (TFT)
End connects second voltage of voltage regulation.
6. GOA scanning circuit as claimed in claim 2, which is characterized in that first clock signal and the second clock
Signal inversion.
7. GOA scanning circuit according to claim 5, which is characterized in that the first film transistor is to the 12nd thin
The control terminal of film transistor is grid.
8. GOA scanning circuit according to claim 7, which is characterized in that the first film transistor is to the 12nd thin
The first passage end of film transistor is source electrode.
9. GOA scanning circuit according to claim 8, which is characterized in that the first film transistor is to the 12nd thin
The second channel end of film transistor is drain electrode.
10. a kind of liquid crystal display device, which is characterized in that the liquid crystal display device includes such as any one of claim 1-9 institute
The GOA scanning circuit stated.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910009062.1A CN109616068A (en) | 2019-01-04 | 2019-01-04 | GOA scanning circuit and liquid crystal display device |
| PCT/CN2019/076819 WO2020140321A1 (en) | 2019-01-04 | 2019-03-04 | Goa scanning circuit and liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910009062.1A CN109616068A (en) | 2019-01-04 | 2019-01-04 | GOA scanning circuit and liquid crystal display device |
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| CN109616068A true CN109616068A (en) | 2019-04-12 |
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| CN201910009062.1A Pending CN109616068A (en) | 2019-01-04 | 2019-01-04 | GOA scanning circuit and liquid crystal display device |
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| CN (1) | CN109616068A (en) |
| WO (1) | WO2020140321A1 (en) |
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| CN109979398A (en) * | 2019-05-07 | 2019-07-05 | 深圳市华星光电半导体显示技术有限公司 | A kind of GOA circuit, display panel and display device |
| CN110322843A (en) * | 2019-07-23 | 2019-10-11 | 深圳市华星光电半导体显示技术有限公司 | A kind of GOA unit, GOA circuit and display panel |
| CN112951142A (en) * | 2021-03-29 | 2021-06-11 | 深圳市华星光电半导体显示技术有限公司 | Gate drive circuit, display panel and display device |
| WO2021248614A1 (en) * | 2020-06-09 | 2021-12-16 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit and display panel |
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| CN106098011A (en) * | 2016-08-17 | 2016-11-09 | 京东方科技集团股份有限公司 | Bilateral scanning GOA unit, driving method and GOA circuit |
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| CN109979398A (en) * | 2019-05-07 | 2019-07-05 | 深圳市华星光电半导体显示技术有限公司 | A kind of GOA circuit, display panel and display device |
| WO2020224133A1 (en) * | 2019-05-07 | 2020-11-12 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit, display panel and display apparatus |
| CN110322843A (en) * | 2019-07-23 | 2019-10-11 | 深圳市华星光电半导体显示技术有限公司 | A kind of GOA unit, GOA circuit and display panel |
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| WO2021248614A1 (en) * | 2020-06-09 | 2021-12-16 | 深圳市华星光电半导体显示技术有限公司 | Goa circuit and display panel |
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2020140321A1 (en) | 2020-07-09 |
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Application publication date: 20190412 |