CN109558282A - A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium - Google Patents
A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium Download PDFInfo
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- CN109558282A CN109558282A CN201811463366.7A CN201811463366A CN109558282A CN 109558282 A CN109558282 A CN 109558282A CN 201811463366 A CN201811463366 A CN 201811463366A CN 109558282 A CN109558282 A CN 109558282A
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- pcie
- target device
- slot position
- port numbers
- chain circuit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
Abstract
This application discloses a kind of PCIE chain circuit detecting method, system and a kind of electronic equipment and computer readable storage mediums, this method comprises: when detecting target device access, the corresponding PCIE port numbers of identification target device；The corresponding PCIE slot position of target device is determined using system command according to PCIE port numbers；Whether within a preset range to judge current PC IE bus bandwidth and rate；If it is not, then outputting alarm information；Wherein, warning information includes PCIE slot position.PCIE chain circuit detecting method provided by the present application, the PCIE port numbers by detecting target device determine its PCIE slot position, export the PCIE slot position when detecting that the target device breaks down.The PCIE slot position that faulty equipment is determined by system command realizes the purpose of quickly identification, positioning failure equipment instead of the analytic process of maintenance personal, accelerates producing line and repairs speed, improves producing line operational efficiency.
Description
Technical field
This application involves field of computer technology, more specifically to a kind of PCIE chain circuit detecting method, system and one
Kind electronic equipment and a kind of computer readable storage medium.
Background technique
Current notebook, desktop computer, server and storage largely connects various equipment using PCIE bus, various
Equipment room is also through PCIE (full name in English: peripheral component interconnect express, Yi Zhonggao
Fast serial computer expansion bus standard) bus connection.The PCIE of each connected equipment room must be detected in process of production
Whether link is correct, and link error can be divided into nonrecognition (show as the highway width recognized be x0), degrade (such as is originally
The connection of x16 only recognizes x8) etc..
In the prior art, when detecting that a certain PCIE link is problematic, the PCIE port numbers to go wrong are sent to
Maintenance personal is which link is out of joint by maintenance personal's judgement.But such case requires maintenance personal must be to entire
System has very deep understanding and understanding, and very familiar Linux instruction can just be accomplished to see that the port numbers to report an error can be known faster
It Chu not be faulty equipment, by the cross validation of certain step, confirmation is faulty equipment, and detection efficiency is lower.
Therefore, how to improve using the fault detection efficiency of the equipment of PCIE link connection is those skilled in the art's needs
It solves the problems, such as.
Summary of the invention
The application's is designed to provide a kind of PCIE chain circuit detecting method, system and a kind of electronic equipment and a kind of calculating
Machine readable storage medium storing program for executing improves the fault detection efficiency of the equipment using PCIE link connection.
To achieve the above object, this application provides a kind of PCIE chain circuit detecting methods, comprising:
When detecting target device access, the corresponding PCIE port numbers of the target device are identified；
The corresponding PCIE slot position of the target device is determined using system command according to the PCIE port numbers；
Whether within a preset range to judge current PC IE bus bandwidth and rate；
If it is not, then outputting alarm information；Wherein, the warning information includes the PCIE slot position.
Wherein, the target device includes FC card.
Wherein, the corresponding PCIE slot position of the target device is determined using system command according to the PCIE port numbers, wrap
It includes:
Corresponding PCI ID number is obtained using the first system order according to the PCIE port numbers；
Corresponding PCIE slot position is determined according to the PCI ID number.
It is wherein, described whether within a preset range to judge current PC IE bus bandwidth and rate, comprising:
The current PC IE bus bandwidth and rate are obtained using second system order, and judges the current PC IE bus
Within a preset range whether bandwidth and rate.
To achieve the above object, this application provides a kind of PCIE link detecting systems, comprising:
Identification module, for identifying the corresponding PCIE port numbers of the target device when detecting target device access；
Determining module, for determining the corresponding PCIE of the target device using system command according to the PCIE port numbers
Slot position；
Judgment module, for whether within a preset range to judge current PC IE bus bandwidth and rate；If it is not, then exporting announcement
Alert information；Wherein, the warning information includes the PCIE slot position.
Wherein, the target device includes FC card.
Wherein, the determining module includes:
First determination unit, for obtaining corresponding PCI ID using the first system order according to the PCIE port numbers
Number；
Second determination unit, for obtaining corresponding PCIE slot position according to the PCI ID number.
Wherein, the judgment module is specially that second system order is utilized to obtain the current PC IE bus bandwidth and speed
Rate, and whether within a preset range to judge the current PC IE bus bandwidth and rate；If it is not, the then mould of outputting alarm information
Block.
To achieve the above object, this application provides a kind of electronic equipment, comprising:
Memory, for storing computer program；
Processor is realized when for executing the computer program such as the step of above-mentioned PCIE chain circuit detecting method.
To achieve the above object, this application provides a kind of computer readable storage medium, the computer-readable storages
It is stored with computer program on medium, such as above-mentioned PCIE chain circuit detecting method is realized when the computer program is executed by processor
The step of.
By above scheme it is found that a kind of PCIE chain circuit detecting method provided by the present application, comprising: when detecting that target sets
When standby access, the corresponding PCIE port numbers of the target device are identified；It is determined according to the PCIE port numbers using system command
The corresponding PCIE slot position of the target device；Whether within a preset range to judge current PC IE bus bandwidth and rate；If it is not, then
Outputting alarm information；Wherein, the warning information includes the PCIE slot position.
PCIE chain circuit detecting method provided by the present application, the PCIE port numbers by detecting target device determine its PCIE slot
Position exports the PCIE slot position when detecting that the target device breaks down.The PCIE of faulty equipment is determined by system command
Slot position realizes the purpose of quickly identification, positioning failure equipment instead of the analytic process of maintenance personal, accelerates producing line and repairs speed,
Improve producing line operational efficiency.Disclosed herein as well is a kind of PCIE link detecting system and a kind of electronic equipment and a kind of computers
Readable storage medium storing program for executing is equally able to achieve above-mentioned technical effect.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of flow chart of PCIE chain circuit detecting method disclosed in the embodiment of the present application；
Fig. 2 is the flow chart of another kind PCIE chain circuit detecting method disclosed in the embodiment of the present application；
Fig. 3 is a kind of structure chart of PCIE link detecting system disclosed in the embodiment of the present application；
Fig. 4 is the structure chart of a kind of electronic equipment disclosed in the embodiment of the present application；
Fig. 5 is the structure chart of another kind electronic equipment disclosed in the embodiment of the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
The embodiment of the present application discloses a kind of PCIE chain circuit detecting method, improves the equipment using PCIE link connection
Fault detection efficiency.
Referring to Fig. 1, a kind of flow chart of PCIE chain circuit detecting method disclosed in the embodiment of the present application, as shown in Figure 1, packet
It includes:
S101: when detecting target device access, the corresponding PCIE port numbers of the target device are identified；
Specific target device is not limited specifically in the present embodiment, using the equipment of PCIE link connection all at this
In the protection scope of embodiment, such as CPU (Chinese name: central processing unit, full name in English: Central Processing
Unit), PCH (full name in English: Platform Controller Hub is the integrated south bridge of intel company), PCIE Switch
(PCIE switch or PCIE interchanger), SAS Expander (SAS expander), SAS (full name in English: Statistical
Analysis System is a modularization, integrated Large Scale Application Software System) card, FC card (a kind of sonet card), net
Card etc..
In the prior art, such as the FC card insertion of a PCIE x4 connection is in SLOT B slot position, and be assembled into complete machine needs later
Whether the connection for detecting this PCIE link is correct.System can first identify the port numbers of this card, then detect this
Bus bandwidth, connection speed of PCIE link etc., if mistake occurs in connection, system can be by the port numbers to make mistake with Linux
The form of order is sent to maintenance personal, obtains specific faulty equipment, above-mentioned Linux command so that maintenance personal carries out analysis
It is as follows:
ExMessage:[File:pcievdp.cpp,Line:173]00:01.1,Device:Intel Corporation
Xeon E7v4/Xeon E5v4/Xeon E3v4/Xeon D PCI ERoot Port of PCI Express Root
Complex[*],Current Link Width check fail,sys:x4,user:x0
Wherein, 00:01.1 is PCIE port numbers.
It is same as the prior art in this step, when detecting target device access, identify that the target device is corresponding
PCIE port numbers.
S102: the corresponding PCIE slot position of the target device is determined using system command according to the PCIE port numbers；
In specific implementation, when the PCIE port numbers for recognizing target device, its PCIE slot position is determined using system command,
When the target device breaks down, the PCIE slot position of the target device is directly reported.
Preferably, this step may include obtaining corresponding PCI ID using the first system order according to PCIE port numbers
Number, corresponding PCIE slot position is determined according to the PCI ID number.The first system order herein can be specially lspci-s xxx,
Wherein xxx is PCIE port numbers.
The PCIE port fixed for one is fixed and invariable in hardware connection, corresponds to from complete machine, assemble
Position be also fixed and invariable, such as in the example enumerated of previous step, port numbers 00:01.1 is fixed and invariable, and is passed through
This port numbers utilizes this available port numbers of the first system order corresponding PCI ID number 8086:6f03, this PCI
The position (i.e. PCIE slot position) of extrapolation PCIe card is exactly SLOT B on the corresponding machine of ID.
S103: whether within a preset range to judge current PC IE bus bandwidth and rate；If it is not, then entering S104；
It is same as the prior art in this step, by detection current PC IE bus bandwidth and rate whether in preset range
It is interior to judge whether the target device breaks down.It is understood that when current PC IE bus bandwidth and rate are in preset range
When interior, illustrate that the target device is normal, terminates testing process.Otherwise when no longer in preset range, illustrate that the target device occurs
Failure, into S104.
Preferably, this step may include obtaining the current PC IE bus bandwidth and rate using second system order,
And whether within a preset range to judge the current PC IE bus bandwidth and rate.In specific implementation, it can use the second system
System order obtains the current PC IE bus bandwidth and rate, second system order herein can be specially lspci-n-d
xxx-vvv|grep-i width.Wherein xxx is PCIE ID obtained in previous step.
S104: outputting alarm information；Wherein, the warning information includes the PCIE slot position.
In specific implementation, when the target device breaks down, the alarm comprising PCIE slot position is sent to maintenance personal
Information.In the above example, when FC card failure, the warning information of SLOT B PCIE connection error, the present embodiment are directly quoted
The analysis movement that maintenance personal can be saved, accelerates the speed of verifying, maintenance, improves the production efficiency of producing line.
PCIE chain circuit detecting method provided by the embodiments of the present application, the PCIE port numbers by detecting target device determine it
PCIE slot position exports the PCIE slot position when detecting that the target device breaks down.Faulty equipment is determined by system command
PCIE slot position realize the purpose of quickly identification, positioning failure equipment instead of the analytic process of maintenance personal, accelerate producing line dimension
Speed is repaired, producing line operational efficiency is improved.
The embodiment of the present application discloses a kind of PCIE chain circuit detecting method, and relative to a upper embodiment, the present embodiment is to skill
Art scheme has made further instruction and optimization.It is specific:
Referring to fig. 2, the flow chart of another kind PCIE chain circuit detecting method provided by the embodiments of the present application, as shown in Fig. 2, packet
It includes:
S201: when detecting target device access, the corresponding PCIE port numbers of the target device are identified；
S202: corresponding PCI ID number is obtained using the first system order according to the PCIE port numbers, and according to described
PCI ID number determines corresponding PCIE slot position；
S203: obtaining the current PC IE bus bandwidth and rate using second system order, and judges described current
Within a preset range whether PCIE bus bandwidth and rate；If it is not, then entering S204；
S204: outputting alarm information；Wherein, the warning information includes the PCIE slot position.
A kind of PCIE link detecting system provided by the embodiments of the present application is introduced below, one kind described below
PCIE link detecting system can be cross-referenced with a kind of above-described PCIE chain circuit detecting method.
Referring to Fig. 3, a kind of structure chart of PCIE link detecting system provided by the embodiments of the present application, as shown in figure 3, packet
It includes:
Identification module 301, for identifying the corresponding port PCIE of the target device when detecting target device access
Number；
Determining module 302, for determining that the target device is corresponding using system command according to the PCIE port numbers
PCIE slot position；
Judgment module 303, for whether within a preset range to judge current PC IE bus bandwidth and rate；If it is not, then defeated
Warning information out；Wherein, the warning information includes the PCIE slot position.
PCIE link detecting system provided by the embodiments of the present application, the PCIE port numbers by detecting target device determine it
PCIE slot position exports the PCIE slot position when detecting that the target device breaks down.Faulty equipment is determined by system command
PCIE slot position realize the purpose of quickly identification, positioning failure equipment instead of the analytic process of maintenance personal, accelerate producing line dimension
Speed is repaired, producing line operational efficiency is improved.
On the basis of the above embodiments, the target device includes FC card as a preferred implementation manner,.
On the basis of the above embodiments, the determining module 302 includes: as a preferred implementation manner,
First determination unit, for obtaining corresponding PCI ID using the first system order according to the PCIE port numbers
Number；
Second determination unit, for obtaining corresponding PCIE slot position according to the PCI ID number.
On the basis of the above embodiments, the judgment module 303 is specially to utilize the as a preferred implementation manner,
Two system order obtains the current PC IE bus bandwidth and rate, and judges whether are the current PC IE bus bandwidth and rate
Within a preset range；If it is not, the then module of outputting alarm information.
Present invention also provides a kind of electronic equipment, referring to fig. 4, the knot of a kind of electronic equipment provided by the embodiments of the present application
Composition, as shown in Figure 4, comprising:
Memory 100, for storing computer program；
Step provided by above-described embodiment may be implemented in processor 200 when for executing the computer program.
Specifically, memory 100 includes non-volatile memory medium, built-in storage.Non-volatile memory medium storage
There are operating system and computer-readable instruction, which is that the operating system and computer in non-volatile memory medium can
The operation of reading instruction provides environment.Processor 200 can be a central processing unit (Central in some embodiments
Processing Unit, CPU), controller, microcontroller, microprocessor or other data processing chips, mentioned for electronic equipment
Any of the above-described embodiment may be implemented when executing the computer program saved in the memory 100 for calculating and control ability
The step of PCIE chain circuit detecting method of offer.
The embodiment of the present application determines its PCIE slot position by detecting the PCIE port numbers of target device, when detecting the target
Equipment exports the PCIE slot position when breaking down.The PCIE slot position that faulty equipment is determined by system command, instead of maintenance personal
Analytic process, realize quickly identification, positioning failure equipment purpose, accelerate producing line repair speed, improve producing line operational efficiency.
On the basis of the above embodiments, preferably, referring to Fig. 5, the electronic equipment further include:
Input interface 300 is connected with processor 200, for obtaining computer program, parameter and the instruction of external importing,
It saves through the control of processor 200 into memory 100.The input interface 300 can be connected with input unit, and it is manual to receive user
The parameter or instruction of input.The input unit can be the touch layer covered on display screen, be also possible to be arranged in terminal enclosure
Key, trace ball or Trackpad, be also possible to keyboard, Trackpad or mouse etc..
Display unit 400 is connected with processor 200, for video-stream processor 12 processing data and for show can
Depending on the user interface changed.The display unit 15 can for light-emitting diode display, liquid crystal display, touch-control liquid crystal display and
OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) touches device etc..
The network port 500 is connected with processor 200, for being communicatively coupled with external each terminal device.The communication link
The communication technology used by connecing can be cable communicating technology or wireless communication technique, and such as mobile high definition chained technology (MHL) leads to
It is blue with universal serial bus (USB), high-definition media interface (HDMI), adopting wireless fidelity technology (WiFi), Bluetooth Communication Technology, low-power consumption
The tooth communication technology, communication technology based on IEEE802.11s etc..
Fig. 5 illustrates only the electronic equipment with component 100-500, it will be appreciated by persons skilled in the art that Fig. 5 shows
Structure out does not constitute the restriction to electronic equipment, may include than illustrating less perhaps more components or combining certain
A little components or different component layouts.
Present invention also provides a kind of computer readable storage medium, the storage medium may include: USB flash disk, mobile hard disk,
Read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic
The various media that can store program code such as dish or CD.Computer program, the calculating are stored on the storage medium
Machine program realizes the step of PCIE chain circuit detecting method that any of the above-described embodiment provides when being executed by processor.
Each embodiment is described in a progressive manner in specification, the highlights of each of the examples are with other realities
The difference of example is applied, the same or similar parts in each embodiment may refer to each other.For system disclosed in embodiment
Speech, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is referring to method part illustration
?.It should be pointed out that for those skilled in the art, under the premise of not departing from the application principle, also
Can to the application, some improvement and modification can also be carried out, these improvement and modification also fall into the protection scope of the claim of this application
It is interior.
It should also be noted that, in the present specification, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that the process, method, article or equipment for including a series of elements not only includes that
A little elements, but also including other elements that are not explicitly listed, or further include for this process, method, article or
The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged
Except there is also other identical elements in the process, method, article or apparatus that includes the element.
Claims (10)
1. a kind of PCIE chain circuit detecting method characterized by comprising
When detecting target device access, the corresponding PCIE port numbers of the target device are identified；
The corresponding PCIE slot position of the target device is determined using system command according to the PCIE port numbers；
Whether within a preset range to judge current PC IE bus bandwidth and rate；
If it is not, then outputting alarm information；Wherein, the warning information includes the PCIE slot position.
2. PCIE chain circuit detecting method according to claim 1, which is characterized in that the target device includes FC card.
3. PCIE chain circuit detecting method according to claim 1 or claim 2, which is characterized in that utilized according to the PCIE port numbers
System command determines the corresponding PCIE slot position of the target device, comprising:
Corresponding PCI ID number is obtained using the first system order according to the PCIE port numbers；
Corresponding PCIE slot position is determined according to the PCI ID number.
4. PCIE chain circuit detecting method according to claim 3, which is characterized in that the judgement current PC IE bus bandwidth and
Within a preset range whether rate, comprising:
The current PC IE bus bandwidth and rate are obtained using second system order, and judges the current PC IE bus bandwidth
Whether within a preset range with rate.
5. a kind of PCIE link detecting system characterized by comprising
Identification module, for identifying the corresponding PCIE port numbers of the target device when detecting target device access；
Determining module, for determining the corresponding PCIE slot of the target device using system command according to the PCIE port numbers
Position；
Judgment module, for whether within a preset range to judge current PC IE bus bandwidth and rate；If it is not, then outputting alarm is believed
Breath；Wherein, the warning information includes the PCIE slot position.
6. PCIE link detecting system according to claim 5, which is characterized in that the target device includes FC card.
7. according to the PCIE link detecting system of claim 5 or 6, which is characterized in that the determining module includes:
First determination unit, for obtaining corresponding PCI ID number using the first system order according to the PCIE port numbers；
Second determination unit, for obtaining corresponding PCIE slot position according to the PCI ID number.
8. PCIE link detecting system according to claim 7, which is characterized in that the judgment module is specially to utilize second
System command obtains the current PC IE bus bandwidth and rate, and judge the current PC IE bus bandwidth and rate whether
In preset range；If it is not, the then module of outputting alarm information.
9. a kind of electronic equipment characterized by comprising
Memory, for storing computer program；
Processor realizes the link detecting side PCIE as described in any one of Claims 1-4 when for executing the computer program
The step of method.
10. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium
Program realizes the PCIE chain circuit detecting method as described in any one of Claims 1-4 when the computer program is executed by processor
The step of.
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