CN110932930B - Detection method, device and medium for server PCIE link stability - Google Patents
Detection method, device and medium for server PCIE link stability Download PDFInfo
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- CN110932930B CN110932930B CN201911106755.9A CN201911106755A CN110932930B CN 110932930 B CN110932930 B CN 110932930B CN 201911106755 A CN201911106755 A CN 201911106755A CN 110932930 B CN110932930 B CN 110932930B
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- 230000005540 biological transmission Effects 0.000 claims abstract description 260
- 238000000034 method Methods 0.000 claims abstract description 56
- 238000003860 storage Methods 0.000 claims abstract description 13
- 238000004590 computer program Methods 0.000 claims description 11
- 230000009286 beneficial effect Effects 0.000 description 6
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0876—Network utilisation, e.g. volume of load or congestion level
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
Abstract
The application discloses a method and a device for detecting the stability of a PCIE link of a server and a computer readable storage medium, wherein the method comprises the following steps: acquiring a first transmission rate and a second transmission rate of a target PCIE link, which are acquired from a CPU end and a PCIE equipment end of a target server respectively; judging whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate; if the two PCIE links are the same, judging that the transmission of the target PCIE link is stable; and if not, determining that the transmission of the target PCIE link is unstable. Therefore, the method further determines the stability of the target PCIE link to be detected by respectively obtaining the transmission rate of the target PCIE link from the CPU end and the PCIE equipment end and comparing whether the transmission rate of the target PCIE link is the same as the standard transmission rate, so that the detection is more comprehensive, and the detection accuracy is further improved.
Description
Technical Field
The present invention relates to the field of data transmission, and in particular, to a method and an apparatus for stabilizing a PCIE link of a server, and a computer-readable storage medium.
Background
PCI-express (peripheral component interconnect express) is a high-speed serial computer expansion bus standard, belongs to high-speed serial point-to-point double-channel high-bandwidth transmission, and connected equipment distributes independent channel bandwidth and does not share bus bandwidth, and mainly supports functions of active power management, error reporting, end-to-end reliability transmission, hot plug, quality of service (QOS) and the like. The current PCI-Express interfaces have several speeds (16 GT/s, 8GT/s, 5GT/s, 2.5GT/s, respectively) such as PCIE 4.0, PCIE3.0, PCIE2.0, PCIE1.0, etc. The PCIE device and the CPU perform high-speed transmission of signals and data through the PCIE link (CPU end — PCIE link — PCIE device end). The stability of the transmission rate of the PCIE link determines the reliability and accuracy of data transmission, and is an important influence factor on the performance of the server. Therefore, the prior art provides a method for detecting the stability of a PCIE link: and under the state that the server is OS, using lspci to detect the PCIE link rate. However, the method only detects the transmission rate of the PCIE link from the PCIE device end, and the detection of the stability of the transmission rate of the PCIE link is not comprehensive enough.
Therefore, how to more fully detect the stability of the transmission rate of the PCIE link in the server is a technical problem that needs to be solved by those skilled in the art at present.
Disclosure of Invention
In view of this, the present invention is directed to provide a method for detecting stability of a PCIE link in a server, which can detect the stability of the PCIE link in the server more comprehensively; another objective of the present invention is to provide a device for detecting PCIE link stability of a server and a computer-readable storage medium, both having the above beneficial effects.
In order to solve the above technical problem, the present invention provides a method for detecting the stability of a PCIE link of a server, including:
acquiring a first transmission rate and a second transmission rate of a target PCIE link, which are acquired from a CPU end and a PCIE equipment end of a target server respectively;
judging whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate;
if the target PCIE link transmission is the same as the target PCIE link transmission, judging that the target PCIE link transmission is stable;
and if not, judging that the target PCIE link transmission is unstable.
Preferably, the process of acquiring the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server, specifically includes:
restarting the target server according to preset times and acquiring the first transmission rate and the second transmission rate of the target PCIE link which are acquired from the CPU end and the PCIE equipment end of the target server respectively after each restart;
correspondingly, the process of determining whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate specifically includes:
and judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not.
Preferably, the process of determining whether each of the first transmission rates and each of the second transmission rates are the same as the standard transmission rate specifically includes:
and judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not by using an automatic comparison tool.
Preferably, the process of restarting the target server according to a preset number of times and acquiring the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server respectively, after each restart specifically includes:
and restarting the target server according to a preset time period to reach the preset times, and acquiring the first transmission rate and the second transmission rate of the target PCIE link respectively acquired from the CPU end and the PCIE equipment end of the target server after each restart.
Preferably, after the determining whether each of the first transmission rates and each of the second transmission rates are the same as the standard transmission rate, the method further includes:
and sending out corresponding prompt information according to the comparison result.
Preferably, the process of acquiring the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server, specifically includes:
connecting an XDP interface which is directly connected with the CPU end in the target server through control equipment to acquire the first transmission rate;
and acquiring the second transmission rate of the target PCIE link from the PCIE equipment end through an lspci instruction.
In order to solve the above technical problem, the present invention further provides a device for detecting the stability of a PCIE link of a server, including:
the system comprises an acquisition module, a processing module and a processing module, wherein the acquisition module is used for acquiring a first transmission rate and a second transmission rate of a target PCIE link, which are acquired from a CPU end and a PCIE equipment end of a target server respectively;
the judging module is used for judging whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate; if the two are the same, calling a first execution module; if not, calling a second execution module;
the first execution module is configured to determine that the target PCIE link transmission is stable;
the second execution module is configured to determine that transmission of the target PCIE link is unstable.
Preferably, the acquiring module specifically includes:
a first obtaining unit, configured to restart the target server according to a preset number of times and obtain the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server, respectively, after each restart;
correspondingly, the judging module specifically comprises:
a first determining unit, configured to determine whether each of the first transmission rates and each of the second transmission rates are the same as the standard transmission rate.
Preferably, the judging module is specifically:
a second determining unit, configured to determine whether each of the first transmission rates and each of the second transmission rates are the same as the standard transmission rate by using an automatic comparison tool.
Preferably, the first obtaining unit specifically includes:
and the first obtaining subunit is configured to restart the target server according to a preset time period for the preset number of times, and obtain the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server respectively, after each restart.
Preferably, further comprising:
and the prompting device is used for sending out corresponding prompting information according to the comparison result.
In order to solve the above technical problem, the present invention further provides another apparatus for detecting stability of a PCIE link of a server, including:
a memory for storing a computer program;
and the processor is used for realizing the steps of any one of the above detection methods for the PCIE link stability of the server when executing the computer program.
In order to solve the above technical problem, the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of any one of the above methods for detecting the PCIE link stability of the server are implemented.
Therefore, compared with the method for detecting the stability of the target PCIE link by acquiring the transmission rate of the target PCIE link from the PCIE device end only in the prior art, in the method for detecting the stability of the server PCIE link provided in the embodiment of the present invention, the stability of the target PCIE link is further determined by acquiring the transmission rate of the target PCIE link from the CPU end and the PCIE device end respectively, and comparing whether both the transmission rates are the same as the standard transmission rate, so that the detection is more comprehensive, and the detection accuracy is further improved.
In order to solve the technical problem, the invention also provides a detection device for the stability of the PCIE link of the server and a computer readable storage medium, which have the beneficial effects.
Drawings
In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of a method for detecting stability of a PCIE link of a server according to an embodiment of the present invention;
fig. 2 is a structural diagram of a detection apparatus for detecting the stability of a PCIE link of a server according to an embodiment of the present invention;
fig. 3 is a structural diagram of another detection apparatus for detecting PCIE link stability of a server according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The core of the embodiment of the invention is to provide a method for detecting the stability of a PCIE link of a server, which can more comprehensively detect the stability of the transmission rate of the PCIE link in the server; another core of the present invention is to provide a device for detecting the stability of a PCIE link of a server and a computer-readable storage medium, both having the above beneficial effects.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Fig. 1 is a flowchart of a method for detecting the stability of a PCIE link of a server according to an embodiment of the present invention. As shown in fig. 1, a method for detecting the stability of a PCIE link of a server includes:
s10: and acquiring a first transmission rate and a second transmission rate of the target PCIE link, which are acquired from a CPU end and a PCIE equipment end of the target server respectively.
It should be noted that, in actual operation, the CPU end and the PCIE end are generally connected through a target PCIE link; the CPU refers to a Central Processing Unit (CPU), and the PCIE device refers to a device that transmits data according to the PCI-E bus standard.
In this embodiment, first, the transmission rates of the target PCIE link before the CPU end and the PCIE device end are collected from the CPU end and the PCIE device end in the target server, respectively, to obtain a first transmission rate and a second transmission rate, respectively.
Specifically, the control device may be connected to the CPU end, and the first transmission rate of a target PCIE link connected to the PCIE device end in the CPU is read; or, the control device may be connected to an XDP (extended Debug port) interface on the target server, and the control device is used to directly acquire the first transmission rate of the target PCIE link when the XDP interface is directly connected to the CPU; the embodiment does not limit the specific manner of acquiring the first transmission rate.
In this embodiment, the process of acquiring the second transmission rate of the target PCIE link from the PCIE device side of the target server specifically includes: first, after a target server enters an OS (Operating System), an lspci tool under Linux is used to query a unique device identification number of a PCIE device. The unique device identification number can be a slot number, and if the slot number is xx: xx.x, the second transmission rate of the target PCIE link at the PCIE device end is obtained through an operation instruction 'lspci-s xx: xx.x-vvvvv'.
S20: judging whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate; if yes, go to S30; if not, go to S40;
s30: determining that the transmission of a target PCIE link is stable;
s40: and determining that the target PCIE link transmission is unstable.
Specifically, after the first transmission rate and the second transmission rate are obtained from the CPU end and the PCIE device end, that is, after the corresponding transmission rates are obtained from the two ends of the target PCIE link, the first transmission rate and the second transmission rate are compared with the standard transmission rate, and whether the first transmission rate and the second transmission rate are the same is determined. It should be noted that the standard transmission rate is set according to the link design in the target server. In actual operation, the first transmission rate and the second transmission rate can be respectively compared with the standard transmission rate, and the three can be determined to be the same under the condition that the two judgment results are the same; or comparing the second transmission rate with the standard transmission rate, and determining whether the first transmission rate is the same as the second transmission rate under the condition that the second transmission rate is the same as the standard transmission rate, so as to determine whether the first transmission rate and the second transmission rate are the same. Specifically, if the transmission rates are the same, it indicates that the transmission rates at the two ends of the target PCIE link are the same as the standard transmission rate, so that it is determined that the transmission of the target PCIE link is stable; if not, it indicates that the transmission rates detected from the two ends of the target PCIE link are different, so that it is determined that the transmission of the target PCIE link is unstable.
Therefore, compared with the method for detecting the stability of the target PCIE link by acquiring the transmission rate of the target PCIE link from the PCIE device end only in the prior art, in the method for detecting the stability of the server PCIE link provided in the embodiment of the present invention, the stability of the target PCIE link is further determined by acquiring the transmission rate of the target PCIE link from the CPU end and the PCIE device end respectively, and comparing whether both the transmission rates are the same as the standard transmission rate, so that the detection is more comprehensive, and the detection accuracy is further improved.
As a preferred embodiment, the process of obtaining the first transmission rate and the second transmission rate of the target PCIE link, which are respectively collected from the CPU end and the PCIE device end of the target server, specifically includes:
connecting an XDP interface which is directly connected with a CPU end in a target server through control equipment to obtain a first transmission rate;
and acquiring a second transmission rate of the target PCIE link from the PCIE equipment terminal through the lspci instruction.
In actual operation, an XDP interface is provided on the motherboard of the target server, and the XDP interface is directly connected to the CPU (the CPU is provided with the XDP interface), and can detect all data links (including the target PCIE link) directly connected to the CPU. Specifically, the control device is connected to the XDP interface of the motherboard through the XDP serial line, and the memory, the PCIE, and other high-speed link signal instructions can be acquired through the XDP interface, and various events of the CPU are received. It should be noted that the control device may be a notebook computer or a single chip microcomputer, and the present embodiment does not limit this.
In addition, the process of acquiring the second transmission rate of the target PCIE link from the PCIE device end through the lspci instruction is common general knowledge of those skilled in the art, and is not described herein again.
Therefore, the first transmission rate is obtained through the method provided by the embodiment, and the operation method is simple and convenient.
On the basis of the foregoing embodiment, this embodiment further describes and optimizes the technical solution, and specifically, in this embodiment, the process of obtaining the first transmission rate and the second transmission rate of the target PCIE link, which are respectively collected from the CPU end and the PCIE device end of the target server, specifically includes:
restarting a target server according to preset times, and respectively acquiring a first transmission rate and a second transmission rate of a target PCIE link acquired from a CPU end and a PCIE equipment end of the target server after each restart;
correspondingly, the process of determining whether the first transmission rate and the second transmission rate are both the same as the standard transmission rate specifically includes:
and judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not.
Specifically, in this embodiment, after the target server is restarted each time, the operation of respectively obtaining the first transmission rate and the second transmission rate of the target PCIE link acquired from the CPU end and the PCIE device end of the target server is executed, the first transmission rate acquired each time is stored in the first file (file1.txt), and the second transmission rate acquired each time is stored in the second file (file2. txt). After the number of restart times reaches the preset number of times and the first transmission rate and the second transmission rate which are correspondingly acquired in number corresponding to the preset number of times, the transmission rates of the target PCIE links acquired from the CPU end and the PCIE equipment end respectively after each restart are recorded in the first file and the second file respectively.
Then, it is determined whether each of the first transmission rates and each of the second transmission rates are the same as a standard transmission rate. Specifically, a first transmission rate and a second transmission rate which are correspondingly acquired during each restart are compared; in an ideal state, if the target PCIE link is stable, each transmission rate is equal.
As can be seen, in the embodiment, the plurality of first transmission rates and the plurality of second transmission rates are obtained by restarting to compare, so that the conclusion deviation caused by one-sidedness in the sequential comparison process can be further avoided, and the accuracy of detecting the stability of the target PCIE link is further improved.
On the basis of the foregoing embodiment, this embodiment further describes and optimizes the technical solution, and specifically, in this embodiment, the process of determining whether the first transmission rate and the second transmission rate are both the same as the standard transmission rate specifically includes:
and judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not by using an automatic comparison tool.
In this embodiment, it is further considered that after the first transmission rate and the second transmission rate are obtained in the number corresponding to the preset number, the data amount to be compared is large, so that the embodiment further determines whether each of the first transmission rate and each of the second transmission rate is the same as the standard transmission rate by using the automatic comparison tool. Specifically, the automatic comparison of the files may be performed by using a diff tool in the Linux system, for example, whether the first file (file1.txt) and the second file (file2.txt) are the same or not may be compared by using the diff file1.txt file2. txt.
Therefore, the method of the embodiment can greatly improve the speed and convenience for determining whether each first transmission rate and each second transmission rate are the same as the standard transmission rate.
On the basis of the foregoing embodiment, this embodiment further describes and optimizes the technical solution, and specifically, in this embodiment, a process of restarting the target server according to a preset number of times and acquiring the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server respectively after each restart, specifically includes:
and restarting the target server according to a preset time period to reach a preset number of times, and acquiring a first transmission rate and a second transmission rate of the target PCIE link respectively acquired from a CPU (central processing unit) end and a PCIE (peripheral component interface express) equipment end of the target server after each restart.
In this embodiment, specifically, the target server is restarted according to a preset time period, and correspondingly, the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server, are respectively acquired according to the same preset time period.
It should be noted that, in this embodiment, the cycle length of the preset time period is not limited, and is determined specifically according to the acquisition of the first transmission rate and the second transmission rate and the actual operation requirement.
As can be seen, in the embodiment, by further acquiring the first transmission rate and the second transmission rate according to the preset time period, data aliasing can be avoided, and the acquired transmission rates are more uniform in time distribution, so that the accuracy of detecting the stability of the target PCIE link is further improved.
On the basis of the foregoing embodiment, this embodiment further describes and optimizes the technical solution, and specifically, in this embodiment, after determining whether each first transmission rate and each second transmission rate are the same as the standard transmission rate, the method further includes:
and sending out corresponding prompt information according to the comparison result.
It is to be understood that, in actual practice, after determining whether each of the first transmission rates and each of the second transmission rates are the same as the standard transmission rate, there are a plurality of different comparison results:
the first transmission rate and the second transmission rate are both the same as the standard transmission rate;
the first transmission rate is the same as the standard transmission rate, and the second transmission rates are different from the standard transmission rate;
the first transmission rate is different from the standard transmission rate, and the second transmission rate is the same as the standard transmission rate.
It should be noted that, in this embodiment, the manner of sending the prompt information is not limited, and for example, the prompt information may be sent by a prompt device such as a buzzer and/or an indicator light; different prompt information can be specifically represented according to different sound production frequencies/light emitting frequencies of the prompt device, so that the effect of prompting various comparison results is achieved.
Therefore, in actual operation, corresponding prompt information can be sent according to different comparison results, so that an operator can quickly and intuitively acquire the comparison results.
The above detailed description is given to the embodiment of the method for detecting the PCIE link stability of the server according to the present invention, and the present invention further provides a device and a computer-readable storage medium for detecting the PCIE link stability of the server corresponding to the method.
Fig. 2 is a structural diagram of a device for detecting the stability of a PCIE link of a server according to an embodiment of the present invention, and as shown in fig. 2, the device for detecting the stability of a PCIE link of a server includes:
an obtaining module 21, configured to obtain a first transmission rate and a second transmission rate of a target PCIE link, where the first transmission rate and the second transmission rate are respectively acquired from a CPU end and a PCIE device end of a target server;
a judging module 22, configured to judge whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate; if the two are the same, the first execution module 23 is called; if not, the second execution module 24 is called;
the first execution module 23 is configured to determine that transmission of the target PCIE link is stable;
the second execution module 24 is configured to determine that transmission of the target PCIE link is unstable.
The detection device for the stability of the PCIE link of the server provided by the embodiment of the invention has the beneficial effect of the detection method for the stability of the PCIE link of the server.
As a preferred embodiment, the obtaining module 21 specifically includes:
the first obtaining unit is used for restarting the target server according to the preset times and respectively acquiring a first transmission rate and a second transmission rate of the target PCIE link from a CPU (central processing unit) end and a PCIE (peripheral component interface express) equipment end of the target server after each restart;
correspondingly, the determining module 22 specifically includes:
and the first judging unit is used for judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not.
As a preferred embodiment, the determining module 22 is specifically:
and the second judging unit is used for judging whether the first transmission rate and the second transmission rate are both the same as the standard transmission rate by utilizing the automatic comparison tool.
As a preferred embodiment, the first obtaining unit specifically includes:
the first obtaining subunit is configured to restart the target server for a preset number of times according to a preset time period, and respectively obtain, after each restart, a first transmission rate and a second transmission rate of the target PCIE link, where the first transmission rate and the second transmission rate are collected from a CPU end and a PCIE device end of the target server.
As a preferred embodiment, further comprising:
and the prompting device is used for sending out corresponding prompting information according to the comparison result.
Fig. 3 is a structural diagram of another apparatus for detecting PCIE link stability of a server according to an embodiment of the present invention, and as shown in fig. 3, the apparatus for detecting PCIE link stability of a server includes:
a memory 31 for storing a computer program;
the processor 32 is configured to implement the steps of the method for detecting the stability of the PCIE link of the server as described above when executing the computer program.
The detection device for the stability of the PCIE link of the server provided by the embodiment of the invention has the beneficial effect of the detection method for the stability of the PCIE link of the server.
In order to solve the above technical problem, the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method for detecting the PCIE link stability of the server are implemented.
The computer-readable storage medium provided by the embodiment of the invention has the beneficial effect of the detection method for the PCIE link stability of the server.
The method, the device and the computer-readable storage medium for detecting the stability of the PCIE link of the server provided by the present invention are described in detail above. The principles and embodiments of the present invention are explained herein using specific examples, which are set forth only to help understand the method and its core ideas of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
Claims (9)
1. A method for detecting the stability of a PCIE link of a server is characterized by comprising the following steps:
acquiring a first transmission rate and a second transmission rate of a target PCIE link, which are acquired from a CPU end and a PCIE equipment end of a target server respectively; the target PCIE link is connected with the CPU end and the PCIE equipment end;
judging whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate; the standard transmission rate is set according to a link design mode in the target server;
if the target PCIE link transmission is the same as the target PCIE link transmission, judging that the target PCIE link transmission is stable;
and if not, judging that the target PCIE link transmission is unstable.
2. The method according to claim 1, wherein the process of obtaining the first transmission rate and the second transmission rate of the target PCIE link, which are respectively collected from the CPU end and the PCIE device end of the target server, specifically includes:
restarting the target server according to preset times and acquiring the first transmission rate and the second transmission rate of the target PCIE link which are acquired from the CPU end and the PCIE equipment end of the target server respectively after each restart;
correspondingly, the process of determining whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate specifically includes:
and judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not.
3. The method according to claim 2, wherein the process of determining whether each of the first transmission rates and each of the second transmission rates are the same as the standard transmission rate comprises:
and judging whether each first transmission rate and each second transmission rate are the same as the standard transmission rate or not by using an automatic comparison tool.
4. The method according to claim 2, wherein the process of restarting the target server according to a preset number of times and acquiring the first transmission rate and the second transmission rate of the target PCIE link, which are acquired from the CPU end and the PCIE device end of the target server respectively, after each restart specifically includes:
and restarting the target server according to a preset time period to reach the preset times, and acquiring the first transmission rate and the second transmission rate of the target PCIE link respectively acquired from the CPU end and the PCIE equipment end of the target server after each restart.
5. The method of claim 2, wherein after said determining whether each of said first transmission rates and each of said second transmission rates are the same as said standard transmission rate, further comprising:
and sending out corresponding prompt information according to the comparison result.
6. The method according to any one of claims 1 to 5, wherein the process of obtaining the first transmission rate and the second transmission rate of the target PCIE link, which are respectively collected from the CPU end and the PCIE device end of the target server, specifically includes:
connecting an XDP interface which is directly connected with the CPU end in the target server through control equipment to acquire the first transmission rate;
and acquiring the second transmission rate of the target PCIE link from the PCIE equipment terminal through an Lspci instruction.
7. A device for detecting the stability of a PCIE link of a server is characterized by comprising:
the system comprises an acquisition module, a processing module and a processing module, wherein the acquisition module is used for acquiring a first transmission rate and a second transmission rate of a target PCIE link, which are acquired from a CPU end and a PCIE equipment end of a target server respectively; the target PCIE link is connected with the CPU end and the PCIE equipment end;
the judging module is used for judging whether the first transmission rate and the second transmission rate are both the same as a standard transmission rate; if the two are the same, calling a first execution module; if not, calling a second execution module; the standard transmission rate is set according to a link design mode in the target server;
the first execution module is configured to determine that the target PCIE link transmission is stable;
the second execution module is configured to determine that transmission of the target PCIE link is unstable.
8. A device for detecting the stability of a PCIE link of a server is characterized by comprising:
a memory for storing a computer program;
a processor configured to implement the steps of the method for detecting server PCIE link stability according to any one of claims 1 to 6 when executing the computer program.
9. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, implements the steps of the method for detecting server PCIE link stability according to any one of claims 1 to 6.
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Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101946440A (en) * | 2008-02-12 | 2011-01-12 | 艾利森电话股份有限公司 | Method and arrangement in a wireless communication network |
JP2011048542A (en) * | 2009-08-26 | 2011-03-10 | Sony Corp | Information processing apparatus and method |
CN104125269A (en) * | 2014-06-30 | 2014-10-29 | 广州酷狗计算机科技有限公司 | Method and device for rate limitation |
CN104133716A (en) * | 2014-08-18 | 2014-11-05 | 浪潮电子信息产业股份有限公司 | Method for testing main board hardware stability of server |
CN104168605A (en) * | 2014-07-24 | 2014-11-26 | 小米科技有限责任公司 | Data transmission control method and apparatus |
CN104660471A (en) * | 2015-03-10 | 2015-05-27 | 浪潮集团有限公司 | Method for automatically testing PCIE-SSD transmitting velocity and band width under Linux |
CN105353981A (en) * | 2015-10-27 | 2016-02-24 | 浪潮电子信息产业股份有限公司 | PCIE (Peripheral Component Interface Express) SSD (Solid State Device) optimization method |
CN106130193A (en) * | 2016-09-05 | 2016-11-16 | 青岛鲁渝能源科技有限公司 | Radio energy transmission system and wireless power transmission control method |
CN106452968A (en) * | 2016-10-24 | 2017-02-22 | 郑州云海信息技术有限公司 | Accelerated detection method for reliability of PCIE (Peripheral Component Interconnect Express) equipment |
CN106789409A (en) * | 2016-12-06 | 2017-05-31 | 曙光信息产业(北京)有限公司 | The detection method and device of a kind of server slot |
CN108092840A (en) * | 2016-11-23 | 2018-05-29 | 中国移动通信集团广东有限公司 | Network rate segment processing method and device |
CN109032981A (en) * | 2018-07-11 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of method and system counting PCIE information |
CN109558282A (en) * | 2018-12-03 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium |
CN109901962A (en) * | 2019-02-27 | 2019-06-18 | 苏州浪潮智能科技有限公司 | The synchronized mixes method for testing pressure and system of AEP memory under a kind of Linux |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7281077B2 (en) * | 2005-04-06 | 2007-10-09 | Qlogic, Corporation | Elastic buffer module for PCI express devices |
KR100973079B1 (en) * | 2008-08-13 | 2010-07-29 | 한국전자통신연구원 | Apparatus for transmitting high PCI express signal and control method thereof |
US9674840B1 (en) * | 2015-11-25 | 2017-06-06 | Qualcomm Incorporated | System and methods for avoiding call performance degradation due to missed downlink control signal in a wireless communication device |
CN109818886B (en) * | 2018-12-07 | 2020-12-08 | 华为技术有限公司 | Method and device for configuring equalization parameters |
-
2019
- 2019-11-13 CN CN201911106755.9A patent/CN110932930B/en active Active
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101946440A (en) * | 2008-02-12 | 2011-01-12 | 艾利森电话股份有限公司 | Method and arrangement in a wireless communication network |
JP2011048542A (en) * | 2009-08-26 | 2011-03-10 | Sony Corp | Information processing apparatus and method |
CN104125269A (en) * | 2014-06-30 | 2014-10-29 | 广州酷狗计算机科技有限公司 | Method and device for rate limitation |
CN104168605A (en) * | 2014-07-24 | 2014-11-26 | 小米科技有限责任公司 | Data transmission control method and apparatus |
CN104133716A (en) * | 2014-08-18 | 2014-11-05 | 浪潮电子信息产业股份有限公司 | Method for testing main board hardware stability of server |
CN104660471A (en) * | 2015-03-10 | 2015-05-27 | 浪潮集团有限公司 | Method for automatically testing PCIE-SSD transmitting velocity and band width under Linux |
CN105353981A (en) * | 2015-10-27 | 2016-02-24 | 浪潮电子信息产业股份有限公司 | PCIE (Peripheral Component Interface Express) SSD (Solid State Device) optimization method |
CN106130193A (en) * | 2016-09-05 | 2016-11-16 | 青岛鲁渝能源科技有限公司 | Radio energy transmission system and wireless power transmission control method |
CN106452968A (en) * | 2016-10-24 | 2017-02-22 | 郑州云海信息技术有限公司 | Accelerated detection method for reliability of PCIE (Peripheral Component Interconnect Express) equipment |
CN108092840A (en) * | 2016-11-23 | 2018-05-29 | 中国移动通信集团广东有限公司 | Network rate segment processing method and device |
CN106789409A (en) * | 2016-12-06 | 2017-05-31 | 曙光信息产业(北京)有限公司 | The detection method and device of a kind of server slot |
CN109032981A (en) * | 2018-07-11 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of method and system counting PCIE information |
CN109558282A (en) * | 2018-12-03 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium |
CN109901962A (en) * | 2019-02-27 | 2019-06-18 | 苏州浪潮智能科技有限公司 | The synchronized mixes method for testing pressure and system of AEP memory under a kind of Linux |
Non-Patent Citations (2)
Title |
---|
"PCIe扫盲——PCIe总线性能评估(有效数据速率估算)";Felix;《http://blog.chinaaet.com/justlxy/p/5100062236》;20190306;全文 * |
"覆盖率导向的可重用PCIe验证平台设计";刘航天等;《计算机工程与设计》;20160630;全文 * |
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