CN114676085A - CCIX (computer communications interface) bus control method, device and medium - Google Patents
CCIX (computer communications interface) bus control method, device and medium Download PDFInfo
- Publication number
- CN114676085A CN114676085A CN202210302322.6A CN202210302322A CN114676085A CN 114676085 A CN114676085 A CN 114676085A CN 202210302322 A CN202210302322 A CN 202210302322A CN 114676085 A CN114676085 A CN 114676085A
- Authority
- CN
- China
- Prior art keywords
- ccix
- bus
- ccix bus
- pci
- bandwidth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 50
- 238000004891 communication Methods 0.000 title description 5
- 238000004590 computer program Methods 0.000 claims description 13
- 238000011084 recovery Methods 0.000 claims description 8
- 230000005540 biological transmission Effects 0.000 abstract description 26
- 238000010586 diagram Methods 0.000 description 8
- 238000012545 processing Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- 238000013473 artificial intelligence Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000010801 machine learning Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Abstract
The application discloses a CCIX bus control method, device and medium, comprising: and when the server is detected to meet the preset conditions, acquiring the bandwidth requirement information of the PCI equipment in the server so as to determine how to allocate the CCIX bus bandwidth for each PCI equipment. And performing bandwidth setting on the CCIX bus according to the bandwidth requirement information to multiplex the CCIX bus into the PCI bus, so that the resource utilization rate and the data transmission speed are improved. Therefore, according to the scheme provided by the application, the CCIX bus is multiplexed into the PCI bus when the server meets the preset condition, so that the CCIX bus resource of the CPU can be utilized to the maximum extent to improve the data transmission speed of the PCI bus.
Description
Technical Field
The present application relates to the field of servers, and in particular, to a method, an apparatus, and a medium for controlling a CCIX bus.
Background
With the development of a multi-core server, an existing ARM server generally has multiple CPUs, and data transmission among different CPUs is realized through a Cache coherence Interconnect standard (CCIX) bus suitable for an accelerator, where the CCIX bus is a data transmission mode adopting a layered architecture based on PCIe architecture extension, and can greatly improve data transmission speed.
When the ARM server has an idle CPU, the CCIX bus connected to the idle CPU is also in an idle state, which may cause a waste of computing resources.
Therefore, how to provide a CCIX bus control method to improve the utilization rate of CCIX bus resources between CPUs is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a CCIX bus control method, a device and a medium, so as to solve the problem that a CCIX bus is idle due to the fact that a CPU is idle, and improve the utilization rate of CCIX bus resources.
In order to solve the above technical problem, the present application provides a CCIX bus control method, including:
judging whether the working state of the CPU of the server meets a preset condition or not;
if the preset condition is met, acquiring bandwidth requirement information of the PCI equipment;
and carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information so as to multiplex the CCIX bus into a PCI bus.
Preferably, the preset conditions include:
detecting a presence of the CCIX bus in an idle state;
or detect a CCIX bus control command sent by the BIOS.
Preferably, if it is detected that the CCIX bus in the idle state exists, before the step of performing bandwidth setting on the CCIX bus according to the bandwidth requirement information, the method further includes:
judging whether the CCIX bus in an idle state is connected with the PCI equipment or not;
if the PCI equipment is connected with the CCIX bus, executing the step of carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information;
and if the CCIX bus is not connected with the PCI equipment, controlling a switching unit to connect the CCIX bus with the PCI equipment and executing the step of carrying out bandwidth setting on the CCIX bus according to the bandwidth demand information.
Preferably, the setting the bandwidth of the CCIX bus according to the bandwidth requirement information includes:
acquiring splitting setting information of the CCIX bus according to a Riser card connected with the CCIX bus;
and splitting the CCIX bus according to the splitting setting information.
Preferably, after the step of performing bandwidth setting on the CCIX bus according to the bandwidth requirement information, the method further includes:
when detecting that the PCI equipment is in an idle state or acquiring a recovery instruction;
controlling the switching unit to disconnect the CCIX bus from the PCI device and to connect with the CPU.
Preferably, the switching unit is a jumper cap.
In order to solve the above technical problem, the present application further provides a CCIX bus controller, including:
the judging module is used for judging whether the server meets a preset condition or not;
the acquisition module is used for acquiring the bandwidth demand information of the PCI equipment if the preset conditions are met;
and the setting module is used for carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information so as to multiplex the CCIX bus into the PCI bus.
Preferably, the system further comprises a switching module, before executing the acquiring module,
judging whether the CCIX bus in an idle state is connected with the PCI equipment or not;
if the PCI equipment is connected, the setting module is executed;
and if the CCIX is not connected with the PCI equipment, controlling a switching unit to connect the CCIX bus with the PCI equipment and executing the setting module.
In order to solve the above technical problem, the present application further provides a CCIX bus control apparatus, including a memory for storing a computer program;
a processor for implementing the steps of the CCIX bus control method when executing the computer program.
In order to solve the above technical problem, the present application further provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the CCIX bus control method.
The application provides a CCIX bus control method, which comprises the following steps: when the server is detected to meet the preset conditions, the bandwidth demand information of the PCI equipment in the server is obtained, so that the CCIX bus bandwidth can be conveniently distributed to each PCI equipment. And performing bandwidth setting on the CCIX bus according to the bandwidth requirement information to multiplex the CCIX bus into the PCI bus, so that the resource utilization rate and the data transmission speed are improved. Therefore, according to the scheme provided by the application, the CCIX bus is multiplexed into the PCI bus when the server meets the preset condition, so that the CCIX bus resource of the CPU can be utilized to the maximum extent to improve the data transmission speed of the PCI bus.
In addition, the application also provides a CCIX bus control device and medium, which correspond to the method and have the same effects.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a flowchart of a CCIX bus control method according to an embodiment of the present disclosure;
fig. 2(a) is a structural diagram of a CCIX bus controller according to an embodiment of the present disclosure;
FIG. 2(b) is a block diagram of another CCIX bus control device provided in an embodiment of the present application;
FIG. 3 is a block diagram of another CCIX bus control apparatus provided in accordance with an embodiment of the present application;
fig. 4 is a block diagram of another CCIX bus controller according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without any creative effort belong to the protection scope of the present application.
The core of the application is to provide a CCIX bus control method, device and medium, so as to solve the problem of bus resource waste caused by CCIX bus idleness and improve the utilization rate of the CCIX bus.
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings.
In the ARM server work scenario, multiple CPUs exist in the ARM server to perform computing tasks more quickly. The CPUs are usually connected by a CCIX bus to realize data transmission, while the CPUs and other devices are usually connected by a Peripheral Component Interconnect (PCI) bus, and the CCIX bus is established on the basis of the PCIe specification and can be compatible with the PCIe specification. And compared with the PCI bus, the CCIX bus has higher transmission speed, and the transmission speed can be increased to 25 GT/s. However, when there are uninstalled CPUs or CPUs in an idle state, the CCIX bus connected to these CPUs is also in an idle state, which results in waste of bus resources. In order to maximize the utilization of CCIX bus resources and improve the data transmission speed among different devices in the server, the application provides a CCIX bus control method, and when the server is detected to meet a preset condition, the bandwidth demand information of the PCI devices in the server is acquired, so that the CCIX bus bandwidth is determined to be distributed to the PCI devices. And performing bandwidth setting on the CCIX bus according to the bandwidth requirement information to multiplex the CCIX bus into the PCI bus, so that the resource utilization rate and the data transmission speed are improved. Therefore, according to the scheme provided by the application, the CCIX bus is multiplexed into the PCI bus when the server meets the preset condition, so that the CCIX bus resource of the CPU can be utilized to the maximum extent to improve the data transmission speed of the PCI bus.
Fig. 1 is a flowchart of a CCIX bus control method according to an embodiment of the present application, where as shown in fig. 1, the method includes:
s10: and judging whether the working state of the CPU of the server meets a preset condition or not.
In particular implementations, the CCIX bus is typically used to enable the transfer of data between devices. The advantage of the CCIX bus protocol is compatibility with PCI Express, since the CCIX bus protocol builds on the PCI Express specification and can be passed over the PCI Express link with little or no modification. Further, the CCIX bus protocol may communicate data over any PCI Express link running at 8GT/s or faster, with the PCI Express 4.0 protocol specifying a maximum data rate of 16GT/s, while the CCIX bus protocol may increase the transmission rate to 25GT/s, a CCIX link may reach 100GB/s under the same conditions, and two CCIX components in communication with each other may be initialized (typically a hardware autonomous process) over the normal PCI Express link to achieve the maximum mutually supported PCI Express speed.
In order to maximize the utilization of the CCIX bus resources and improve the data transmission speed of the server system, when the operating state of the server satisfies a predetermined condition, for example, the CCIX bus is in an idle state or a CPU connected to the CCIX bus is in an idle state or the CPU is not installed, or a CCIX bus control command sent by the BIOS is detected, so as to control the CCIX bus multiplexing. Otherwise, the CCIX bus is in a normal working state, and the forced multiplexing of the CCIX bus into the PCI bus affects the data transmission speed and even causes data loss, which affects the normal work of the server.
S11: and if the preset condition is met, acquiring the bandwidth demand information of the PCI equipment.
When the working state of the server is detected to meet the preset condition, the CCIX bus needs to be multiplexed into the PCI bus so as to improve the data transmission speed of the PCI equipment. Because a plurality of PCI devices exist in the server and the importance levels and the operating states of the PCI devices are different, in order to improve the data read-write speed of the system as much as possible, bandwidth requirement information of the different PCI devices and the importance levels of the current tasks of the PCI devices need to be determined, so that the CCIX bus bandwidth is allocated to the PCI devices.
It can be understood that the bandwidth demand information of the PCI device can be obtained through the bandwidth test script, and the bandwidth demand information of the PCI device can also be obtained through a table look-up mode, the former mode is more accurate, the second mode is simpler and faster, and the mode for obtaining the bandwidth demand information is not limited by the application.
In a specific implementation, determining the importance of the current task of the PCI device includes: and calculating the importance degree of the current task according to the transmitted data volume of the currently executed task of the PCI equipment and the weight corresponding to the task.
S12: and performing bandwidth setting on the CCIX bus according to the bandwidth requirement information so as to multiplex the CCIX bus into the PCI bus.
When multiplexing the CCIX bus as the PCI bus, it is necessary to perform bandwidth setting on the CCIX bus according to the bandwidth requirement information, and split the CCIX bus into buses of different bandwidths to be multiplexed as the PCI bus. Typically, the CCIX bus can be split into buses with bandwidths X4, X8, and X16, respectively.
It can be understood that the CCIX bus is generally used for data transmission between CPUs, that is, both ends of the CCIX bus are connected to the CPUs, so that when the CCIX bus is connected to the CPUs and the CCIX bus needs to be multiplexed, the CCIX bus needs to be disconnected from the CPUs and connected to the PCI devices to which the bandwidth needs to be allocated.
Fig. 2(a) is a structural diagram of a CCIX bus controller according to an embodiment of the present invention, and fig. 2(b) is a structural diagram of another CCIX bus controller according to an embodiment of the present invention, where as shown in fig. 2(a), when the CCIX bus is connected to the CPU1, the CCIX bus is switched to be connected to the PCI device by a switching unit 2 (e.g., a jumper cap). As shown in fig. 2(b), when the CPU1 is not installed or the CPU1 is in an idle state, the CCIX bus is directly multiplexed into the PCI bus by the BIOS system to increase the data transmission speed of the PCI device.
The application provides a CCIX bus control method, which comprises the following steps: and when the server is detected to meet the preset conditions, acquiring the bandwidth requirement information of the PCI equipment in the server so as to determine how to allocate the CCIX bus bandwidth for each PCI equipment. And performing bandwidth setting on the CCIX bus according to the bandwidth requirement information to multiplex the CCIX bus into the PCI bus, so that the resource utilization rate and the data transmission speed are improved. Therefore, according to the scheme provided by the application, the CCIX bus is multiplexed into the PCI bus when the server meets the preset condition, so that the CCIX bus resource of the CPU can be utilized to the maximum extent to improve the data transmission speed of the PCI bus.
In the specific implementation, when the CCIX bus needs to be multiplexed into the PCI bus, it needs to be ensured that the multiplexing operation does not affect the normal transmission of data in the system. Therefore, it is necessary to perform the multiplexing operation when the operating state of the server satisfies a preset condition.
On the basis of the above embodiment, the preset conditions include:
detecting the presence of a CCIX bus in an idle state;
or detect a CCIX bus control command sent by the BIOS.
It will be appreciated that a server typically has multiple CPU slots for mounting multiple CPUs to perform work tasks. However, when the performance requirement on the server is low, only a single CPU may be installed in the multi-CPU server, and at this time, the CCIX bus in the server is in an idle state. In addition, when the CPU connected to the CCIX bus is in an idle state, the CCIX bus may be determined to be in an idle state if the amount of data transferred by the CCIX bus is less than a preset amount of data.
Further, in an implementation, there may be a PCI device mission critical situation that requires sending control commands through the BIOS to force the CCIX bus to be multiplexed as the PCI bus. In this case, the BIOS is required to determine CCIX bus information from the Riser card connected to CCIX and split the CCIX bus.
In the embodiment, the preset condition is set to detect that there is a CCIX bus in an idle state; or detect a CCIX bus control command sent by the BIOS. The server can normally work when the CCIX bus is multiplexed, and the stability and the reliability of the system are improved.
In a specific implementation, since the CCIX bus is generally used for CPU interconnection and data transmission, the CCIX bus is generally connected to the CPU, and in this case, the CCIX bus cannot be multiplexed as the PCI bus only by program setting. In order to solve the problem, on the basis of the above embodiment, before the step of performing bandwidth setting on the CCIX bus according to the bandwidth requirement information if it is detected that there is an idle CCIX bus, the method further includes:
judging whether the CCIX bus in an idle state is connected with the PCI equipment or not;
if the PCI equipment is connected with the CCIX equipment, executing a step of carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information;
and if the PCI equipment is not connected, controlling the switching unit to connect the CCIX bus with the PCI equipment, and executing the step of carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information.
In a specific implementation, the CCIX bus is actively disconnected from the CPU through the switching unit, and the CCIX bus is connected with the PCI equipment. In a specific implementation, the switching unit may be an electronic switch or a jumper cap. For example, when the switching unit is a jumper cap, the jumper cap is switched from the CCIX link to the PCI link for use by the control unit, so that multiplexing of the CCIX bus is realized.
As a preferred embodiment, after the step of performing bandwidth setting on the CCIX bus according to the bandwidth requirement information, the method further includes:
detecting that the PCI equipment is in an idle state or acquiring a recovery instruction;
the control switch unit disconnects the CCIX bus from the PCI devices and connects to the CPU.
When the PCI device connected to the multiplexing CCIX bus is in an idle state (i.e., the data transmission amount is smaller than the data threshold) or the server system acquires the recovery instruction, the control switching unit disconnects the CCIX bus from the PCI device and connects the PCI device to the CPU, so as to end multiplexing of the CCIX bus.
In this embodiment, by detecting whether the CCIX bus is connected to the PCI device, if not, the CCIX bus is connected to the PCI device by using the switching unit, so as to ensure that the CCIX bus multiplexing operation is performed normally, and improve the stability of the CCIX bus multiplexing method. Meanwhile, when the PCI equipment is detected to be in an idle state or a recovery instruction is acquired, the multiplexing of the CCIX bus is stopped, and the stability and the reliability of the server system are improved.
As a preferred embodiment, the bandwidth setting of the CCIX bus according to the bandwidth requirement information includes:
acquiring splitting setting information of the CCIX bus according to a Riser card connected with the CCIX bus;
and splitting the CCIX bus according to the splitting setting information.
In a specific implementation, the CCIX bus is split to increase different bandwidths for different PCI devices, and generally, the CCIX bus is split into buses with bandwidths of X4, X8, and X16 to increase the speed of sending and receiving data by the PCI devices.
In the above embodiments, the detailed description is given on the CCIX bus control method, and the present application also provides a corresponding embodiment of the CCIX bus control apparatus. It should be noted that the present application describes the embodiments of the apparatus portion from two perspectives, one from the perspective of the function module and the other from the perspective of the hardware.
Fig. 3 is a block diagram of another CCIX bus controller provided in the embodiment of the present application, and as shown in fig. 3, the apparatus includes:
the judging module 10 is used for judging whether the server meets the preset conditions;
the obtaining module 11 is configured to obtain bandwidth requirement information of the PCI device if a preset condition is met;
and the setting module 12 is configured to perform bandwidth setting on the CCIX bus according to the bandwidth requirement information, so as to multiplex the CCIX bus into the PCI bus.
In addition, the CCIX bus controller provided in this embodiment further includes: a switching module and a recovery module.
The switching module is used for judging whether the CCIX bus in an idle state is connected with the PCI equipment or not before the acquisition module is executed; if the PCI equipment is connected, the setting module is executed; if the PCI equipment is not connected with the CCIX bus, controlling the switching unit to connect the CCIX bus with the PCI equipment and executing the setting module; thereby ensuring that the CCIX multiplexing operation is performed normally.
The recovery module is used for detecting that the PCI equipment is in an idle state or acquiring a recovery instruction; the control switch unit disconnects the CCIX bus from the PCI devices and connects to the CPU.
Since the embodiments of the apparatus portion and the method portion correspond to each other, please refer to the description of the embodiments of the method portion for the embodiments of the apparatus portion, which is not repeated here.
This embodiment provides a CCIX bus control device, this device includes: when the server is detected to meet the preset conditions, the bandwidth demand information of the PCI equipment in the server is obtained, so that the CCIX bus bandwidth can be conveniently distributed to each PCI equipment. And performing bandwidth setting on the CCIX bus according to the bandwidth requirement information to multiplex the CCIX bus into the PCI bus, so that the resource utilization rate and the data transmission speed are improved. Therefore, the device provided by the application can maximize the utilization of CCIX bus resources of a CPU to improve the data transmission speed of the PCI bus by multiplexing the CCIX bus into the PCI bus when the server meets the preset condition.
Fig. 4 is a block diagram of another CCIX bus controller according to an embodiment of the present application, where as shown in fig. 4, the CCIX bus controller includes: a memory 20 for storing a computer program;
a processor 21 for implementing the steps of the method for obtaining the operating status of the server as described in the above embodiments when executing the computer program.
The server provided by the embodiment may include, but is not limited to, a smart phone, a tablet computer, a notebook computer, or a desktop computer.
The processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. The Processor 21 may be implemented in hardware using at least one of a Digital Signal Processor (DSP), a Field-Programmable Gate Array (FPGA), and a Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor, where the main processor is a processor for Processing data in an awake state, and is also called a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state. In some embodiments, the processor 21 may be integrated with a Graphics Processing Unit (GPU) which is responsible for rendering and drawing the content required to be displayed by the display screen. In some embodiments, the processor 21 may further include an Artificial Intelligence (AI) processor for processing computational operations related to machine learning.
The memory 20 may include one or more computer-readable storage media, which may be non-transitory. Memory 20 may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used for storing the following computer program 201, wherein after being loaded and executed by the processor 21, the computer program can implement the relevant steps of the CCIX bus control method disclosed in any one of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202, data 203, and the like, and the storage manner may be a transient storage manner or a permanent storage manner. Operating system 202 may include, among others, Windows, Unix, Linux, and the like. Data 203 may include, but is not limited to, server operational status, etc.
In some embodiments, the CCIX bus control apparatus may also include a display 22, an input/output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.
Those skilled in the art will appreciate that the configuration shown in FIG. 4 is not intended to be limiting of the CCIX bus control apparatus and may include more or fewer components than those shown.
The CCIX bus control apparatus provided in the embodiment of the present application includes a memory and a processor, and when the processor executes a program stored in the memory, the following method can be implemented:
judging whether the working state of the CPU of the server meets a preset condition or not;
if the preset condition is met, acquiring bandwidth requirement information of the PCI equipment;
and performing bandwidth setting on the CCIX bus according to the bandwidth requirement information so as to multiplex the CCIX bus into the PCI bus.
Finally, the application also provides a corresponding embodiment of the computer readable storage medium. The computer-readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps as set forth in the above-mentioned method embodiments.
It is to be understood that if the method in the above embodiments is implemented in the form of software functional units and sold or used as a stand-alone product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium and executes all or part of the steps of the methods described in the embodiments of the present application, or all or part of the technical solutions. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, an optical disk, or other various media capable of storing program codes.
The CCIX bus control method, apparatus, and medium provided by the present application are described in detail above. The embodiments are described in a progressive mode in the specification, the emphasis of each embodiment is on the difference from the other embodiments, and the same and similar parts among the embodiments can be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, without departing from the principle of the present application, the present application can also make several improvements and modifications, and those improvements and modifications also fall into the protection scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. A CCIX bus control method, comprising:
judging whether the working state of the CPU of the server meets a preset condition or not;
if the preset condition is met, acquiring bandwidth requirement information of the PCI equipment;
and carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information so as to multiplex the CCIX bus into a PCI bus.
2. The CCIX bus control method of claim 1, wherein said preset conditions comprise:
detecting a presence of the CCIX bus in an idle state;
or detect a CCIX bus control command sent by the BIOS.
3. The CCIX bus control method of claim 2 wherein, if it is detected that there is an idle CCIX bus, the method further comprises, before the step of performing bandwidth setting on the CCIX bus according to the bandwidth requirement information:
judging whether the CCIX bus in an idle state is connected with the PCI equipment or not;
if the PCI equipment is connected with the CCIX bus, executing the step of carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information;
and if the CCIX bus is not connected with the PCI equipment, controlling a switching unit to connect the CCIX bus with the PCI equipment and executing the step of carrying out bandwidth setting on the CCIX bus according to the bandwidth demand information.
4. The CCIX bus control method of claim 3, wherein said bandwidth setting of said CCIX bus according to said bandwidth requirement information comprises:
acquiring splitting setting information of the CCIX bus according to a Riser card connected with the CCIX bus;
and splitting the CCIX bus according to the splitting setting information.
5. The CCIX bus control method of claim 3, wherein after said step of bandwidth setting said CCIX bus according to said bandwidth requirement information, further comprising:
when detecting that the PCI equipment is in an idle state or acquiring a recovery instruction;
controlling the switching unit to disconnect the CCIX bus from the PCI device and connect with the CPU.
6. The CCIX bus control method of claim 5, wherein said switching unit is a jumper cap.
7. A CCIX bus controller comprising:
the judging module is used for judging whether the server meets the preset conditions or not;
the acquisition module is used for acquiring the bandwidth demand information of the PCI equipment if the preset conditions are met;
and the setting module is used for carrying out bandwidth setting on the CCIX bus according to the bandwidth requirement information so as to multiplex the CCIX bus into a PCI bus.
8. The CCIX bus control apparatus of claim 7, further comprising a switch module for, prior to execution of said fetch module,
judging whether the CCIX bus in an idle state is connected with the PCI equipment or not;
if the PCI equipment is connected, the setting module is executed;
and if the PCI equipment is not connected, controlling a switching unit to connect the CCIX bus with the PCI equipment and executing the setting module.
9. A CCIX bus controller comprising a memory for storing a computer program;
a processor for implementing the steps of the CCIX bus control method of any one of claims 1 to 6 when executing the computer program.
10. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the CCIX bus control method according to any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210302322.6A CN114676085B (en) | 2022-03-25 | 2022-03-25 | CCIX bus control method, device and medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210302322.6A CN114676085B (en) | 2022-03-25 | 2022-03-25 | CCIX bus control method, device and medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114676085A true CN114676085A (en) | 2022-06-28 |
| CN114676085B CN114676085B (en) | 2023-07-14 |
Family
ID=82076662
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210302322.6A Active CN114676085B (en) | 2022-03-25 | 2022-03-25 | CCIX bus control method, device and medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114676085B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109075230A (en) * | 2016-04-26 | 2018-12-21 | 西铁城电子株式会社 | Light emitting device |
| CN109558282A (en) * | 2018-12-03 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium |
| CN112433596A (en) * | 2020-11-27 | 2021-03-02 | 海光信息技术股份有限公司 | Link width adjusting method, device, equipment and storage medium |
-
2022
- 2022-03-25 CN CN202210302322.6A patent/CN114676085B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109075230A (en) * | 2016-04-26 | 2018-12-21 | 西铁城电子株式会社 | Light emitting device |
| CN109558282A (en) * | 2018-12-03 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of PCIE chain circuit detecting method, system and electronic equipment and storage medium |
| CN112433596A (en) * | 2020-11-27 | 2021-03-02 | 海光信息技术股份有限公司 | Link width adjusting method, device, equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114676085B (en) | 2023-07-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| AU2013263866B2 (en) | Computer system, method for accessing peripheral component interconnect express endpoint device, and apparatus | |
| CN109324991B (en) | Hot plug device, method, medium and system of PCIE (peripheral component interface express) equipment | |
| US20140280960A1 (en) | Methods and apparatus for dynamically allocating devices between multiple controllers | |
| CN109947682B (en) | Server mainboard and server | |
| CN111901164A (en) | Adaptive control method, device, equipment and system for OCP NIC network card | |
| CN110968352B (en) | Reset system and server system of PCIE equipment | |
| CN110399217B (en) | Memory resource allocation method, device and equipment | |
| CN111857840A (en) | BIOS starting method and device | |
| CN112685347A (en) | Compatible method and device for PCIE (peripheral component interface express) equipment with different bandwidths and server | |
| CN111813599A (en) | Solid-state storage device, server mainboard and control method | |
| CN111736867A (en) | FPGA updating device, method and storage medium | |
| CN111078353A (en) | Operation method of storage equipment and physical server | |
| WO2017166997A1 (en) | Inic-side exception handling method and device | |
| CN116644011B (en) | Quick identification method, device and equipment of I2C equipment and storage medium | |
| CN114676085B (en) | CCIX bus control method, device and medium | |
| CN116560803A (en) | Resource management method and related device based on SR-IOV | |
| CN116450046A (en) | Cloud disk implementation method and device, intelligent network card, server and storage medium | |
| CN114185720B (en) | Method, device, equipment and storage medium for dynamic hot backup of server | |
| CN116204448A (en) | Multi-port solid state disk, control method and device thereof, medium and server | |
| CN112597094B (en) | Device and method for improving RDMA transmission efficiency | |
| CN111414201A (en) | PCIe card loading method, device, equipment and storage medium | |
| US11593121B1 (en) | Remotely disabling execution of firmware components | |
| CN111338861B (en) | RSS-based network card performance test method, device, equipment and storage medium | |
| CN110704163A (en) | Server and virtual storage method and device thereof | |
| CN117519908B (en) | Virtual machine thermomigration method, computer equipment and medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |