CN110399217B - Memory resource allocation method, device and equipment - Google Patents
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- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
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Abstract
The application discloses a memory resource allocation method, which comprises the following steps: judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output system); if yes, determining the type of the target equipment; the memory capacity required by the target equipment is determined according to the type of the target equipment, and the memory capacity is distributed to the Switch chip, so that no matter what type of PCI peripheral equipment is connected to the PCIE slot in the server chassis, the PCI peripheral equipment cannot be used due to insufficient memory resources, and the situation of overlarge memory resource distribution cannot occur, so that the waste of memory resources can be avoided. Correspondingly, the memory resource allocation device and the memory resource allocation equipment disclosed by the application also have the technical effects.
Description
Technical Field
The present application relates to the technical field of servers, and in particular, to a method, an apparatus, and a device for allocating memory resources.
Background
At present, a Switch chip is generally built in a server chassis, a PCIE slot therein can be controlled by the Switch chip, and the PCIE slot can be connected to various PCI peripherals. When the types of the PCI peripherals are different, the required memory sizes are also different, but the allocation of the server to the Switch chip is a default value, so the following problems occur:
if the default value is larger than the memory size required by the PCI peripheral equipment, the PCI peripheral equipment can be normally used, but the memory resource is wasted; if the default value is smaller than the memory size required by the PCI peripheral, then the PCI peripheral will not be used. For example: when the PCI peripheral is a 100G network card, the size of the memory resource required by the 100G network card is 64 bits, and the size of the memory allocated to the Switch chip by the server is defaulted to 32 bits, so the situation that the network card is lost or cannot be used often occurs in the Linux server.
It should be noted that the PCI peripheral device is: and the external device is connected with the PCIE slot or the interface.
Therefore, how to avoid the waste of memory resources and ensure the normal use of the PCI peripherals in the server chassis is a problem to be solved by those skilled in the art.
Disclosure of Invention
In view of this, an object of the present application is to provide a method, an apparatus, and a device for allocating memory resources, so as to avoid waste of memory resources and ensure normal use of PCI peripherals in a server chassis. The specific scheme is as follows:
in a first aspect, the present application provides a method for allocating memory resources, including:
judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output system);
if yes, determining the type of the target equipment;
and determining the memory capacity required by the target equipment according to the type of the target equipment, and allocating the memory capacity for the Switch chip.
Preferably, the determining, by using the BIOS, whether a PCIE slot controlled by a Switch chip in the server chassis is connected to the target device includes:
in the process of starting up the server, the device connected with the PCIE slot is enumerated by using the BIOS.
Preferably, determining the type of the target device comprises:
the type of the target device is determined according to the result of the enumeration operation.
Preferably, determining the memory capacity required by the target device according to the type of the target device includes:
and if the target equipment is a 100G network card, determining the memory capacity required by the target equipment to be 64 bits.
In a second aspect, the present application provides an apparatus for allocating memory resources, including:
the judging module is used for judging whether a PCIE slot controlled by a Switch chip in the server chassis is connected with target equipment by using the BIOS;
the determining module is used for determining the type of the target equipment when the PCIE slot is connected with the target equipment;
and the allocation module is used for determining the memory capacity required by the target equipment according to the type of the target equipment and allocating the memory capacity for the Switch chip.
In a third aspect, the present application provides a memory resource allocation device, including:
a memory for storing a computer program;
a processor for executing a computer program to implement the memory resource allocation method as disclosed in any one of the preceding.
Preferably, the method further comprises the following steps: and the server case is connected with the processor, and the Switch chip and 4 PCIE slots controlled by the Switch chip are arranged in the server case.
Preferably, 8 NVLINK interfaces controlled by the Switch chip are also arranged in the server chassis.
Preferably, 2 server chassis are connected in parallel to the processor.
Preferably, the processor and server chassis are connected by a SAS cable.
In a fourth aspect, the present application provides a readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the memory resource allocation method disclosed above.
According to the above scheme, the present application provides a memory resource allocation method, including: judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output system); if yes, determining the type of the target equipment; and determining the memory capacity required by the target equipment according to the type of the target equipment, and allocating the memory capacity for the Switch chip.
Therefore, when the PCIE slot in the server chassis is connected to the target device, and the target device is the PCI peripheral, the type of the target device is determined first, and then the memory capacity required by the target device is determined according to the type of the target device, and finally the Switch chip is allocated with the memory capacity corresponding to the target device, so that no matter what type of PCI peripheral is connected to the PCIE slot in the server chassis, the PCI peripheral cannot be used due to insufficient memory resources, and the situation of excessive memory resource allocation cannot occur, so that waste of memory resources can be avoided.
Correspondingly, the memory resource allocation device and the memory resource allocation equipment provided by the application also have the technical effects.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a flowchart of a memory resource allocation method disclosed in the present application;
fig. 2 is a schematic diagram of a memory resource allocation apparatus according to the present disclosure;
fig. 3 is a schematic diagram of a memory resource allocation apparatus disclosed in the present application;
FIG. 4 is a schematic diagram of an interior of a server chassis disclosed herein;
FIG. 5 is a schematic diagram of a connection between a processor and a server chassis according to the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Currently, the server assigns a Switch chip as a default. If the default value is larger than the memory size required by the PCI peripheral equipment, the PCI peripheral equipment can be normally used, but the memory resource is wasted; if the default value is smaller than the memory size required by the PCI peripheral, then the PCI peripheral will not be used. Therefore, the memory resource allocation scheme is provided, and the corresponding memory resources can be allocated according to the PCI peripherals connected with the PCIE slots, so that the normal use of the PCI peripherals can be guaranteed, and the waste of the memory resources can be avoided.
Referring to fig. 1, an embodiment of the present application discloses a memory resource allocation method, including:
s101, judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output system); if yes, executing S102; if not, no operation is performed;
s102, determining the type of target equipment;
s103, determining the memory capacity required by the target equipment according to the type of the target equipment, and distributing the memory capacity for the Switch chip.
In this embodiment, the target device is a variety of PCI peripherals. The method disclosed by the embodiment can be applied to a server and is executed by a processor in the server. The BIOS, among other things, can provide the lowest level, most direct hardware setup and control for the computer. The BIOS (Basic Input Output System) is a firmware interface that is standard in the industry on IBMPC compatible systems. In fact, it is a set of programs solidified on a ROM chip on the inner mainboard of the computer, and it stores the most important basic input and output programs of the computer, the self-test program after power-on and the system self-start program.
In this embodiment, determining whether a PCIE slot controlled by a Switch chip in a server chassis is connected to a target device by using a BIOS includes: in the process of starting up the server, the device connected with the PCIE slot is enumerated by using the BIOS. If the PCI peripherals are enumerated, it is indicated that the PCIE slot is connected with the target device, so that which PCI peripheral is connected to which PCIE slot can be identified. That is, the type of the target device may be determined based on the results of the enumeration operation, since the enumeration operation enumerates the vendor ID and the device ID of the target device one by one.
The target device may be a network card device, such as a 100G network card. If the target device is a 100G network card, determining the memory capacity required by the target device according to the type of the target device specifically comprises: determining the memory capacity required by the target equipment to be 64 bits; and then 64 bits of memory capacity can be allocated to the Switch chip.
Note that the Switch chip has a vendor ID and a device ID. Before the BIOS is used to determine whether a PCIE slot controlled by a Switch chip in the server chassis is connected to the target device, the BIOS may also be used to identify that the Switch chip has a vendor ID and a device ID, so as to determine whether the Switch chip controls the PCIE slot.
In this embodiment, the memory capacity required by various PCI peripherals may be pre-stored in the configuration file, and when the PCIE slot is connected to the corresponding target device, the PCIE slot may be searched and selected in the configuration file. Therefore, determining the memory capacity required by the target device according to the type of the target device includes: and searching the memory capacity corresponding to the target equipment in a preset configuration file.
The method disclosed by the embodiment and the existing default allocation method can be used together, and when the memory resources are sufficient, the existing default allocation method can be adopted; when the memory resources are insufficient or in short supply, the method disclosed in this embodiment may be adopted. At this time, a handover mechanism of resource allocation may be set. For example: after the server is started, judging the allocation condition of memory resources in the server, and determining the size of allocable memory; determining the size of a memory to be allocated; further comparing the size of the allocable memory with the size of the memory to be allocated; when the size of the allocable memory is larger than that of the memory to be allocated, the memory resource is sufficient, and then the existing default allocation method can be executed; when the size of the allocable memory is not larger than the size of the memory to be allocated, it indicates that the memory resources are insufficient or deficient, and the method disclosed in this embodiment may be executed.
Therefore, when the PCIE slot in the server chassis is connected to the target device, and the target device is the PCI peripheral, the type of the target device is determined first, and then the memory capacity required by the target device is determined according to the type of the target device, and finally the Switch chip is allocated with the memory capacity corresponding to the target device, so that no matter what type of PCI peripheral is connected to the PCIE slot in the server chassis, the PCI peripheral cannot be used due to insufficient memory resources, and the situation of excessive memory resource allocation cannot occur, so that waste of memory resources can be avoided.
In the following, a memory resource allocation apparatus provided in an embodiment of the present application is introduced, and a memory resource allocation apparatus described below and a memory resource allocation method described above may refer to each other.
Referring to fig. 2, an embodiment of the present application discloses a memory resource allocation apparatus, including:
a judging module 201, configured to judge, by using a BIOS, whether a PCIE slot controlled by a Switch chip in a server chassis is connected to a target device;
a determining module 202, configured to determine a type of a target device when the PCIE slot is connected to the target device;
the allocating module 203 is configured to determine the memory capacity required by the target device according to the type of the target device, and allocate the memory capacity for the Switch chip.
In a specific embodiment, the determining module is specifically configured to:
in the process of starting up the server, the device connected with the PCIE slot is enumerated by using the BIOS.
In a specific embodiment, the determining module is specifically configured to:
the type of the target device is determined according to the result of the enumeration operation.
In a specific embodiment, the allocation module is specifically configured to:
and if the target equipment is a 100G network card, determining the memory capacity required by the target equipment to be 64 bits.
For more specific working processes of each module and unit in this embodiment, reference may be made to corresponding contents disclosed in the foregoing embodiments, and details are not described here again.
As can be seen, the present embodiment provides a memory resource allocation apparatus, including: the device comprises a judging module, a determining module and a distributing module. Firstly, a judging module judges whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output System); when the PCIE slot is connected with the target equipment, the determining module determines the type of the target equipment; and the allocation module determines the memory capacity required by the target equipment according to the type of the target equipment and allocates the memory capacity for the Switch chip. Thus, each module can work in cooperation with other modules, thereby ensuring the normal use of the PCI peripheral equipment and avoiding the waste of memory resources.
In the following, a memory resource allocation device provided in an embodiment of the present application is introduced, and a memory resource allocation device described below and a memory resource allocation method and apparatus described above may refer to each other.
Referring to fig. 3, an embodiment of the present application discloses a memory resource allocation device, including:
a memory 301 for storing a computer program;
a processor 302 for executing the computer program to implement the steps of:
judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output system); if yes, determining the type of the target equipment; and determining the memory capacity required by the target equipment according to the type of the target equipment, and allocating the memory capacity for the Switch chip.
In this embodiment, when the processor executes the computer subprogram stored in the memory, the following steps may be specifically implemented: in the process of starting up the server, the device connected with the PCIE slot is enumerated by using the BIOS.
In this embodiment, when the processor executes the computer subprogram stored in the memory, the following steps may be specifically implemented: the type of the target device is determined according to the result of the enumeration operation.
In this embodiment, when the processor executes the computer subprogram stored in the memory, the following steps may be specifically implemented: and if the target equipment is a 100G network card, determining the memory capacity required by the target equipment to be 64 bits.
In this embodiment, the memory resource allocation device further includes: and the server case is connected with the processor, and the Switch chip and 4 PCIE slots controlled by the Switch chip are arranged in the server case. The memory resource allocation device may be a server, and the server may specifically be an X86 motherboard server.
Wherein, 8 NVLINK interfaces controlled by the Switch chip are also arranged in the server chassis.
Wherein, the processor is connected with 2 server cases in parallel.
The processor and the server case are connected through an SAS cable.
If each PCIE slot is connected to one 100G network card and each NVLINK interface is connected to one GPU, the distribution of the 100G network card and the GPU in the server chassis is as shown in fig. 4, and fig. 4 is a schematic diagram of the inside of the server chassis provided in this embodiment. The BOX in fig. 4 represents a server chassis. The size of the memory resource required by the GPU is 32 bits.
If the memory resource allocation device is a server, and the processor is connected to 2 server chassis in parallel, the connection schematic diagram refers to fig. 5, and fig. 5 is a connection schematic diagram of the processor and the server chassis provided in this embodiment. In fig. 5, BOX1 and BOX2 represent server chassis, respectively. The computing power and the processing efficiency of the server connected with the 2 server cases are greatly improved, and the utilization rate of the GPU in the BOX can be improved; meanwhile, on the premise of limited space and power consumption, the use efficiency of the GPU by the CPU is improved by multiple times, and the purchasing cost and the operation cost of Internet customers are reduced.
Therefore, the memory resource allocation device provided by the embodiment can improve the computing capability of the server on the premise of not causing physical damage to the GPU device and the 100G network card device inside the chassis, thereby greatly ensuring the requirements of customers on high computing capability and transmission capability but low purchasing cost, and ensuring the cost performance of the device.
In the following, a readable storage medium provided by an embodiment of the present application is introduced, and a readable storage medium described below and a memory resource allocation method, apparatus, and device described above may be referred to each other.
A readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the memory resource allocation method disclosed in the foregoing embodiments. For the specific steps of the method, reference may be made to the corresponding contents disclosed in the foregoing embodiments, which are not described herein again.
References in this application to "first," "second," "third," "fourth," etc., if any, are intended to distinguish between similar elements and not necessarily to describe a particular order or sequence. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Furthermore, the terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, or apparatus.
It should be noted that the descriptions in this application referring to "first", "second", etc. are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of readable storage medium known in the art.
The principle and the implementation of the present application are explained herein by applying specific examples, and the above description of the embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A method for allocating memory resources, comprising:
setting a switching mechanism of resource allocation, judging the allocation condition of memory resources in a server after the server is started, and determining the size of allocable memory; determining the size of a memory to be allocated;
when the size of the allocable memory is larger than that of the memory to be allocated, executing a default allocation method;
when the size of the allocable memory is not larger than that of the memory to be allocated, judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output System);
if yes, determining the type of the target equipment;
determining the memory capacity required by the target equipment according to the type of the target equipment, and distributing the memory capacity for the Switch chip;
the memory capacity required by various PCI peripherals is stored in a configuration file in advance, and when the PCIE slot is connected with corresponding target equipment, the memory capacity corresponding to the target equipment is searched in the preset configuration file.
2. The method of claim 1, wherein the determining, by the BIOS, whether a target device is connected to a PCIE slot controlled by a Switch chip in the server chassis includes:
and in the process of starting up and starting up the server, performing enumeration operation on the equipment connected with the PCIE slot by using the BIOS.
3. The method of claim 2, wherein the determining the type of the target device comprises:
and determining the type of the target equipment according to the result of the enumeration operation.
4. The method according to claim 3, wherein determining the memory capacity required by the target device according to the type of the target device comprises:
and if the target equipment is a 100G network card, determining the memory capacity required by the target equipment to be 64 bits.
5. A memory resource allocation apparatus, comprising:
the judging module is used for setting a switching mechanism of resource allocation, judging the allocation condition of the memory resources in the server after the server is started, and determining the size of the allocable memory; determining the size of a memory to be allocated; when the size of the allocable memory is larger than that of the memory to be allocated, executing a default allocation method; when the size of the allocable memory is not larger than that of the memory to be allocated, judging whether a PCIE slot controlled by a Switch chip in a server chassis is connected with target equipment by using a BIOS (basic input/output System);
a determining module, configured to determine a type of a target device when the PCIE slot is connected to the target device;
the allocation module is used for determining the memory capacity required by the target equipment according to the type of the target equipment and allocating the memory capacity to the Switch chip; the memory capacity required by various PCI peripherals is stored in a configuration file in advance, and when the PCIE slot is connected with corresponding target equipment, the memory capacity corresponding to the target equipment is searched in the preset configuration file.
6. A memory resource allocation device, comprising:
a memory for storing a computer program;
a processor for executing the computer program to implement the memory resource allocation method according to any one of claims 1 to 4.
7. The memory resource allocation device according to claim 6, further comprising: and the server case is connected with the processor, and a Switch chip and 4 PCIE slots controlled by the Switch chip are arranged in the server case.
8. The memory resource allocation device of claim 7, wherein 8 NVLINK interfaces controlled by the Switch chip are further provided in the server chassis.
9. The memory resource allocation device of claim 8, wherein 2 of said server chassis are connected in parallel to said processor.
10. The memory resource allocation device of any one of claims 7 to 9, wherein the processor and the server chassis are connected by a SAS cable.
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| CN111949431B (en) * | 2020-08-27 | 2022-07-05 | 英业达科技有限公司 | Fatal error providing method and fatal error identification method for system-on-chip product |
| CN112559425A (en) * | 2020-11-27 | 2021-03-26 | 山东云海国创云计算装备产业创新中心有限公司 | PCIE port splitting method, device, equipment and medium |
| CN117130763A (en) * | 2022-05-19 | 2023-11-28 | 华为技术有限公司 | Circuit board resource allocation method and device, circuit board and storage medium |
| CN115664953B (en) * | 2022-11-30 | 2023-05-26 | 苏州浪潮智能科技有限公司 | Resource allocation method and related device of external equipment |
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| CN108804230A (en) * | 2018-06-11 | 2018-11-13 | 郑州云海信息技术有限公司 | A kind of method, apparatus and medium for distributing resource according to the type of device PCI |
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