CN109525276A - A kind of multimode data catenary system having external download function and method - Google Patents
A kind of multimode data catenary system having external download function and method Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/401—Circuits for selecting or indicating operating mode
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/74—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for increasing reliability, e.g. using redundant or spare channels or apparatus
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
- H04B7/18517—Transmission equipment in earth stations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
- H04W88/02—Terminal devices
- H04W88/06—Terminal devices adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0813—Configuration setting characterised by the conditions triggering a change of settings
- H04L41/082—Configuration setting characterised by the conditions triggering a change of settings the condition being updates or upgrades of network functionality
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0866—Checking the configuration
- H04L41/0869—Validating the configuration within one network element
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Abstract
A kind of multimode data catenary system having external download function and method, including FPGA, MCU main control module, the first FLASH module, the 2nd FLASH module, gate, receiving-transmitting chain module, interface module, power module and clock module；FPGA completes main data processing and each module configuration feature, MCU main control module receives the control instruction from interface module, FLASH is cooperated to complete operating mode selection, interface module also provides data channel for outside downloading, the conversion and transmission of receiving-transmitting chain module realization data, power module is system power supply, and clock module provides clock signal for FPGA.The present invention can be used for minimizing the hardware structure of the multiple load of FPGA of multimode data chain terminal, the configurator of different working modes can be loaded according to specifically used demand, multimode selection is completed, and there is external download function, program upgrading or replacement can be carried out.
Description
Technical field
The invention belongs to software radios and Communication Anti-Jamming Techniques field, are related to a kind of multimode selection system, are applied to
Miniaturization, high-performance, high integration, high reliability, the load of the FPGA multimode of the data-link terminal of multi-mode communication requirement, and
Has external download function.
Background technique
Miniaturization, high integration are an important trends of Weapons Data chain terminal development.With device technology development and
The progress of design means, signal processing and telecommunication circuit operating rate are higher and higher, and power is increasing, and noise profile is increasingly
It is complicated and strong, while as high-speed high frequency chip integration is continuously improved, shape and weight are smaller and smaller.Novel extensive collection
At circuit, SOC (system level chip), SIP (system in package) device, numerical model analysis System on Chip/SoC rapid development and quickly more
It is new to regenerate, so that circuit system interconnection design is faced with severe reliability, stability challenges now.At higher and higher data
The function that reason requires and becomes increasingly complex brings the increase of configurator space hold amount and FPGA resource occupancy, complicated
To FPGA (programmable gate array) resource and heat consumption, more stringent requirements are proposed for the cooperation of function and multiple-working mode.
And miniaturization and high integration certainly will bring the contradiction with high power consumption, how can also accomplish when in face of multimode operation switching small
Type and low-power consumption are uniformly significant design technologies.
The program change of FPGA copes with the single-particle inversion due to caused by irradiation space at present in aerospace field
Effect is often used FPGA program on line refreshable technology.The technology generally uses CPU+ARM+FPGA's or CPU+CPLD+FPGA
Framework completes command reception by CPU and sends control instruction, the online write-in of program is completed by ARM or CPLD, waits FPGA
It after program is finished receiving, is reconfigured, completes the on line refreshable of FPGA program.This technological side pair is by space spoke
The level accumulation of the single particle effect for penetrating generation, the storage chip partial level overturning caused, mistake overturning excessively will be right
Product has an important influence on, it is therefore desirable to be refreshed in real time to program.
But general civil field, this kind of situation will not be encountered, and complete " three core " framework of its on line refreshable,
More general service condition is more lengthy and jumbled, brought still prominent with the contradiction of miniaturization and low-power consumption.The configurator of FPGA
Departing from nonvolatile semiconductor memory member, online writing process there are risk, for avoid the risk from being taken various measures again
It will increase product cost.This technology is during FPGA write-in program, in order to make both sides speeds match, generally require ARM or
Configurator is stored in local cache by CPLD, is re-fed into FPGA after matching, is reduced allocative efficiency.
In some applications, equipment task time is shorter, does not need to be switched on for a long time and be on active service, also there is no need on line refreshables
Function, under this application background, on line refreshable need complex hardware framework and upgrading process reformed into increase cost and
Increase instable factor.
In some applications, the case where product just will use after generally requiring storage many years, encounter program upgrading sometimes,
Therefore the external download function under complete machine state is needed to have, matching for each module can be quickly updated in the case where not dismantling
Set program.
Summary of the invention
It is an object of the invention to: overcome the deficiencies in the prior art proposes a kind of multimode for having external download function
Data link system and method, solve that FPGA resource occupancy of the data-link terminal under multi-communication mode requirement be excessive, power consumption
The excessively high contradiction between product miniaturization, possesses a kind of simple and reliable communication pattern selection method, and have external downloading
Ability, can be with online upgrading.
The technical solution adopted by the present invention are as follows:
A kind of multimode data catenary system having external download function, comprising: FPGA, MCU main control module, the first FLASH
Module, the 2nd FLASH module, gate, receiving-transmitting chain module and interface module；
MCU main control module receives externally input control instruction, control gate work, so that FPGA by interface module
The chip selection signal of generation is sent to the first FLASH module by gate, or is sent to the 2nd FLASH mould by gate
Block；FPGA is according to the preset configuration journeys of the correspondence different communication modes read from the first FLASH module or the 2nd FLASH module
Ordered pair FPGA itself and receiving-transmitting chain module carry out relevant configuration, then receive outer input data chain by receiving-transmitting chain module
Information carry out handle or external data chain will send information to by receiving-transmitting chain module；
FPGA passes through interface module download online exterior arrangement program and carries out data processing, will treated configurator
The first FLASH module or the 2nd FLASH module is written, updates preset configuration journey in the first FLASH module or the 2nd FLASH module
Sequence.
Preset configuration program refers to preset configuration program in the first FLASH module of the update or the 2nd FLASH module
Upgraded or replaced with the configurator of new other communication patterns of correspondence.
It include downloading correction verification module, cache module, secondary correction verification module, writing module and read through model in FPGA；
FPGA is verified by the exterior arrangement program of interface module download online by downloading correction verification module, verification at
It is stored in cache module after function, then the exterior arrangement program of downloading is written by the first FLASH module or second by writing module
FLASH module reads the content of write-in by read through model after write-in and is verified by secondary correction verification module, to guarantee to write
The configurator entered is correct.
FPGA passes through the incoming downloading correction verification module of RapidIO interface by the exterior arrangement program of interface module download online
And carry out data processing.
Receiving-transmitting chain module include day chain communication module, Beidou communication module, ground communication module, spare communication module with
And data processing module；
Its chain communication module is used for when communication is in day chain communication pattern, and FPGA passes through day chain communication module and external number
Data interaction is carried out according to chain；
Beidou communication module is used for when communication is in Beidou communication mode, and FPGA passes through Beidou communication module and external number
Data interaction is carried out according to chain；
Spare communication module is used for when communication is in other communication patterns in addition to day chain and Beidou, and FPGA passes through standby
Data interaction is carried out with communication module and external data chain；
Ground communication module is for the communication between FPGA and earth station；
Data processing module is used for when FPGA is communicated with external data chain or earth station, to the received number of FPAG
According to being successively filtered, amplifying and analog/digital conversion, D/A switch, amplification and filtering are successively carried out to the FPGA data sent.
Corresponding day chain communication pattern and Beidou communication mode are prestored respectively in first FLASH module or the 2nd FLASH module
Configurator, the configurator of other corresponding communication patterns realized by FPGA download online mode.
When replacing operating mode, MCU sends control instruction control gate switching, so that FPGA switching reads from first
Configurator in FLASH module or the 2nd FLASH module, to realize switching working mode.
Interface module, interface module receive external control instruction by CAN bus, and then complete operating mode selection, connect
Mouth mold block is monitored state reporting by iic bus.
It further include power module and clock module, for giving other module for power supply, clock module mentions power module for FPGA
For operating clock signals.
A kind of data transmission method realized based on the multimode data catenary system for having external download function, including step
It is rapid as follows:
(1) interface module receives external control instruction by CAN bus；
(2) MCU main control module receives externally input control instruction, control gate work by interface module；
(3) chip selection signal that FPGA is generated is sent to the first FLASH module by gate or is sent by gate
To the 2nd FLASH module；
(4) FPGA, which is read, is stored in the pre- of the first FLASH module or the correspondence different communication modes in the 2nd FLASH module
Set configurator；
(5) FPGA is according to the preset configuration program of the correspondence different communication modes of reading to FPGA itself and receiving-transmitting chain
Module is configured；
(6) FPGA handle or by transmitting-receiving chain by the information that receiving-transmitting chain module receives outer input data chain
Road module will send information to external data chain；
(7) judge whether to need switch communication mode, if necessary to switch communication mode, then MCU main control module is sent out again
Control instruction enables gate work, and switches the FLASH being connected to FPGA；Communication pattern if necessary to switching is not first
In FLASH module and the 2nd FLASH module in preset configuration program limit, then (8) are entered step；
(8) FPGA passes through interface module download online exterior arrangement program and carries out data processing, will treated configuration
The first FLASH module or the 2nd FLASH module is written in program, updates preset in the first FLASH module or the 2nd FLASH module match
Set program.
Compared with the existing technology, using the present invention may be implemented it is below the utility model has the advantages that
1) lower FPGA program is required for the FPGA application for having higher data processing capacity to require and plurality of communication schemes
Larger, common common performance FPGA resource occupancy can achieve 90% or more, and when FPGA resource occupancy is more critical,
System is likely to occur the problem of functional lability.It is designed according to requirement using this system, according to function differentiation, it configures journey
Sequence can be can effectively reduce FPGA resource occupancy, be had higher reliability with reasonable distribution FPGA resource occupancy；
2) when plurality of communication schemes enables simultaneously, FPGA resource occupancy is larger, and common common performance FPGA resource accounts for
It can achieve 90% or more with rate, and then the power consumption of the FPGA itself under work with all strength is larger, at the same time, peripheral transmitting-receiving chain
Road module also works at the same time, even if some components standby can use, can also generate extra power consumption.It is adopted according to requirement
When being designed with this system, under a certain communication pattern, FPGA program is effectively decomposed, and reduces the power consumption of FPGA, transmitting-receiving
The working method of link module is confirmed, and the power consumption of receiving-transmitting chain module is also optimized, therefore reduces entire data-link
The power consumption of terminal；
3) compared to FPGA on line refreshable technology, hardware structure of the present invention is succinct, and use process is simple and reliable, allocative efficiency
Height provides one kind in disposable, working time shorter situation (part weapon application), more direct reliable multimode
Selection mode；
4) have quickly external download function, can be realized by the program that FPGA has been loaded quick under complete machine state
Program upgrading cooperates double FLASH structures that can cope with all supported operating modes, the new Working mould having verified that is occurring
It when formula, can write direct in FLASH, and possess backup FLASH to carry out emergency processing when something goes wrong erasable.It is external
RapidIO interface used by downloading is a kind of high-speed interface, the speed of transmission configuration program quickly, in the verifying of actual product
In, carry out program upgrading by the way of the downloading of outside, than return factory tear open lid be directly connected to using the most common jtag interface it is upper
Machine carries out the speed of program upgrading faster.
To sum up, the present invention copes with miniaturization, the use of high-performance, high integration, high reliability, multi-mode communication is wanted
It asks, effectively evades high-performance and multi-mode communication bring configurator space hold amount is larger, FPGA resource occupancy is higher
Problem, the supported operating mode of hardware can not be torn open lid upgrading by external download function, and updating speed is very fast and has
Safeguard measure.
Detailed description of the invention
Fig. 1 is configuration diagram of the present invention.
Specific embodiment
The present invention is directed to requirement of the data-link terminal to miniaturization, high-performance, high integration, high reliability, multi-mode communication
Under, FPGA resource amount insufficient, power consumption big the problems such as big by high request bring configurator space hold is coped with, proposes one
Kind it is applied to the hardware structure of the multiple load of FPGA of miniaturization multimode data chain terminal, which has multi-mode communication, small-sized
Change, configure flexible, high reliablity, feature easy to operate, and has external download function.
In face of miniaturization, multi-operation mode, high data handling requirements, FPGA configurator space is big, resource occupation amount is big
The case where, complicated multimode program is subjected to decomposition recombination, the program after decomposition is deposited in multi-disc FLASH, according to using
It is required that the different configuration FLASH of selection carry out the selection of multiple-working mode.
As shown in Figure 1, the invention proposes a kind of multimode data catenary systems for having external download function, comprising: FPGA,
MCU main control module, the first FLASH module, the 2nd FLASH module, gate, receiving-transmitting chain module and interface module；
MCU main control module receives externally input control instruction, control gate work, so that FPGA by interface module
The chip selection signal of generation is sent to the first FLASH module by gate, or is sent to the 2nd FLASH mould by gate
Block；FPGA is according to the preset configuration journeys of the correspondence different communication modes read from the first FLASH module or the 2nd FLASH module
Ordered pair FPGA itself and receiving-transmitting chain module carry out relevant configuration, then receive outer input data chain by receiving-transmitting chain module
Information carry out handle or external data chain will send information to by receiving-transmitting chain module；
After two sets of preset different configurators ensure that FPGA starting, is carried out to receiving-transmitting chain module different match
It sets, and copes with different communication modes and need to make different data processing works, it is desirable that set carrying out product according to this system
Timing is effectively split configurator, complicated function is rationally decomposed, while receiving-transmitting chain according to requirements
The circuit design of module will guarantee reusability of the circuit under different communication modes as far as possible, according to requirements --- be
Whether no timesharing is total to wave band etc. --- pervasive circuit is designed, the not reusable circuit of fraction can also be in the difference split out
Configuration is distinguished in configurator, and shutdown processing is carried out when not applicable, only pays this part of lesser PCB space and member in this way
Device cost allows for a set of system that can choose and adapt to different communication modes, work load in actual operation with
The system of single communication mode is equally easily.
In a communication link, the burden that FPGA carries out data processing for certain communication pattern is bigger, multi-pass letter
Mode and other function are stitched together and just propose requirements at the higher level to the resources occupation rate of FPGA and power consumption, this is produced with current data-link
The development trend of product miniaturization low-power consumption produces collision.Carry out deisgn product according to the system that the present invention describes, circuit has multiple
With property, PCB space occupancy is smaller, and configurator is reduced by rationally differentiation, resources occupation rate, lower power consumption, therefore satisfaction
Miniaturization, high-performance, high integration, high reliability, the requirement of multi-mode communication data-link terminal.
FPGA passes through interface module download online exterior arrangement program and carries out data processing, will treated configurator
The first FLASH module or the 2nd FLASH module is written, updates preset configuration journey in the first FLASH module or the 2nd FLASH module
Sequence.FPGA makes RapidIO interface by what interface module and outside were used interchangeably, and RapidIO interface transmission rate is very fast, can
With in the very short time by the data stream of configurator to FPGA.
Preset configuration program in the first FLASH module or the 2nd FLASH module is updated to refer to the progress of preset configuration program
Upgrade or replace with the configurator of new other communication patterns of correspondence.Relatively common is that the configurator of FPGA often needs
Carry out edition upgrading, at this time external download capabilities allow for data-link terminal can be in the case where not tearing lid open conveniently
Carry out program upgrading.The third non-preset communication pattern is arrived in use, may use subsequent, since early period is in transmitting-receiving chain
In the circuit design of road module, the higher reusability that ensure that circuit, and not reusable part is distinguished
The data-link terminal for being separately configured, therefore being designed using this system is very possible the third compatible non-preset communication mould
Formula only needs that preset configuration program is replaced with to the version that can cope with the third communication pattern by external download function at this time
This, just completes the upgrading of the compatible new traffic mode of entire product, this hardware state that haves no need to change only passes through outer subordinate
Carry just complete product the upgrading that can be compatible with new traffic mode, cost be it is very low, reduce largely continue to use cost or
Development cost.
It include downloading correction verification module, cache module, secondary correction verification module, writing module and read through model in FPGA；
FPGA is verified by the exterior arrangement program of interface module download online by downloading correction verification module, verification at
It is stored in cache module after function, then the exterior arrangement program of downloading is written by the first FLASH module or second by writing module
FLASH module reads the content of write-in by read through model after write-in and is verified by secondary correction verification module, to guarantee to write
The configurator entered is correct.
FPGA passes through the incoming downloading correction verification module of RapidIO interface by the exterior arrangement program of interface module download online
And carry out data processing.During entire download online exterior arrangement program, the transmission rate of RapidIO interface quickly,
Can be in the transmission of very short time completion data flow, the subsequent verifying work of FPGA and write-in operating rate are more relatively slow,
Therefore it needs to develop cache module and carries out data buffer storage.Even so, configurator upgrading is carried out by external download function
Speed be also it is cracking, in the verifying of actual product, using outside downloading by the way of carry out program upgrading, tear lid open than returning factory
Host computer, which is directly connected to, using the most common jtag interface carries out the speed of program upgrading faster.
In view of the reliability of system, it is assumed that it goes wrong in the transmission process of some FLASH module progress configurator,
FPGA can not work normally due to configuration FLASH abnormal state, also can not continue to complete or re-execute by itself program
Outside downloading, but the first FLASH module and the 2nd FLASH module can be mutually backups at this time, only MCU need to be allowed to provide a switching
The configurator in FPGA load backup FLASH can be made and work normally by instructing and restarting FPGA just.
Receiving-transmitting chain module include day chain communication module, Beidou communication module, ground communication module, spare communication module with
And data processing module；
Its chain communication module is used for when communication is in day chain communication pattern, and FPGA passes through day chain communication module and external number
Data interaction is carried out according to chain, circuit design should adapt to a day chain communication pattern, and have answering for other compatible communication patterns
It is designed with property；
Beidou communication module is used for when communication is in Beidou communication mode, and FPGA passes through Beidou communication module and external number
Data interaction is carried out according to chain, circuit design should adapt to Beidou communication mode, and have answering for other compatible communication patterns
It is designed with property；
Spare communication module is used for when communication is in other communication patterns in addition to day chain and Beidou, and FPGA passes through standby
With communication module and external data chain carry out data interaction, the other communications of the consideration that circuit design should be forward-looking
Mode can be used as extension function, improve the scalability of product, and have the reusability of other compatible communication patterns；
Ground communication module should adapt to ground communication mould for the communication between FPGA and earth station, circuit design
Formula, and have the reusability design of other compatible communication patterns；
Engineering background of the invention determines that product material object of the invention is support three of the above operating mode, but
Commercial communication field, not only relayed communications, therefore the design of any data-link product is carried out according to the present invention, all it can be designed
Meet the data-link terminal of requirement.
Data processing module is used for when FPGA is communicated with external data chain or earth station, to the received number of FPAG
According to being successively filtered, amplifying and analog/digital conversion, D/A switch, amplification and filtering are successively carried out to the FPGA data sent.
Its key data processing function including analog/digital conversion and D/A switch should have preferable reusability, can not answer
Part is based on the passive device in communication link and the device that can shut down.
Corresponding day chain communication pattern and Beidou communication mode are prestored respectively in first FLASH module or the 2nd FLASH module
Configurator, the configurator of other corresponding communication patterns realized by FPGA download online mode.
When replacing operating mode, MCU transmission control instruction control gate, which switches and controls FPGA, restarts, so that FPGA is cut
The configurator read from the first FLASH module or the 2nd FLASH module is changed, to realize switching working mode.
Interface module, interface module receive external control instruction by CAN bus, and then complete operating mode selection, connect
Mouth mold block is monitored state reporting by iic bus.
It further include power module and clock module, for giving other module for power supply, clock module mentions power module for FPGA
For operating clock signals.
Based on above-mentioned multimode data catenary system, the invention also provides a kind of data transmission methods, comprise the following steps that
(1) interface module receives external control instruction by CAN bus；
(2) MCU main control module receives externally input control instruction, control gate work by interface module；
(3) chip selection signal that FPGA is generated is sent to the first FLASH module by gate or is sent by gate
To the 2nd FLASH module；
(4) FPGA, which is read, is stored in the pre- of the first FLASH module or the correspondence different communication modes in the 2nd FLASH module
Set configurator；
(5) FPGA is according to the preset configuration program of the correspondence different communication modes of reading to FPGA itself and receiving-transmitting chain
Module is configured；
(6) FPGA handle or by transmitting-receiving chain by the information that receiving-transmitting chain module receives outer input data chain
Road module will send information to external data chain；
(7) judge whether to need switch communication mode, if necessary to switch communication mode, then MCU main control module is sent out again
Control instruction enables gate work, and switches the FLASH being connected to FPGA；Communication pattern if necessary to switching is not first
In FLASH module and the 2nd FLASH module in preset configuration program limit, then (8) are entered step；
(8) FPGA passes through interface module download online exterior arrangement program and carries out data processing, will treated configuration
The first FLASH module or the 2nd FLASH module is written in program, updates preset in the first FLASH module or the 2nd FLASH module match
Set program.It can thus be carried out data transmission using other communication patterns.
In conclusion in a miniaturization, high-performance, high integration, high reliability, the data of multi-mode communication requirement
Chain terminal uses under background, using the present invention, effectively evades high-performance and multi-mode communication bring configurator space hold amount
It is larger, FPGA resource occupancy is higher and power consumption is higher etc. influences, framework is succinct, and use process is simple and reliable, and allocative efficiency is high,
And can be effectively reduced power consumption, and have external download function, faster program upgrading can be carried out.
The present invention applies in Weapons Data chain field, and product has storage time long, and the working time is short and communication pattern
The features such as infrequently replacing.
Storage time is long to require have external download capabilities, and the present invention uses RapidIO interface transmission configuration program, from opening
Beginning, progress is external to download to FPGA restarting, and it is part that the time used, which is 3/4ths of traditional jtag interface more new procedures,
The half of time used in the on line refreshable applied on star.
The XILINX company KINTEX7 that the present invention usesTMXC7K410T, the corresponding FLASH that configures is N25Q128 series
Serial FLASH, capacity 128Mbit.In the application of early period, by two kinds of communication patterns of day chain and Beidou without loan at call same
In a FPGA configurator, in addition the function of data processing, FPGA resource occupancy works in 90 or more, FPGA quota, power consumption
In 5W.The present invention splits configurator, and when single communication mode works, FPGA resource occupancy is 60% or so, function
Consume 3W.
Application background requires the product working time shorter, has stable working condition before the use, therefore use
The simple and reliable mode reconfigured carries out communication pattern switching, and hardware circuit is simple and reliable, can be by " three core " of on line refreshable
Framework is optimized for " double-core " framework in the present invention, and application is relatively reliable.
It is not specified in the present invention and partly belongs to techniques known.
Claims (10)
1. a kind of multimode data catenary system for having external download function, characterized by comprising: FPGA, MCU main control module,
One FLASH module, the 2nd FLASH module, gate, receiving-transmitting chain module and interface module；
MCU main control module receives externally input control instruction, control gate work, so that FPGA is generated by interface module
Chip selection signal the first FLASH module is sent to by gate, or the 2nd FLASH module is sent to by gate；
FPGA is according to the preset configuration programs of the correspondence different communication modes read from the first FLASH module or the 2nd FLASH module
Relevant configuration is carried out to FPGA itself and receiving-transmitting chain module, then outer input data chain is received by receiving-transmitting chain module
Information handle or will send information to external data chain by receiving-transmitting chain module；
FPGA passes through interface module download online exterior arrangement program and carries out data processing, and by treated, configurator is written
First FLASH module or the 2nd FLASH module update preset configuration program in the first FLASH module or the 2nd FLASH module.
2. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: described
Update preset configuration program in the first FLASH module or the 2nd FLASH module refer to preset configuration program carry out upgrading or
Replace with the configurator of new other communication patterns of correspondence.
3. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: FPGA
In include downloading correction verification module, cache module, secondary correction verification module, writing module and read through model；
FPGA is verified by the exterior arrangement program of interface module download online by downloading correction verification module, after verifying successfully
It is stored in cache module, then the exterior arrangement program of downloading is written by the first FLASH module or the 2nd FLASH mould by writing module
Block reads the content of write-in by read through model after write-in and is verified by secondary correction verification module, to guarantee matching for write-in
It is correct to set program.
4. a kind of multimode data catenary system for having external download function according to claim 3, it is characterised in that: FPGA
It by the incoming downloading correction verification module of RapidIO interface and is carried out at data by the exterior arrangement program of interface module download online
Reason.
5. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: transmitting-receiving
Link module includes day chain communication module, Beidou communication module, ground communication module, spare communication module and data processing mould
Block；
Its chain communication module is used for when communication is in day chain communication pattern, and FPGA passes through day chain communication module and external data chain
Carry out data interaction；
Beidou communication module is used for when communication is in Beidou communication mode, and FPGA passes through Beidou communication module and external data chain
Carry out data interaction；
Spare communication module is used for when communication is in other communication patterns in addition to day chain and Beidou, and FPGA passes through spare logical
Believe that module and external data chain carry out data interaction；
Ground communication module is for the communication between FPGA and earth station；
Data processing module be used for when FPGA is communicated with external data chain or earth station, to the received data of FPAG according to
It is secondary to be filtered, amplify and analog/digital conversion, D/A switch, amplification and filtering are successively carried out to the FPGA data sent.
6. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: first
The configurator of corresponding day chain communication pattern and Beidou communication mode is prestored in FLASH module or the 2nd FLASH module respectively, it is right
The configurator of other communication patterns is answered to realize by FPGA download online mode.
7. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: replacement
When operating mode, MCU sends control instruction control gate switching, so that FPGA switching reads from the first FLASH module or the
Configurator in two FLASH modules, to realize switching working mode.
8. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: interface
Module, interface module receive external control instruction by CAN bus, and then complete operating mode selection, and interface module passes through IIC
Bus is monitored state reporting.
9. a kind of multimode data catenary system for having external download function according to claim 1, it is characterised in that: also wrap
Power module and clock module are included, for power module for giving other module for power supply, clock module provides work clock letter for FPGA
Number.
10. a kind of realized based on the multimode data catenary system for having external download function as described in any one of claim 1~9
Data transmission method, it is characterised in that comprise the following steps that
(1) interface module receives external control instruction by CAN bus；
(2) MCU main control module receives externally input control instruction, control gate work by interface module；
(3) chip selection signal that FPGA is generated is sent to the first FLASH module by gate or is sent to the by gate
Two FLASH modules；
(4) FPGA reads the preset of correspondence different communication modes being stored in the first FLASH module or the 2nd FLASH module and matches
Set program；
(5) FPGA is according to the preset configuration program of the correspondence different communication modes of reading to FPGA itself and receiving-transmitting chain module
It is configured；
(6) FPGA handle or by receiving-transmitting chain mould by the information that receiving-transmitting chain module receives outer input data chain
Block will send information to external data chain；
(7) judge whether to need switch communication mode, if necessary to switch communication mode, then MCU main control module sends out control again
Instruction, enables gate work, and switches the FLASH being connected to FPGA；Communication pattern if necessary to switching is not in the first FLASH mould
In block and the 2nd FLASH module in preset configuration program limit, then (8) are entered step；
(8) FPGA passes through interface module download online exterior arrangement program and carries out data processing, will treated configurator
The first FLASH module or the 2nd FLASH module is written, updates preset configuration journey in the first FLASH module or the 2nd FLASH module
Sequence.
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