CN109473526B - Light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents

Light emitting diode epitaxial wafer and manufacturing method thereof Download PDF

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Publication number
CN109473526B
CN109473526B CN201811110046.3A CN201811110046A CN109473526B CN 109473526 B CN109473526 B CN 109473526B CN 201811110046 A CN201811110046 A CN 201811110046A CN 109473526 B CN109473526 B CN 109473526B
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type semiconductor
semiconductor layer
epitaxial wafer
light
layer
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CN109473526A (en
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郭炳磊
王群
葛永晖
吕蒙普
胡加辉
李鹏
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HC Semitek Suzhou Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region

Abstract

The invention discloses a light-emitting diode epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The light-emitting diode epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially stacked on the substrate; the shell is made of gallium nitride, and the filler is organic luminescent liquid. According to the invention, the active layer is formed by adopting the organic light-emitting liquid wrapped by the gallium nitride, and the organic light-emitting liquid is liquid and cannot be influenced by the warping of the epitaxial wafer, so that the edge and the center of the epitaxial wafer are easy to control and uniform in light-emitting wavelength, the uniformity and consistency of the wavelength of the whole epitaxial wafer can be effectively improved, and the method is particularly suitable for manufacturing Micro-LEDs.

Description

Light emitting diode epitaxial wafer and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer and a manufacturing method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor electronic component capable of Emitting Light. Gallium nitride (GaN) has good thermal conductivity, and also has excellent characteristics of high temperature resistance, acid and alkali resistance, high hardness and the like, so that gallium nitride (GaN) based LEDs are receiving more and more attention and research.
The epitaxial wafer is a primary finished product in the LED preparation process. The conventional gallium nitride-based LED epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially laminated on the substrate. The P-type semiconductor layer is used for providing holes for carrying out compound luminescence, the N-type semiconductor layer is used for providing electrons for carrying out compound luminescence, the active layer is used for carrying out radiation compound luminescence of the electrons and the holes, and the substrate is used for providing a growth surface for the epitaxial material.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
the substrate is usually made of sapphire, silicon carbide or silicon, and the N-type semiconductor layer, the active layer and the P-type semiconductor layer are made of gallium nitride-based materials (including gallium nitride, aluminum gallium nitride, indium gallium nitride, etc.). The substrate material and the gallium nitride-based material are heterogeneous materials, the difference of lattice constants is large, and large lattice mismatch exists between the substrate material and the gallium nitride-based material. With the increase of the size of the epitaxial wafer, the high-temperature epitaxial wafer has large warpage in the process, so that the growth temperature of the edge and the center of the epitaxial wafer is different, the doping of the edge and the center of the epitaxial wafer is different, and finally, the wavelength difference between the edge and the center of the epitaxial wafer is extremely large, the concentration of the wavelength of the whole epitaxial wafer is affected, and the method is particularly not suitable for manufacturing a Micro light-emitting diode (English: Micro-LED).
Disclosure of Invention
The embodiment of the invention provides a light emitting diode epitaxial wafer and a manufacturing method thereof, which can solve the problem that the wavelength concentration of the whole epitaxial wafer is influenced because the wavelength difference between the edge and the center of the epitaxial wafer in the prior art is very large. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides an led epitaxial wafer, where the led epitaxial wafer includes a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer, the N-type semiconductor layer, the active layer, and the P-type semiconductor layer are sequentially stacked on the substrate, the active layer includes a housing and a filler, a plurality of spherical cavities are arranged in the housing, and the plurality of spherical cavities are filled with the filler; the shell is made of gallium nitride, and the filler is organic luminescent liquid.
Optionally, the organic luminescent liquid is made of one of 8-hydroxyquinoline aluminum, 7-methyl-6, 8-diphenyl dinaphthothiaole, polyfluorene blue light emitting material, rubrene and rare earth complex.
Optionally, the spherical cavity has a diameter of 20nm to 200 nm.
Optionally, the number of layers of the spherical cavity is 1 to 10.
Optionally, the thickness of the outer wall of the spherical cavity is 10nm to 50 nm.
In another aspect, an embodiment of the present invention provides a method for manufacturing an epitaxial wafer of a light emitting diode, where the method includes:
providing a substrate;
forming an N-type semiconductor layer on the substrate;
forming an active layer on the N-type semiconductor layer; the active layer comprises a shell and filler, a plurality of spherical cavities which are arranged in order are arranged in the shell, and the filler fills the spherical cavities; the shell is made of gallium nitride, and the filler is organic luminescent liquid;
and forming a P-type semiconductor layer on the active layer.
Optionally, the forming an active layer on the N-type semiconductor layer includes:
forming a plurality of organic spheres in an orderly arrangement on the N-type semiconductor layer;
depositing gallium nitride outside the plurality of organic spheres to form a shell;
annealing the shell, and removing the organic spheres in the shell to form a spherical cavity;
and injecting organic light-emitting liquid into the spherical cavity to form a filler.
Optionally, the pressure at which the housing is formed is 10torr to 100 torr.
Optionally, the temperature of the annealing treatment is 900 ℃ to 1100 ℃.
Optionally, the duration of the annealing treatment is 5min to 15 min.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the active layer is formed by the organic light-emitting liquid wrapped by the gallium nitride, and the organic light-emitting liquid is liquid and cannot be influenced by warping of the epitaxial wafer, so that the edge and center light-emitting wavelengths of the epitaxial wafer are easy to control and uniform, the uniformity and consistency of the wavelength of the whole epitaxial wafer can be effectively improved, and the method is particularly suitable for manufacturing Micro-LEDs.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention;
FIG. 2 is a schematic view of the direction A-A of FIG. 1 provided by an embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention;
fig. 4 to 7 are schematic structural diagrams of an led epitaxial wafer during an active layer forming process according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The embodiment of the invention provides a light-emitting diode epitaxial wafer. Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention. Referring to fig. 1, the light emitting diode epitaxial wafer includes a substrate 10, an N-type semiconductor layer 20, an active layer 30, and a P-type semiconductor layer 40, and the N-type semiconductor layer 20, the active layer 30, and the P-type semiconductor layer 40 are sequentially stacked on the substrate 10.
Fig. 2 is a schematic view of the direction a-a in fig. 1 according to an embodiment of the present invention. Referring to fig. 2, the active layer 30 includes a shell 31 and a filler 32, wherein a plurality of spherical cavities are arranged in the shell 31, and the filler 32 fills the plurality of spherical cavities. The material of the outer shell 31 adopts gallium nitride, and the filler 32 is organic luminescent liquid.
According to the embodiment of the invention, the active layer is formed by adopting the organic light-emitting liquid wrapped by the gallium nitride, and the organic light-emitting liquid is liquid and cannot be influenced by the warping of the epitaxial wafer, so that the edge and the center of the epitaxial wafer are easy to control and uniform in light-emitting wavelength, the uniformity and consistency of the wavelength of the whole epitaxial wafer can be effectively improved, and the method is particularly suitable for manufacturing Micro-LEDs.
Alternatively, the material of the organic light-emitting liquid may be one of 8-hydroxyquinoline aluminum, 7-methyl-6, 8-diphenyl dinaphthothiazole, polyfluorene blue-light emitting materials, rubrene, and rare earth complexes.
According to different requirements of light color, different materials are selected. Specifically, when the green light is required to be emitted, 8-hydroxyquinoline aluminum can be used as the material of the organic light-emitting liquid; when blue light needs to be emitted, the organic luminescent liquid can be made of 7, 7-methyl-6, 8-diphenyl dinaphthothiaole or polyfluorene blue light materials; when red light is required to be emitted, rubrene or a rare earth complex can be used as a material of the organic light-emitting liquid.
Alternatively, as shown in FIG. 2, the diameter D of the spherical cavity may be 20nm to 200nm, preferably 110 nm.
If the diameter of the spherical cavity is less than 20nm, electrons and holes cannot effectively perform composite light emission in the spherical cavity due to the small space of the spherical cavity, so that the light emitting efficiency of the LED is affected; if the diameter of the spherical cavity is larger than 200nm, recombination of electrons and holes in the spherical cavity can be delayed due to the large space of the spherical cavity, and the light emitting efficiency of the LED can also be affected.
Alternatively, as shown in fig. 2, the number of layers of the spherical cavity may be 1 to 10, preferably 5.
If the number of layers of the spherical cavities is greater than 10, recombination of electrons and holes in the spherical cavities may be delayed due to the large number of spherical cavities, and the light emitting efficiency of the LED may also be affected.
Alternatively, as shown in FIG. 2, the thickness d of the outer wall of the spherical cavity may be 10nm to 50nm, preferably 30 nm.
If the thickness of the outer wall of the spherical cavity is less than 10nm, the organic light-emitting liquid in the spherical cavity cannot be effectively carried due to the fact that the outer wall of the spherical cavity is thin; if the thickness of the outer wall of the spherical cavity is greater than 50nm, electrons and holes may be injected into the organic light-emitting liquid to perform composite light-emitting due to the fact that the outer wall of the spherical cavity is thick, and the light-emitting efficiency of the LED is reduced.
Specifically, the material of the substrate 10 may employ sapphire (the main material is alumina), such as sapphire having a crystal orientation of [0001 ]. The material of the N-type semiconductor layer 20 may be N-type doped (e.g., silicon) gan. The P-type semiconductor layer 40 may be P-type doped (e.g., mg) gan.
Further, the thickness of the N-type semiconductor layer 20 may be 0.05 to 3 μm, preferably 1.5 μm; the doping concentration of the N-type dopant in the N-type semiconductor layer 20 may be 1018cm-3~1019cm-3Preferably 5 x 1018cm-3. The thickness of the P-type semiconductor layer 40 may be 0.05 to 3 μm, preferably 1.5 μm; the doping concentration of the P-type dopant in the P-type semiconductor layer 40 may be 1018/cm3~1020/cm3Preferably 1019/cm3. The invention improves the thickness of the N-type semiconductor layer and the P-type semiconductor layer, so that the organic light-emitting liquid with electrons and holes in the spherical cavity can effectively carry out composite light emission.
In practical applications, the substrate 10 may be provided with a patterned silicon dioxide layer, so as to reduce the dislocation density of the GaN epitaxial material, and change the light exit angle to improve the light extraction efficiency. Specifically, a layer of silicon dioxide material can be laid on a sapphire substrate; forming a photoresist with a certain pattern on the silicon dioxide material by adopting a photoetching technology; then removing the silicon dioxide material which is not covered by the photoresist by adopting a dry etching technology, and forming a patterned silicon dioxide layer by using the left silicon dioxide material; and finally removing the photoresist.
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include a buffer layer 51, where the buffer layer 51 is disposed between the substrate 10 and the N-type semiconductor layer 20 to relieve stress and defects generated by lattice mismatch between the substrate material and the gallium nitride and provide nucleation centers for epitaxial growth of the gallium nitride material.
Specifically, gallium nitride may be used as the material of the buffer layer 51.
Further, the thickness of the buffer layer 51 may be 15nm to 35nm, preferably 25 nm.
Preferably, as shown in fig. 1, the light emitting diode epitaxial wafer may further include an undoped gallium nitride layer 52, where the undoped gallium nitride layer 52 is disposed between the buffer layer 51 and the N-type semiconductor layer 20 to further alleviate stress and defects generated by lattice mismatch between the substrate material and the gallium nitride, and provide a growth surface with good crystal quality for the epitaxial wafer main body structure.
In a specific implementation, the buffer layer is a thin layer of gallium nitride that is first grown at low temperature on the patterned substrate, and is therefore also referred to as a low temperature buffer layer. Then, the longitudinal growth of gallium nitride is carried out on the low-temperature buffer layer, and a plurality of mutually independent three-dimensional island-shaped structures called three-dimensional nucleation layers can be formed; then, transverse growth of gallium nitride is carried out on all the three-dimensional island structures and among the three-dimensional island structures to form a two-dimensional plane structure which is called a two-dimensional recovery layer; and finally, growing a thicker gallium nitride layer called an intrinsic gallium nitride layer on the two-dimensional growth layer at a high temperature. The three-dimensional nucleation layer, two-dimensional recovery layer, and intrinsic gallium nitride layer are collectively referred to as undoped gallium nitride layer in this embodiment.
Further, the thickness of the undoped gallium nitride layer may be 1 μm to 5 μm, preferably 3 μm.
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include a stress release layer 60, where the stress release layer 60 is disposed between the N-type semiconductor layer 20 and the active layer 30 to release stress generated by lattice mismatch between sapphire and gallium nitride, so as to improve overall crystal quality of the epitaxial wafer, facilitate radiation recombination luminescence of electrons and holes, improve internal quantum efficiency of the LED, and further improve luminous efficiency of the LED.
Specifically, the material of the stress release layer 60 may be gallium indium aluminum nitride (AlInGaN), which can effectively release the stress generated by lattice mismatch between sapphire and gallium nitride, improve the crystal quality of the epitaxial wafer, and improve the light emitting efficiency of the LED.
Preferably, the molar content of the aluminum component in the stress relieving layer 60 may be less than or equal to 0.2, and the molar content of the indium component in the stress relieving layer 60 may be less than or equal to 0.05, so as to avoid causing adverse effects.
Further, the thickness of the stress relaxation layer 60 may be 50nm to 500nm, preferably 300 nm.
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include an electron blocking layer 70, and the electron blocking layer 70 is disposed between the active layer 30 and the P-type semiconductor layer 40 to prevent electrons from jumping into the P-type semiconductor layer to combine with holes in a non-radiative manner, thereby reducing the light emitting efficiency of the LED.
Specifically, the electron blocking layer 70 may be made of P-type doped aluminum gallium nitride (AlGaN), such as AlyGa1-yN,0.1<y<0.5。
Further, the thickness of the electron blocking layer 70 may be 50nm to 150nm, preferably 100 nm; the doping concentration of the P-type dopant in the electron blocking layer 70 may be 1018/cm3~1020/cm3Preferably 1019/cm3
Optionally, as shown in fig. 1, the light emitting diode epitaxial wafer may further include a contact layer 80, and the contact layer 80 is disposed on the P-type semiconductor layer 40 to form a good ohmic contact with an electrode or a transparent conductive film in a chip process.
Specifically, the contact layer 80 may be made of P-type doped indium gallium nitride (InGaN).
Further, the thickness of the contact layer 80 may be 10nm to 50nm, preferably 30 nm; the doping concentration of the P-type dopant in the contact layer 80 may be 1020/cm3~1021/cm3Preferably 5 x 1020/cm3
The embodiment of the invention provides a method for manufacturing an epitaxial wafer of a light-emitting diode, which is suitable for manufacturing the epitaxial wafer of the light-emitting diode shown in figure 1. Fig. 3 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present invention. Referring to fig. 3, the manufacturing method includes:
step 201: a substrate is provided.
Specifically, the step 201 may include:
controlling the temperature to be 1000-1200 ℃ (preferably 1100 ℃), and annealing the substrate for 1-10 minutes (preferably 5 minutes) in a hydrogen atmosphere;
the substrate is subjected to a nitridation process.
The surface of the substrate is cleaned through the steps, impurities are prevented from being doped into the epitaxial wafer, and the growth quality of the epitaxial wafer is improved.
Step 202: an N-type semiconductor layer is formed on a substrate.
Specifically, this step 202 may include:
in the first step, an N-type semiconductor layer is grown on a substrate under a temperature of 1000 to 1200 ℃ (preferably 1100 ℃) and a pressure of 100to 500torr (preferably 300 torr).
Optionally, before step 202, the manufacturing method may further include:
a buffer layer is grown on a substrate.
Accordingly, an N-type semiconductor layer is grown on the buffer layer.
Specifically, growing a buffer layer on a substrate may include:
controlling the temperature to be 400-600 ℃ (preferably 500 ℃), and the pressure to be 400-600 torr (preferably 500torr), and growing a buffer layer on the substrate;
the buffer layer is subjected to in-situ annealing treatment for 5 to 10 minutes (preferably 8 minutes) at a controlled temperature of 1000 to 1200 c (preferably 1100 c) and a pressure of 400to 600torr (preferably 500 torr).
Preferably, after growing the buffer layer on the substrate, the manufacturing method may further include:
and growing an undoped gallium nitride layer on the buffer layer.
Accordingly, an N-type semiconductor layer is grown on the undoped gallium nitride layer.
Specifically, growing an undoped gallium nitride layer on the buffer layer may include:
an undoped gallium nitride layer is grown on the buffer layer at a temperature of 1000 ℃ to 1100 ℃ (preferably 1050 ℃) and a pressure of 100torr to 500torr (preferably 300 torr).
Step 203: an active layer is formed on the N-type semiconductor layer.
In this embodiment, the active layer includes a housing and a filler, the housing has a plurality of spherical cavities arranged in order, and the filler fills the plurality of spherical cavities; the shell is made of gallium nitride, and the filler is organic luminescent liquid.
Optionally, this step 203 may comprise:
the method comprises the following steps of firstly, forming a plurality of organic spheres which are arranged in order on an N-type semiconductor layer;
secondly, depositing gallium nitride outside the organic spheres to form a shell;
thirdly, annealing the shell, and removing the organic spheres in the shell to form a spherical cavity;
and fourthly, injecting organic light-emitting liquid into the spherical cavity to form the filler.
Fig. 4 is a schematic structural diagram of the light emitting diode epitaxial wafer after the first step is performed, fig. 5 is a schematic structural diagram of the light emitting diode epitaxial wafer after the second step is performed, fig. 6 is a schematic structural diagram of the light emitting diode epitaxial wafer after the third step is performed, and fig. 7 is a schematic structural diagram of the light emitting diode epitaxial wafer after the fourth step is performed. Wherein 300 denotes an organic sphere, 31 denotes a housing, 310 denotes a spherical cavity, and 32 denotes a filler. Referring to fig. 4, a plurality of organic spheres 300 aligned in order are first formed on an N-type semiconductor layer; referring to fig. 5, a housing 31 is then formed between the plurality of organic spheres 300; referring to fig. 6, the outer shell 31 is annealed, the organic sphere 300 is decomposed at high temperature, and a spherical cavity 310 is formed in the outer shell 31; referring to fig. 7, an organic light emitting liquid is finally injected into the spherical cavity 310 to form the filler 32.
In practical application, polystyrene can be used as the material of the organic sphere, so that the cost is low.
Specifically, the organic spheres may be formed by spin coating (english); the shell can be realized by adopting a Plasma Enhanced Atomic Layer Deposition (PEALD) process.
Further, the rotation speed of the coating apparatus when forming the organic spheres may be 500 rpm to 1200 rpm, preferably 1000 rpm, to arrange the desired organic spheres on the N-type semiconductor layer.
Further, the pressure for forming the outer shell may be 10torr to 100torr, preferably 50torr, so as to deposit the gan outside the organic sphere.
Further, the temperature of the annealing treatment may be 900 to 1100 ℃, preferably 1000 ℃.
If the temperature of the annealing treatment is lower than 900 ℃, the decomposition of the organic spheres may be incomplete due to the lower temperature of the annealing treatment; if the temperature of the annealing process is higher than 1100 deg.c, damage may be caused to the structure of the epitaxial wafer due to the higher temperature of the annealing process.
Further, the duration of the annealing treatment may be 5min to 15min, preferably 10 min.
If the duration of the annealing treatment is less than 5min, the decomposition of the organic spheres may be incomplete due to the short duration of the annealing treatment; if the length of the annealing process is more than 15min, damage to the structure of the epitaxial wafer may be caused due to the long time of the annealing process.
Optionally, before step 203, the manufacturing method may further include:
and growing a stress release layer on the N-type semiconductor layer.
Accordingly, an active layer is grown on the stress relieving layer.
Specifically, growing the stress relief layer on the N-type semiconductor layer may include:
the temperature is controlled to be 800 ℃ to 1100 ℃ (preferably 950 ℃) and the pressure is controlled to be 100torr to 500torr (preferably 300torr), and the stress release layer is grown on the N-type semiconductor layer.
Step 204: a P-type semiconductor layer is formed on the active layer.
Specifically, this step 204 may include:
the P-type semiconductor layer is grown on the active layer at a controlled temperature of 850 to 1080 deg.C (preferably 960 deg.C) and a pressure of 100to 300torr (preferably 200 torr).
Optionally, before step 204, the manufacturing method may further include:
an electron blocking layer is grown on the active layer.
Accordingly, a P-type semiconductor layer is grown on the electron blocking layer.
Specifically, growing an electron blocking layer on the active layer may include:
the temperature is controlled to be 850 ℃ to 1080 ℃ (preferably 960 ℃), the pressure is controlled to be 200torr to 500torr (preferably 350torr), and the electron blocking layer is grown on the active layer.
Optionally, after step 204, the manufacturing method may further include:
and growing a contact layer on the P-type semiconductor layer.
Specifically, growing a contact layer on the P-type semiconductor layer may include:
the contact layer is grown on the P-type semiconductor layer at a temperature of 850 to 1050 deg.C (preferably 950 deg.C) and a pressure of 100to 300torr (preferably 200 torr).
After the completion of the epitaxial growth, the temperature is lowered to 650 to 850 ℃ (preferably 750 ℃), the epitaxial wafer is annealed in a nitrogen atmosphere for 5 to 15 minutes (preferably 10 minutes), and then the temperature of the epitaxial wafer is lowered to room temperature.
The control of the temperature and the pressure both refer to the control of the temperature and the pressure in a reaction chamber for growing the epitaxial wafer, and specifically refer to the reaction chamber of a Metal-organic Chemical Vapor Deposition (MOCVD) device. During implementation, trimethyl gallium or triethyl gallium is used as a gallium source, high-purity ammonia gas is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, silane is used as an N-type dopant, and magnesium diclocide is used as a P-type dopant.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (10)

1. The light-emitting diode epitaxial wafer comprises a substrate, an N-type semiconductor layer, an active layer and a P-type semiconductor layer, wherein the N-type semiconductor layer, the active layer and the P-type semiconductor layer are sequentially laminated on the substrate; the shell is made of gallium nitride, and the filler is organic luminescent liquid.
2. The light-emitting diode epitaxial wafer as claimed in claim 1, wherein the organic light-emitting liquid is made of one of 8-hydroxyquinoline aluminum, 7-methyl-6, 8-diphenyl dinaphthothiaole, polyfluorene blue light-emitting material, rubrene and rare earth complex.
3. The light-emitting diode epitaxial wafer according to claim 1 or 2, wherein the spherical cavity has a diameter of 20nm to 200 nm.
4. The light-emitting diode epitaxial wafer according to claim 1 or 2, wherein the number of layers of the spherical cavity is 1-10.
5. The light-emitting diode epitaxial wafer according to claim 1 or 2, wherein the thickness of the outer wall of the spherical cavity is 10nm to 50 nm.
6. A manufacturing method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
forming an N-type semiconductor layer on the substrate;
forming an active layer on the N-type semiconductor layer; the active layer comprises a shell and filler, a plurality of spherical cavities which are arranged in order are arranged in the shell, and the filler fills the spherical cavities; the shell is made of gallium nitride, and the filler is organic luminescent liquid;
and forming a P-type semiconductor layer on the active layer.
7. The method of claim 6, wherein the forming an active layer on the N-type semiconductor layer comprises:
forming a plurality of organic spheres in an orderly arrangement on the N-type semiconductor layer;
depositing gallium nitride outside the plurality of organic spheres to form a shell;
annealing the shell, and removing the organic spheres in the shell to form a spherical cavity;
and injecting organic light-emitting liquid into the spherical cavity to form a filler.
8. The method of claim 7, wherein the pressure at which the housing is formed is 10to 100 torr.
9. The method of claim 7 or 8, wherein the annealing temperature is 900 ℃ to 1100 ℃.
10. The method of claim 9, wherein the annealing is performed for a period of 5 to 15 minutes.
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