CN109449247B - 锡掺杂氧化钼薄膜、基于锡掺杂氧化钼薄膜的宽光谱光电探测器阵列及其制备方法 - Google Patents

锡掺杂氧化钼薄膜、基于锡掺杂氧化钼薄膜的宽光谱光电探测器阵列及其制备方法 Download PDF

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CN109449247B
CN109449247B CN201811057075.8A CN201811057075A CN109449247B CN 109449247 B CN109449247 B CN 109449247B CN 201811057075 A CN201811057075 A CN 201811057075A CN 109449247 B CN109449247 B CN 109449247B
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谢伟广
何锐辉
赖浩杰
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Abstract

本发明涉及锡掺杂氧化钼薄膜、基于锡掺杂氧化钼薄膜的宽光谱光电探测器阵列及其制备方法,其方法包括以下步骤:步骤a、将氧化钼粉末与氯化亚锡粉末按一定的质量比研磨均匀后置于真空腔的钨舟中,干净的衬底贴于腔体顶部的样品座上;步骤b、将腔体抽真空,直到压强小于5×10‑4Pa后开始蒸镀。缓慢增加电流到50A后打开挡板,先以慢速蒸镀到10nm后继续增加电流到60A左右,以较快的速率蒸发直到薄膜完成后关闭蒸发电源,自然冷却后取出样品。通过上述方式,本发明利用工艺成熟的热蒸发镀膜技术制备大面积均匀的锡掺杂氧化钼薄膜,制作方式简单,便于产业化。

Description

锡掺杂氧化钼薄膜、基于锡掺杂氧化钼薄膜的宽光谱光电探 测器阵列及其制备方法
技术领域
本发明涉及半导体光电材料领域,尤其涉及锡掺杂氧化钼薄膜、基于锡掺杂氧化钼薄膜的宽光谱光电探测器阵列及其制备方法。
背景技术
宽光谱探测器作为一种独特的光电器件,被广泛应用于多光谱检测、远程通讯、夜视仪或红外热成像等领域中。传统窄带隙材料比如硅、砷化镓铟、碲镉汞和硫化铅,其探测区域覆盖了从紫外到远红外的光谱范围。但是基于窄带隙材料的大多数光探测器阵列由于其制备成本高昂,制作工艺复杂,同时测试过程需要低温操作等缺陷,限制了其广泛的应用。所以寻找一种性能优异且能在室温和大气环境中稳定的材料以及能制备大面积均匀薄膜的方法是宽光谱探测领域一直追求的目标。
氧化钼作为一种在大气中稳定性良好的多功能半导体材料,其优异的光电性能吸引了许多科研人员的关注,并在光电器件领域得到广泛应用。其本征宽带隙的结构将其探测范围限制于紫外波段,一般通过引入中间态的方法来降低材料的带隙,从而拓宽其光谱响应范围,其中包括真空退火和离子掺杂。但是真空退火过程需要高温,由于应力作用容易在氧化钼薄膜表面诱发缺陷,产生大量裂纹,这些裂纹容易吸附水氧而严重影响器件的性能。而通过离子掺杂即能拓宽材料的光谱响应,同时也能保持薄膜表面的完整性。目前离子掺杂氧化钼薄膜的制备方法多样,例如过氧溶胶凝胶法、旋涂法及喷涂法等制备方法,但是这些方法大多得先制备掺杂的氧化钼溶液,程序复杂,且都难以制备大面积均匀的掺杂氧化钼薄膜。
发明内容
针对现有技术中的不足,本发明至少提供如下技术方案:
一种锡掺杂氧化钼薄膜的制备方法,其包括以下步骤:
将一定质量比的氧化钼粉末及氯化亚锡粉末研磨均匀,放置于镀膜腔室中的衬底下方;
将所述腔室抽真空,调节电流至50A后打开挡板,先以慢速蒸镀到一定厚度后继续增加电流至60A左右,然后以较快的速率蒸镀直到获得所需厚度的薄膜。
进一步的,所述氧化钼粉末及氯化亚锡粉末的质量比为20-0.5。
进一步的,所述慢速为
Figure BDA0001796061120000021
所述较快速率为
Figure BDA0001796061120000022
所述一定厚度为10nm。
进一步的,所述所需厚度为200-500nm。
进一步的,所述衬底为绝缘衬底或导电衬底,所述绝缘衬底包括石英玻璃、SiO2、Al2O3、蓝宝石或PET,所述导电衬底包括FTO玻璃或ITO玻璃。
基于锡掺杂氧化钼薄膜的宽光谱光电探测器阵列,其包括,
衬底;
位于所述衬底上的锡掺杂氧化钼薄膜;
位于所述锡掺杂氧化钼薄膜上的电极。
进一步的,所述衬底为导电衬底,以及位于所述导电衬底与所述锡掺杂氧化钼薄膜之间的绝缘膜,所述导电衬底包括FTO玻璃或ITO玻璃。
进一步的,所述衬底为绝缘衬底,所述绝缘衬底为石英玻璃、SiO2或Al2O3
进一步的,所述绝缘膜为Al2O3、SiO2、氮化硼或是二氧化锆。
锡掺杂氧化钼薄膜,所述锡掺杂氧化钼薄膜由氧化钼粉末和氯化亚锡粉末研磨后蒸镀而成,所述锡掺杂氧化钼薄膜中,锡/钼摩尔比为0.038-1.52。
与现有技术相比,本发明的有益效果至少如下:
本发明制备锡掺杂氧化钼薄膜的方法成本低廉,制备简单,并且获得的膜层面积大厚度均匀;其掺杂过程能够在室温下进行,不需要借助其它仪器设备,掺杂工艺简单,不需要引入其它溶剂,制备获得的薄膜纯度高;蒸镀后的掺杂薄膜不需要额外的退火工艺,避免了由应力作用而诱发的表面缺陷,并且该方法制备获得的薄膜湿度及热稳定性良好,利用该薄膜制备所得的光电探测器阵列具有从紫外到近红外的宽光谱响应,非常有利于产业推广。
附图说明
图1为不同质量比的氧化钼粉末与氯化亚锡粉末研磨后的照片。
图2为本发明制备方法获得的锡掺杂氧化钼薄膜实物图。
图3为本发明制备方法获得的锡掺杂氧化钼薄膜的原子力表面形貌图。
图4为本发明制备方法获得的锡掺杂氧化钼薄膜的锡(Sn)元素的光电子能谱(XPS)。
图5为本发明制备方法获得的锡掺杂氧化钼薄膜的吸收光谱。
图6为本发明制备方法获得的锡掺杂氧化钼薄膜光电器件阵列。
图7为本发明锡掺杂氧化钼薄膜光电器件的光响应图谱。
具体实施方式
下面结合实施例及附图对本发明作进一步详细的描述,以便于本领域技术人员对本发明的特征及优点进行理解,从而对本发明的保护范围做出更为清楚明确的界定。
本发明的锡掺杂氧化钼薄膜由氧化钼粉末和氯化亚锡粉末研磨后蒸镀而成,其锡掺杂氧化钼薄膜中,锡/钼摩尔比为0.038-1.52。
采用该锡掺杂氧化钼薄膜制备而成的宽光谱光电探测器阵列,其包括衬底,位于衬底上的锡掺杂氧化钼薄膜,位于所述锡掺杂氧化钼薄膜上的电极阵列;
其衬底可以为绝缘衬底或导电衬底,绝缘衬底可选用石英玻璃、SiO2或Al2O3、蓝宝石或PET等绝缘材料,导电衬底可以为FTO玻璃或ITO玻璃等导电材料。
其衬底为导电衬底时,在导电衬底与所述锡掺杂氧化钼薄膜之间还设置有一绝缘膜,该绝缘膜可以是Al2O3、SiO2、氮化硼或二氧化锆等绝缘材料。选用原子层沉积(ALD)或磁控溅射沉积该绝缘膜,但不限于上述沉积设备。
锡掺杂氧化钼粉末的制备:
首先,将研磨用的研钵清洗干净后置于60℃的干燥箱中加热;接着在刚加热过的研钵中依次称量质量比分别为(1:0、20:1、10:1、5:1、1:1及1:2)的氧化钼粉末和氯化亚锡粉末,分别充分研磨均匀,研磨的环境湿度小于40%。在相同质量的氧化钼粉末中,随着氯化亚锡粉末加入量的增加,混合粉末的颜色逐渐加深,从白色逐渐变成黑色。不同质量比获得的锡掺杂氧化钼粉末如图1所示。
锡掺杂氧化钼薄膜的制备方法,包含以下步骤:
步骤a、取FTO玻璃作为蒸镀衬底,将其FTO玻璃裁成尺寸为2.5cm×2.5cm若干片,其FTO玻璃片用丙酮、异丙醇以及去离子水各清洗30min,接着用氮气枪吹干后再用功率为80mW的氧等离子处理15min,以进一步清洁衬底。最后将干净的FTO玻璃存放于真空盒中;
步骤b、取质量比为5的氧化钼粉末与氯化亚锡粉末研磨后的混合粉末于真空腔的钨舟中,将干净的FTO玻璃贴于腔体顶部的样品座上并盖上腔门,样品座位于钨舟正上方;
步骤c、将腔体抽真空,直到压强小于5×10-4Pa后开始蒸镀。缓慢将电流加到50A后打开挡板,先以慢速
Figure BDA0001796061120000051
蒸镀到10nm后再增加电流至60A左右,然后以
Figure BDA0001796061120000052
的速率蒸镀直到获得厚度为400nm的薄膜后关闭蒸发源。
步骤d、待腔体的温度达到室温时取出样品,样品制备完成。
图2为质量比为5:1的氧化钼粉末与氯化锡粉末制备获得的锡掺杂氧化钼薄膜实物图,该锡掺杂氧化钼薄膜呈深蓝色,其大面积的薄膜分布均匀,粗糙度小,其均方根粗糙度为15-25nm,如图3所示,同时如图4所示的XPS图谱表明了Sn元素的存在。图5所示的锡掺杂氧化钼薄膜的吸收光谱表明其吸收相对于本征的氧化钼薄膜有明显的提高。由此可见,该比值所获得的锡掺杂氧化钼薄膜厚度均匀,质量良好。
宽光谱光电探测器阵列的制备:
选用石英玻璃作为衬底,
然后采用上述制备方法在其石英玻璃上蒸镀制备锡掺杂氧化钼薄膜;
通过图案掩膜蒸镀厚度为60nm厚的金电极阵列,该金电极阵列的沟道宽度<100μm,得到如图6所示的器件阵列。
采用仪器为2612A双通道的吉时利数字源表,测试结果如图7所示,表明该基于锡掺杂氧化钼薄膜的光电探测器阵列具有从紫外到近红外的宽光谱响应,非常有利于产业的推广。将该器件放置于湿度约为50%,温度为80℃的环境下进行湿度及热稳定性测试,测试结果表明该锡掺杂的氧化钼薄膜颜色无大的变化,其湿度及热稳定性良好。。
当选用导电衬底时,首先在衬底的表面沉积一层绝缘膜,然后在绝缘膜的表面采用上述方法蒸镀制备锡掺杂氧化钼薄膜。
由此可见本发明的掺杂过程在室温进行,不需要借助其它仪器设备,制备工艺简单成熟、可室温操作,有效降低了成本,同时不需引入其它溶剂,制备的样品纯度高;蒸镀后的掺杂薄膜不需要额外的退火工艺,避免了由应力作用而诱发的表面缺陷,并且该方法制备获得的薄膜湿度及稳定性良好,能够获得大面积厚度均匀的锡掺杂氧化钼薄膜。
上述实施例为本发明较佳的实施方式,但本发明的实施方式并不受上述实施例的限制,其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化,均应为等效的置换方式,都包含在本发明的保护范围之内。

Claims (10)

1.一种锡掺杂氧化钼薄膜的制备方法,其包括以下步骤:
将一定质量比的氧化钼粉末及氯化亚锡粉末研磨均匀,放置于镀膜腔室中的衬底下方;
将所述腔室抽真空,调节电流至50A后打开挡板,先以慢速蒸镀到一定厚度后继续增加电流至60A左右,然后以较快速率蒸镀直到获得所需厚度的薄膜。
2.根据权利要求1的所述制备方法,其特征在于,所述氧化钼粉末及氯化亚锡粉末的质量比为20-0.5。
3.根据权利要求1或2的所述方法,其特征在于,所述慢速为
Figure FDA0002400087640000011
所述较快速率为
Figure FDA0002400087640000012
所述一定厚度为10nm。
4.根据权利要求3的所述方法,其特征在于,所述所需厚度为200-500nm。
5.根据权利要求1或2的所述方法,其特征在于,所述衬底为绝缘衬底或导电衬底,所述绝缘衬底包括SiO2或Al2O3,所述导电衬底包括FTO玻璃或ITO玻璃。
6.锡掺杂氧化钼薄膜,其特征在于,所述锡掺杂氧化钼薄膜由氧化钼粉末和氯化亚锡粉末研磨后蒸镀而成,所述锡掺杂氧化钼薄膜中,锡/钼摩尔比为0.038-1.52。
7.基于锡掺杂氧化钼薄膜的宽光谱光电探测器阵列,其包括,
衬底;
位于所述衬底上的锡掺杂氧化钼薄膜;
位于所述锡掺杂氧化钼薄膜上的电极;
其中,所述锡掺杂氧化钼薄膜采用权利要求6的所述锡掺杂氧化钼薄膜。
8.根据权利要求7的所述光电探测器阵列,其特征在于,还包括,所述衬底为导电衬底,以及位于所述导电衬底与所述锡掺杂氧化钼薄膜之间的绝缘膜,所述导电衬底包括FTO玻璃或ITO玻璃。
9.根据权利要求7的所述光电探测器阵列,其特征在于,所述衬底为绝缘衬底,所述绝缘衬底为SiO2或Al2O3
10.根据权利要求8的所述光电探测器阵列,其特征在于,所述绝缘膜为Al2O3或TiO2
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