CN109449127A - The packaging technology and encapsulating structure of chip - Google Patents
The packaging technology and encapsulating structure of chip Download PDFInfo
- Publication number
- CN109449127A CN109449127A CN201811587684.4A CN201811587684A CN109449127A CN 109449127 A CN109449127 A CN 109449127A CN 201811587684 A CN201811587684 A CN 201811587684A CN 109449127 A CN109449127 A CN 109449127A
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- China
- Prior art keywords
- chip
- plate
- shell
- substrate
- packaging technology
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- 238000012536 packaging technology Methods 0.000 title claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 77
- 238000005538 encapsulation Methods 0.000 claims abstract description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 8
- 239000006071 cream Substances 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 7
- 239000004744 fabric Substances 0.000 claims description 2
- 238000004806 packaging method and process Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 6
- 239000000243 solution Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 239000000178 monomer Substances 0.000 description 3
- 238000000354 decomposition reaction Methods 0.000 description 2
- 238000001746 injection moulding Methods 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 210000003205 muscle Anatomy 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000007649 pad printing Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
Abstract
The present invention discloses the packaging technology and encapsulating structure of a kind of chip, wherein the following steps are included: provide one block of plate, which forms multiple spaced shells for the packaging technology of chip, and each shell is cavity structure and opening in the same direction；Multiple chips are arranged in interval on substrate；The plate is folded and is set on the substrate, so that each shell is provide with a chip, and the open end of the shell and the base plate seals are fixed；The plate and the substrate are cut along the open end of each shell, to obtain multiple chips individually and after encapsulation.Technical solution of the present invention can be improved the packaging efficiency of chip.
Description
Technical field
The present invention relates to chip package field, in particular to the packaging technology and encapsulating structure of a kind of chip.
Background technique
Currently, each chip is independent attachment shell in the encapsulation process of chip, it is raw so to cannot achieve batch
It produces, causes the packaging efficiency of chip lower.
Summary of the invention
The main object of the present invention is to propose a kind of packaging technology of chip, it is intended to improve the packaging efficiency of chip.
To achieve the above object, the packaging technology of chip proposed by the present invention, comprising the following steps:
One block of plate is provided, which forms multiple spaced shells, each shell be cavity structure simultaneously
It is open in the same direction；
Multiple chips are arranged in interval on substrate；
The plate is folded and is set on the substrate, so that each shell is provide with a chip, and will be described outer
The open end of shell is fixed with the base plate seals；
The plate and the substrate are cut along the open end of each shell, it is multiple individual to obtain
And the chip after encapsulating.
Optionally, the plate is metal plate, and the packaging technology of the chip is further comprising the steps of:
Multiple positions of the plate are stretched, so that each position being stretched forms the shell.
Optionally, multiple positions to the plate stretch, so that each position being stretched forms institute
State shell specifically includes the following steps:
The plate stamping is gone out into multiple through-holes, so that the plate forms multiple connection sheets and multiple connections
Muscle is separated between adjacent two connection sheet by the through-hole, and passes through the connection between adjacent two connection sheet
Muscle connection；
The connection sheet is stretched to form the shell.
Optionally, described that the plate stamping is gone out into multiple through-holes, so that the plate forms multiple connection sheets
While with multiple dowels, the plate is also made to be formed with outline border, multiple connection sheets and multiple dowels are equal
It is connect with the outline border by the dowel in the outline border, and close to the connection sheet of the outline border.
Optionally, the packaging technology of the chip is further comprising the steps of:
First positioning hole is opened up on the plate；
On the substrate and the position of the corresponding first positioning hole opens up second location hole；
Locating piece is plugged together with the first positioning hole and the second location hole close-fitting respectively so that the plate and
The substrate is fixed.
Optionally, the four corners of the plate are respectively provided with a first positioning hole；The four corners of the substrate are each
Equipped with a second location hole, four first positioning holes are corresponded with four second location holes.
Optionally, the packaging technology of the chip is further comprising the steps of:
It is respectively provided with a pad on the substrate and around each chip；
Tin cream is set on the pad；
The open end of the shell and the base plate seals are fixed specifically: by the shell by the tin cream with
The substrate is welded and fixed.
Optionally, multiple shell rectangular array shape arrangements, multiple chips are in rectangle battle array on the substrate
Column-shaped arrangement.
Optionally, the chip is mems chip.
The present invention also proposes that a kind of encapsulating structure of chip, including substrate, chip and shell, the chip are fixed on described
On substrate, the shell is fixed with the substrate, and is sealed and be provide with the chip, and the encapsulating structure of the chip is by as described above
Obtained by the packaging technology of chip.
In the present invention, since multiple shells are made into a whole plate, multiple chips are also made into one with one piece of big substrate
A whole plate, then shell is located at be packaged on chip when, it is only necessary to whole plate shell and entire substrate are positioned, i.e.,
It only needs to align once, does not need all to go to be positioned one by one with corresponding chip by each shell.By shell
After open edge and base plate seals are fixed, by being cut to whole plate shell and entire substrate, can disposably it get more
A monomer, the i.e. encapsulating structure of chip, can so greatly simplify operation, raw conducive to the high-volume for the encapsulating structure for realizing chip
It produces.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the flow diagram of one embodiment of packaging technology of chip of the present invention；
Fig. 2 is the refinement flow diagram of step S30 in Fig. 1；
Fig. 3 is the refinement flow diagram of step S10 in Fig. 1；
Fig. 4 is the flow diagram of another embodiment of packaging technology of chip of the present invention；
Fig. 5 is the decomposition diagram of one embodiment of encapsulating structure of chip of the present invention；
Fig. 6 is that the encapsulating structure of chip in Fig. 5 cuts the decomposition diagram for the monomer to be formed.
Drawing reference numeral explanation:
| Label | Title | Label | Title |
| 10 | Plate | 102 | First positioning hole |
| 11 | Shell | 21 | Substrate |
| 12 | Dowel | 211 | Second location hole |
| 13 | Outline border | 22 | Chip |
| 101 | Through-hole | 30 | Locating piece |
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiment is only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
His embodiment, shall fall within the protection scope of the present invention.
It is to be appreciated that if relating to directionality instruction (such as up, down, left, right, before and after ...) in the embodiment of the present invention,
Then directionality instruction be only used for explain under a certain particular pose (as shown in the picture) between each component relative positional relationship,
Motion conditions etc., if the particular pose changes, directionality instruction is also correspondingly changed correspondingly.
In addition, being somebody's turn to do " first ", " second " etc. if relating to the description of " first ", " second " etc. in the embodiment of the present invention
Description be used for description purposes only, be not understood to indicate or imply its relative importance or implicitly indicate indicated skill
The quantity of art feature." first " is defined as a result, the feature of " second " can explicitly or implicitly include at least one spy
Sign.In addition, the meaning of the "and/or" occurred in full text is, including three schemes arranged side by side, by " A and/or B for ", including A
The scheme that scheme or B scheme or A and B meet simultaneously.In addition, the technical solution between each embodiment can be combined with each other,
It but must be based on can be realized by those of ordinary skill in the art, when conflicting or nothing occurs in the combination of technical solution
Method realize when will be understood that the combination of this technical solution is not present, also not the present invention claims protection scope within.
The present invention proposes a kind of packaging technology of chip.
In embodiments of the present invention, as shown in Figure 1, the packaging technology of the chip the following steps are included:
Step S10 provides one block of plate, which forms multiple spaced shells, and each shell is sky
Cavity configuration is simultaneously open in the same direction.
Incorporated by reference to reference Fig. 5 and Fig. 6, in the step, formed shell 11 mode have it is a variety of, such as in one embodiment
Plate 10 can be metalwork, and shell 11 is formed by way of integrally stretching；In one embodiment, injection molding also can be used in plate 10
Mode form, specifically, plate 10 is plastic part, and form by way of integrated injection molding the structure of shell 11.To mention
Also metal layer can be arranged in 11 inner surface of shell either 11 outer surface of shell in the shield effectiveness of high shell 11.
Optionally, multiple 11 rectangular array shape of shell arrangements.By the way that multiple 11 rectangular array shapes of shell are arranged
Cloth, arrangement form rule, processing easy to produce.In addition, multiple shells 11 can also circular array arrangement or multiple shells
11 array arrangements triangular in shape, can specifically arrange as needed, for example, the arrangement mode of multiple shells 11 can be according to plate
10 shape is arranged, when plate 10 is rectangular, multiple 11 rectangular array of shell arrangements；When shell 11 is round,
Multiple 11 circular array of shell arrangements；When shell 11 is triangle, multiple shells 11 array arrangement triangular in shape.The present invention
The embodiment of arrangement form in to(for) shell 11 is not defined, as long as multiple shells 11 can be formed on same plate 10
?.
Step S20, multiple chips are arranged in interval on substrate.
In the step, the setting of chip 22 mode on the base plate (21 have it is a variety of, for example, in one embodiment, chip 22
Attachment is on the base plate (21；Or in one embodiment, card slot is set on the base plate (21, and pin and the card slot of chip 22 connect and fix
Deng.Substrate 21 in the present embodiment refers to that circuit board, for example, printed circuit board, chip 22 and circuit board are electrically connected.Core
The type of piece 22 is chosen as mems chip 22 (MEMS chip 22).
In the step, the arrangement mode of chip 22 on the base plate (21 is, energy mutual corresponding with the arrangement mode of shell 11
Enough guarantee that each shell 11 is located on a chip 22, avoids the deviation aligned between chip 22 and shell 11.It is optional
Ground, multiple chips 22 rectangular array shape on the substrate 21 are arranged, and the mode of the regular array can be improved chip
22 installation effectiveness on the base plate (21 realizes mass production.
The plate is folded and is set on the substrate by step S30, so that each shell is provide with a chip, and
The open end of the shell and the base plate seals are fixed.
It in step S30, is aligned between plate 10 and substrate 21, so that shell 11 can be right with chip 22
Together.In one embodiment, plate 10 is identical as the outer dimension of substrate 21, then folds and set constantly in the two, by plate 10 and substrate
Both 21 edge alignment.In addition, in one embodiment, also locating piece 30 can be arranged on plate 10 or substrate 21 and be determined
Position.Subsequent step is influenced to avoid plate 10 and substrate 21 from being mutually shifted, therefore in step S30, plate 10 is folded
It, can also be fixed by the plate 10 and the substrate 21 after being located on the substrate 21.It should be noted that the embodiment
In, the setting of shell 11 is avoided in the fixation position of plate 10 and substrate 21, is to make by the fixed purpose of plate 10 and substrate 21
It obtains in subsequent steps, prevents 10 opposing substrate 21 of plate mobile.
In step S30, by the way that shell 11 and substrate 21 are sealed fixation, chip 22 is enabled to be encapsulated in outer
In shell 11,22 watered and wetting of chip etc. is avoided.For realize the fixed means of the sealing of shell 11 and substrate 21 with a variety of, such as
In one embodiment, shell 11 and substrate 21 weld；In one embodiment, shell 11 is Nian Jie with substrate 21.Specifically, incorporated by reference to
With reference to Fig. 2, the packaging technology of the chip is further comprising the steps of:
Step S31 is respectively provided with a pad on the substrate and around each chip；
Tin cream is arranged on the pad in step S32；
The shell is welded and fixed step S33 by the tin cream and the substrate.
In above-mentioned steps, pad is in closed hoop so that in chip 22 is around in, and on pad printing or
Person's plating is equipped with tin cream, then after shell 11 is located on chip 22, so that tin cream fixes shell 11 and the sealing of substrate 21.
Step S40 cuts the plate and the substrate along the open end of each shell, more to obtain
Chip after a individual and encapsulation.
In the step, when cutting plate 10, along the open end of shell 11, i.e., cut along the outer rim of shell 11,
It is cut off between adjacent shells 11, and forms multiple independent shells 11；Substrate 21 is separated into multiple fritters after being cut
Substrate 21, and a chip 22 is designed on each piece of substrate 21, a shell 11 is all fixed on each substrate 21, this one
Block small substrate 21, the chip 22 that is arranged on the substrate 21, and the shell 11 being located on chip 22 collectively forms one
Individual encapsulating structure.After cutting plate 10 and substrate 21 simultaneously, multiple individual encapsulating structures can be obtained, thus
Realize the mass production of encapsulating structure.
In the present invention, since multiple shells 11 are made into a whole plate, by the multiple chips 22 also substrate 21 with one piece big
Be made into a whole plate, then shell 11 is located at be packaged on chip 22 when, it is only necessary to by whole plate shell 11 and entire base
Plate 21 is positioned, i.e., only needs to align once, do not need all to go each shell 11 to carry out with corresponding chip 22
It positions one by one.After the open edge of shell 11 and the sealing of substrate 21 is fixed, by whole plate shell 11 and entire substrate 21
It is cut, can disposably get multiple monomers, the i.e. encapsulating structure of chip 22, can so greatly simplify operation, mention
The packaging efficiency of high chip 22, conducive to the mass production for the encapsulating structure for realizing chip 22.
In one embodiment, the plate 10 is metal plate, and the packaging technology of the chip is further comprising the steps of:
Step S11 stretches multiple positions of the plate, so that each position being stretched is formed outside described
Shell.
In the present embodiment, shell 11 is formed using metal plate, 11 pairs of shell extraneous electromagnetic signals of the metal material
Shield effectiveness is more preferable, therefore can reduce the chip 22 after being packaged by the interference of external electromagnetic signal.And it is formed using stretching
The simple process of shell 11 can substantially reduce production cost for relative injection.
Incorporated by reference to reference to figure, 3, multiple positions to the plate 10 stretch, and are stretched so that each
Position form the shell 11 specifically includes the following steps:
The plate stamping is gone out multiple through-holes by step S111, so that the plate forms multiple connection sheets and multiple
Dowel is separated by the through-hole between adjacent two connection sheet, and by described between adjacent two connection sheet
Dowel connection；
Step S112 stretches the connection sheet to form the shell.
Specifically, metal plate is stamped out into multiple through-holes 101, the part of metal plate not being stamped then forms 11 He of shell
Dowel 12, multiple through-holes 101 are also the arrangement of rectangular array shape, so that multiple shells 11 also rectangular array shape
Arrangement, and set on each shell 11 there are four dowel 12, each dowel 12 is all connected with a shell 11.And in other rows
In column mode, since the arrangement mode of multiple shells 11 is different, therefore the quantity for the dowel 12 being arranged on each shell 11 is not yet
Together.
Due to plate 10 be it is straight, the connection sheet formed after stamping out through-hole 101 is also tabular, thus need will even
Contact pin is stretched, so that it, which is formed, has open cavity structure, that is, forms shell 11, and the stretching of each shell 11
Direction be it is identical, the open direction being thusly-formed is consistent.In addition, due between adjacent shell 11 being separated by through-hole 101
, it is only attached by dowel 12, other components pair so when carrying out drawing and forming to shell 11, around shell 11
Its involve power greatly reduces, therefore can facilitate the drawing and forming of shell 11.
In addition, on plate 10 formed through-hole 101 purpose be in order to it is subsequent shell 11 and substrate 21 are fixed when,
Facilitate the contraposition between observation shell 11 and chip 22 whether accurate, and is also conducive to carry out shell 11 and the fixed of substrate 21
Operation.In addition, when cutting plate 10, separated by through-hole 101 due to being between adjacent shells 11, thus only need to cut off with
The dowel 12 that shell 11 connects.
In addition, for convenience of the plate 10 after machine-shaping transport or take, keep the intensity of plate 10, avoid plate
Deformation of material 10 etc., it is in one embodiment, described that the plate 10 is stamped out into multiple through-holes 101, so that the plate
While the multiple connection sheets of 10 formation and multiple dowels 12, the plate 10 is also made to be formed with outline border 13, multiple companies
Contact pin and multiple dowels 12 are set in the outline border 13, and close to the connection sheet of the outline border 13 with it is described
Outline border 13 is connected by the dowel 12.In the embodiment, due to remaining outline border to plate 10 in punching press through-hole 101
13, so that the globality interconnected of multiple shells 11 is more preferable, the intensity of the plate 10 after processing is guaranteed, is substantially reduced
A possibility that plate 10 deforms.
For the one-to-one correspondence for realizing shell 11 and chip 22, the installation promoted between plate 10 and substrate 21 is accurate, one
In embodiment, referring to Figure 4, the packaging technology of the chip is further comprising the steps of:
Step S51 opens up first positioning hole on the plate；
Step S52, on the substrate and the position of the corresponding first positioning hole opens up second location hole；
Step S53 plugs together locating piece, so that institute with the first positioning hole and the second location hole close-fitting respectively
It states plate and the substrate is fixed.
In the present embodiment, substrate 21 and plate 10 are when being superposed, by by first positioning hole 102 and second location hole
211 alignment, can be realized the accurate contraposition between shell 11 and chip 22, and 11 opposite chip 22 of shell is avoided to generate deviation and lead
Chip 22 is caused to be emerging in outside shell 11.By the way that locating piece 30 is tight with first positioning hole 102 and the second location hole 211 respectively
With plugging together, the fixation of substrate 21 and plate 10 can be realized, 10 opposing substrate 21 of plate is avoided to move.Specifically, fixed
Position part 30 can be the structures such as positioning pin or screw.Optionally, first positioning hole 102 is located at outline border 13, so can be avoided first
Location hole 102 influences the sealing between shell 11 and substrate 21.
Specifically, the four corners of the plate 10 are respectively provided with a first positioning hole 102；Four of the substrate 21
Corner is respectively provided with a second location hole 211, four first positioning holes 102 and four second location holes 211 1
One is corresponding.By being respectively provided with a first positioning hole 102 in the four corners of plate 10, the four corners of the substrate 21 are each
Equipped with a second location hole 211, can the four corners of plate 10 be aligned and be carried out with the four corners of substrate 21
It is fixed, the stability of positioning accuracy and fixation can be improved.
The present invention also proposes a kind of encapsulating structure of chip, and the encapsulating structure of the chip includes substrate 21, chip 22 and outer
Shell 11, the chip 22 are fixed on the substrate 21, and the shell 11 and the substrate 21 are fixed, and seal and be provide with the core
Piece 22, the encapsulating structure of the chip is as obtained by the packaging technology of chip as described above.Since the encapsulating structure of this chip is adopted
Own with whole technical solutions of above-mentioned all embodiments, therefore at least brought by the technical solution with above-described embodiment
Beneficial effect, this is no longer going to repeat them.
The above description is only a preferred embodiment of the present invention, is not intended to limit the scope of the invention, all at this
Under the inventive concept of invention, using equivalent structure transformation made by description of the invention and accompanying drawing content, or directly/use indirectly
It is included in other related technical areas in scope of patent protection of the invention.
Claims (10)
1. a kind of packaging technology of chip, which comprises the following steps:
There is provided one block of plate, which forms multiple spaced shells, and each shell is cavity structure and towards same
One direction is open；
Multiple chips are arranged in interval on substrate；
It sets the plate is folded on the substrate, so that each shell is provide with a chip, and by the shell
Open end is fixed with the base plate seals；
Open end along each shell cuts the plate and the substrate, to obtain multiple individual and encapsulate
Chip afterwards.
2. the packaging technology of chip as described in claim 1, which is characterized in that the plate is metal plate, the chip
Packaging technology is further comprising the steps of:
Multiple positions of the plate are stretched, so that each position being stretched forms the shell.
3. the packaging technology of chip as claimed in claim 2, which is characterized in that multiple positions to the plate carry out
Stretch so that each position being stretched form the shell specifically includes the following steps:
The plate stamping is gone out into multiple through-holes, so that the plate forms multiple connection sheets and multiple dowels, adjacent two
It is separated between the connection sheet by the through-hole, and is connected between adjacent two connection sheet by the dowel；
The connection sheet is stretched to form the shell.
4. the packaging technology of chip as claimed in claim 3, which is characterized in that it is described the plate stamping is gone out it is multiple described
Through-hole, so that also make the plate be formed with outline border while the plate forms multiple connection sheets and multiple dowels,
Multiple connection sheets and multiple dowels are set in the outline border, and close to the outline border the connection sheet with
The outline border is connected by the dowel.
5. the packaging technology of the chip as described in Claims 1-4 any one, which is characterized in that the encapsulation work of the chip
Skill is further comprising the steps of:
First positioning hole is opened up on the plate；
On the substrate and the position of the corresponding first positioning hole opens up second location hole；
Locating piece is plugged together with the first positioning hole and the second location hole close-fitting respectively, so that the plate and described
Substrate is fixed.
6. the packaging technology of chip as claimed in claim 5, which is characterized in that the four corners of the plate are respectively provided with an institute
State first positioning hole；On the substrate and corresponding each first positioning hole is equipped with a second location hole.
7. the packaging technology of chip as described in claim 1, which is characterized in that the packaging technology of the chip further includes following
Step:
It is respectively provided with a pad on the substrate and around each chip；
Tin cream is set on the pad；
The open end of the shell and the base plate seals are fixed specifically: by the shell by the tin cream with it is described
Substrate is welded and fixed.
8. the packaging technology of chip as described in claim 1, which is characterized in that multiple shell rectangular array shape rows
Cloth, multiple chips on the substrate arrange by rectangular array shape.
9. the packaging technology of chip as described in claim 1, which is characterized in that the chip is mems chip.
10. a kind of encapsulating structure of chip, which is characterized in that including substrate, chip and shell, the chip is fixed on the base
On plate, the shell is fixed with the substrate, and is sealed and be provide with the chip, and the encapsulating structure of the chip is by such as claim 1-
Obtained by the packaging technology of chip described in 9 any one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811587684.4A CN109449127A (en) | 2018-12-24 | 2018-12-24 | The packaging technology and encapsulating structure of chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811587684.4A CN109449127A (en) | 2018-12-24 | 2018-12-24 | The packaging technology and encapsulating structure of chip |
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| CN109449127A true CN109449127A (en) | 2019-03-08 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112133641A (en) * | 2020-09-23 | 2020-12-25 | 青岛歌尔智能传感器有限公司 | Array sensor and manufacturing process thereof |
| CN114842606A (en) * | 2022-04-13 | 2022-08-02 | 宁波讯强电子科技有限公司 | Batch production method of acoustic-magnetic anti-theft hard tags and acoustic-magnetic anti-theft hard tags |
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| CN106409702A (en) * | 2016-11-22 | 2017-02-15 | 中国科学院微电子研究所 | Multi-chip stacked package structure and manufacture method thereof |
| CN108529551A (en) * | 2017-03-02 | 2018-09-14 | 罗伯特·博世有限公司 | Baroceptor and its packaging method |
| CN209016019U (en) * | 2018-12-24 | 2019-06-21 | 歌尔股份有限公司 | Package assembling |
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