CN109427551B - 一种基片刻蚀方法及相应的处理装置 - Google Patents
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Abstract
本发明提供了一种基片刻蚀方法,所述方法在一等离子体处理装置内进行,所述基片刻蚀方法刻蚀的基片包括光刻胶掩膜层,介质抗反射层,碳硬掩膜层及氧化硅层;以图形化的介质抗反射层为掩膜刻蚀位于介质抗反射层下方的碳硬掩膜层,形成图形化的碳硬掩膜层;所述等离子体处理装置包括一射频源功率源和一射频偏置功率源,所述射频偏置功率源在刻蚀所述介质抗反射层时输出一频率大于等于2MHZ的射频信号,监测刻蚀工艺进程,当所述介质抗反射层刻蚀完成后,切换所述射频偏置功率源的输出频率小于2MHZ,实现对碳硬掩膜层的刻蚀。其优点是:保证碳掩膜层的刻蚀孔壁垂直,并降低刻蚀孔的开口宽度。
Description
技术领域
本发明涉及半导体制造技术领域,具体涉及一种基片刻蚀方法及相应的处理装置。
背景技术
在半导体集成电路制造工艺中,通过一系列的工序,例如淀积、光刻、蚀刻、平坦化等工艺在半导体衬底上形成半导体结构。其中,光刻工艺用于形成掩膜图案,定义出待刻蚀区域。而刻蚀工艺用于将光刻定义的图案(pattern)转移至材料(金属、介质层或硅)上,以形成所需结构,现在的半导体工艺中,为了增强转移精确程度,一般采用先将光刻胶层通过曝光形成的图案转移至介质抗反射层(或防反射层DARC)上,然后利用图案化的介质抗反射层为掩膜,将图案再转移至材料(金属、介质层或硅)上。
上述介质抗反射层的转移过程常用刻蚀工艺,并且在刻蚀过程中需要等离子入射配合控制刻蚀方向和形状。在等离子刻蚀工艺中,以适当的气体为刻蚀气体,通过能量源,例如射频源激励刻蚀气体形成等离子体,然后用该等离子体进行刻蚀。
不同的等离子入射能量会影响待刻蚀材料与掩膜材料的选择比。入射能量越大则物理轰击现象越明显刻蚀选择比越小。如果刻蚀主要是化学反应,而反应气体对两种材料的反应速度差异巨大则选择比越大。除了采用控制射频激励源这种途径外,还可以通过改变射频偏置源的功率实现对等离子体入射能量控制。
作为新一代存储器的3D NAND器件由若干层经过刻蚀的材料即不定型碳层构成,不定型碳层中形成有若干用于放置导电材料的孔,这些孔分布很密,且孔开口占据的面积越大,成本就越高;现有技术中采用的是氧等离子刻蚀,并以介质抗反射层为掩膜刻蚀位于其下方的不定型碳层,该方法所刻蚀出来的孔内侧面实际为弓形(low-like),并且开口的口也较理想情况下更大甚至产生失真走样,如图1所示,其中展示了刻蚀完毕后碳硬掩膜层13’的剖视图以及俯视图,从图中可以看到部分被轰坏的开口及所有孔的内侧壁倾斜度大并非垂直,开口尺寸较大,刻蚀的深孔形貌不垂直,相邻的碳掩膜层几乎被刻穿,可见其效果不理想;因此需要提供一种可以保证不定型碳层中各孔垂直度的刻蚀方法,以保证不定型碳层在同样面积内可以形成更多的孔,从而降低成本。
发明内容
本发明的目的在于提供一种基片刻蚀方法及相应的处理装置,在较低的低频射频偏置电压作用下刻蚀时可以避免碳硬掩膜层孔侧面形成弓形,在较高的低频射频偏置电压作用下刻蚀时可以产生较好的化学轰击,使得在刻蚀过程中,即保证了刻蚀孔的垂直度又避免了孔开口处的失真走样问题。
为了达到上述目的,本发明通过以下技术方案实现:
一种基片刻蚀方法,所述方法在一等离子体处理装置内进行,其特征是,所述基片刻蚀方法刻蚀的基片包括光刻胶掩膜层,介质抗反射层,碳硬掩膜层及氧化硅层;
以图形化的介质抗反射层为掩膜刻蚀位于介质抗反射层下方的碳硬掩膜层,形成图形化的碳硬掩膜层;
所述等离子体处理装置包括一射频源功率源和一射频偏置功率源,所述射频偏置功率源在刻蚀所述介质抗反射层时输出一频率大于等于2MHZ的射频信号;
监测刻蚀工艺进程,当所述介质抗反射层刻蚀完成后,切换所述射频偏置功率源的输出频率小于2MHZ,实现对碳硬掩膜层的刻蚀。
上述的基片刻蚀方法,其中:
所述射频源功率源的输出频率为13MHz-60MHZ。
上述的基片刻蚀方法,其中:
所述射频偏置功率源在刻蚀所述介质抗反射层时输出频率为2MHZ,所述射频偏置功率源在刻蚀所述碳硬掩膜层时输出频率为400KHZ。
上述的基片刻蚀方法,其中:
所述光刻胶掩膜层和介质抗反射层之间设置底部防反射层。
上述的基片刻蚀方法,其中:
刻蚀气体为COS、O2、CO2、SO2中的任意一种。
上述的基片刻蚀方法,其中:
刻蚀过程中所述等离子体处理装置内还包含侧壁保护气体。
一种等离子体处理装置,其特征是,包含:
等离子体反应腔,内部设有基台,所述基台包含下电极,所述下电极与一射频偏置功率源连接;
等离子体发生器,包含线圈及与所述线圈连接的射频源功率源;
基片,设置在基台上,该基片至少包含光刻胶掩膜层,介质抗反射层,碳硬掩膜层及氧化硅层,介质抗反射层位于碳硬掩膜层上方;
所述射频偏置功率源可以输出至少两个不同频率的射频信号,在刻蚀介质抗反射层时输出一频率大于等于2MHZ的射频信号,在刻蚀所述碳硬掩膜层时输出频率小于2MHZ的射频信号。
上述的等离子体处理装置,其中:
所述射频源功率源的输出频率为13MHz-60MHZ。
上述的等离子体处理装置,其中:
所述射频源功率源的输出频率为13.56MHZ。
上述的等离子体处理装置,其中:
所述射频偏置功率源在刻蚀所述介质抗反射层时输出频率为2MHZ,所述射频偏置功率源在刻蚀所述碳硬掩膜层时输出频率为400KHZ。
本发明与现有技术相比具有以下优点:
在较低的低频射频偏置电压作用下刻蚀时可以避免碳硬掩膜层刻蚀孔侧面形成弓形,在较高的低频射频偏置电压作用下刻蚀时可以产生较好的化学轰击,使得在刻蚀过程中,即保证了刻蚀孔的垂直度又避免了刻蚀孔开口处的失真走样问题;
采用2MHZ刻蚀介质抗反射层,可以提高刻蚀介质抗反射层对光刻胶掩膜层的选择比,采用400kHZ刻蚀碳掩膜层能够保证在相同输出功率的前提下提高等离子体中的电子轰击能量,保证碳掩膜层的刻蚀孔壁垂直,并降低刻蚀孔的开口宽度。
附图说明
图1为采用现有技术方法所完成的碳硬掩膜层刻蚀效果;
图2为本发明中处理的基片的结构示意图;
图3为本发明的系统结构示意图;
图4为采用本发明方法所完成的碳硬掩膜层刻蚀效果。
具体实施方式
以下结合附图,通过详细说明一个较佳的具体实施例,对本发明做进一步阐述。
本发明公开一种基片刻蚀方法,所述刻蚀方法刻蚀的基片1结构如图2所示,包括光刻胶掩膜层11,介质抗反射层12,碳硬掩膜层13及氧化硅层14。所述刻蚀方法在一等离子体处理装置内进行,所述等离子体处理装置为电感耦合型等离子体处理装置或电容耦合型等离子体处理装置。为了便于描述,图3示出一种电感耦合型等离子体反应装置,包括真空反应腔,真空反应腔包括由金属材料制成的大致为圆柱形的侧壁, 反应腔侧壁上方设置一绝缘窗口8, 绝缘窗口8上方设置电感耦合线圈7, 电感耦合线圈7连接射频源功率源4,电感耦合线圈7与射频源功率源4构成等离子体发生器,气体供应装置5连接气体喷入口,气体供应装置5中的反应气体经过气体喷入口进入真空反应腔, 射频源功率源4的射频功率驱动电感耦合线圈7产生较强的高频交变磁场, 使得低压的反应气体被电离产生等离子体6。
在真空等离子体发生器的下游位置设置一基台,基台上放置静电卡盘用于对基片1进行支撑和固定,所述基台包含下电极,所述下电极与一射频偏置功率源2连接,该射频偏置功率源2可以输出至少两个不同频率的射频信号。等离子体6中含有大量的电子、离子、激发态的原子、分子和自由基等活性粒子,上述活性粒子可以和待处理基片的表面发生多种物理和化学反应,使得基片1表面的形貌发生改变,即完成刻蚀过程。真空等离子体发生器的下方还设置一排气泵3,用于将反应副产物排出真空等离子体发生器内。
如图2~4所示,本发明提出的基片刻蚀方法主要是对碳硬掩膜层的刻蚀方法,是以图形化的介质抗反射层12为掩膜刻蚀位于介质抗反射层12下方的碳硬掩膜层13,形成图形化的碳硬掩膜层13;所述射频偏置功率源2在刻蚀所述介质抗反射层12时输出一频率大于等于2MHZ的射频信号,监测刻蚀工艺进程,当所述介质抗反射层12刻蚀完成后,切换所述射频偏置功率源2的输出频率小于2MHZ,实现对碳硬掩膜层13的刻蚀。
大于等于2MHZ的射频偏置功率可以提高介质抗反射层12对光刻胶掩膜层11的刻蚀选择比,保证介质抗反射层12的开口宽度不扩大。小于2MHZ的射频偏置功率能够保证在相同输出功率的前提下提高等离子体中的电子轰击能量,保证碳掩膜层的刻蚀孔壁垂直。
本实施例中,所述射频源功率源2的输出频率为13MHz-60MHZ,作为一种实施方式,本实施例选用13.56MHZ。
在本发明的一实施例中,所述射频偏置功率源2在刻蚀所述介质抗反射层12时输出频率为2MHZ,所述射频偏置功率源2在刻蚀所述碳硬掩膜层13时输出频率为400KHZ。
较佳的,所述光刻胶掩膜层11和介质抗反射层12之间设置底部防反射层。刻蚀气体为COS、O2、CO2、SO2中的任意一种。为了对刻蚀过程中已完成刻蚀孔的侧壁进行保护,在刻蚀时等离子体发生器内还包含侧壁保护气体例如可以是CO。
本实施例中,正式刻蚀硬碳掩膜层13前,需要先运用等离子体干法刻蚀将光刻胶掩膜层11上的图案转移至介质抗反射层12上。
尽管本发明的内容已经通过上述优选实施例作了详细介绍,但应当认识到上述的描述不应被认为是对本发明的限制。在本领域技术人员阅读了上述内容后,对于本发明的多种修改和替代都将是显而易见的。因此,本发明的保护范围应由所附的权利要求来限定。
Claims (10)
1.一种用于3D NAND存储器的基片刻蚀方法,所述方法在一等离子体处理装置内进行,其特征在于,所述基片刻蚀方法刻蚀的基片包括光刻胶掩膜层,介质抗反射层,碳硬掩膜层及氧化硅层;
以图形化的介质抗反射层为掩膜刻蚀位于介质抗反射层下方的碳硬掩膜层,形成图形化的碳硬掩膜层;
所述等离子体处理装置包括一射频源功率源和一射频偏置功率源,所述射频偏置功率源在刻蚀所述介质抗反射层时输出一频率大于等于2MHZ的射频信号;
监测刻蚀工艺进程,当所述介质抗反射层刻蚀完成后,切换所述射频偏置功率源的输出频率小于2MHZ,实现对碳硬掩膜层的刻蚀。
2.如权利要求1所述的基片刻蚀方法,其特征在于:
所述射频源功率源的输出频率为13MHz-60MHZ。
3.如权利要求1或2所述的基片刻蚀方法,其特征在于:
所述射频偏置功率源在刻蚀所述介质抗反射层时输出频率为2MHZ,所述射频偏置功率源在刻蚀所述碳硬掩膜层时输出频率为400KHZ。
4.如权利要求1所述的基片刻蚀方法,其特征在于:
所述光刻胶掩膜层和介质抗反射层之间设置底部防反射层。
5.如权利要求4所述的基片刻蚀方法,其特征在于:
刻蚀气体为COS、O2、CO2、SO2中的任意一种。
6.如权利要求1或4或5所述的基片刻蚀方法,其特征在于:
刻蚀过程中所述等离子体处理装置内还包含侧壁保护气体。
7.一种用于3D NAND存储器的等离子体处理装置,其特征在于,包含:
等离子体反应腔,内部设有基台,所述基台包含下电极,所述下电极与一射频偏置功率源连接;
等离子体发生器,包含线圈及与所述线圈连接的射频源功率源;
基片,设置在基台上,该基片至少包含光刻胶掩膜层,介质抗反射层,碳硬掩膜层及氧化硅层,介质抗反射层位于碳硬掩膜层上方;
所述射频偏置功率源可以输出至少两个不同频率的射频信号,在刻蚀介质抗反射层时输出一频率大于等于2MHZ的射频信号,在刻蚀所述碳硬掩膜层时输出频率小于2MHZ的射频信号。
8.如权利要求7所述的等离子体处理装置,其特征在于:
所述射频源功率源的输出频率为13MHz-60MHZ。
9.如权利要求8所述的等离子体处理装置,其特征在于:
所述射频源功率源的输出频率为13.56MHZ。
10.如权利要求7~9中任意一项所述的等离子体处理装置,其特征在于:
所述射频偏置功率源在刻蚀所述介质抗反射层时输出频率为2MHZ,所述射频偏置功率源在刻蚀所述碳硬掩膜层时输出频率为400KHZ。
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