CN109413836A - Circuit board and preparation method thereof - Google Patents
Circuit board and preparation method thereof Download PDFInfo
- Publication number
- CN109413836A CN109413836A CN201710696697.4A CN201710696697A CN109413836A CN 109413836 A CN109413836 A CN 109413836A CN 201710696697 A CN201710696697 A CN 201710696697A CN 109413836 A CN109413836 A CN 109413836A
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- Prior art keywords
- layer
- conductive
- conductive circuit
- heat
- copper foil
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
A kind of circuit board, including successively folding the first substrate set, heat conducting base material and the second substrate, the cavity being formed through on the first substrate, electronic component is equipped in the cavity, the first conductive circuit layer and the second conductive circuit layer are respectively formed in the first substrate and the second substrate, the first dielectric layer and the second dielectric layer have been covered each by first conductive circuit layer and second conductive circuit layer, third conductive circuit layer and the 4th conductive circuit layer are respectively formed on first dielectric layer and second dielectric layer, the first soldermask layer and the second soldermask layer are respectively formed in the third conductive circuit layer and the 4th conductive circuit layer, at least a thermal hole is offered from one in first soldermask layer and second soldermask layer, the thermal hole exposes the heat conducting base material, Heat Conduction Material is filled in the thermal hole, it is led to form at least one Hot portion.
Description
Technical field
The present invention relates to the preparation methods of a kind of circuit board and the circuit board.
Background technique
In recent years, electronic product is widely used in routine work and life, and light, thin, small electronic product is increasingly
It receives an acclaim.Main component of the circuit board as electronic product, occupies the larger space of electronic product, therefore circuit board
Volume largely affects the volume of electronic product, the circuit board of large volume certainly will be difficult to meet electronic product it is light, it is thin,
Short, small trend.
By the way that the inside for being embedded in circuit substrate in the passive device (such as resistance, capacitor) of circuit board is advantageously reduced electricity
The integral thickness of road plate, to reduce the thickness of electronic product.However, the heat generated in the interior passive device work buried will be difficult
To radiate away, this will lead to the thermal expansion of circuit board core layer, to damage circuit board.
Summary of the invention
In view of this, being able to solve problem above it is necessary to provide a kind of circuit board.
In addition, there is a need to provide a kind of preparation method of circuit board.
The present invention provides a kind of preparation method of circuit board, comprising: provides a circuit substrate, which includes sequentially
One first single sided board, a heat conducting base material and one second single sided board of pressing, a cavity run through first single sided board, first list
Panel includes one first copper foil far from conductive base setting, which includes one far from conductive base setting
Second copper foil；Plating forms one first copper electroplating layer on first copper foil and second copper foil；Etch first plating
Layers of copper and first copper foil between first copper electroplating layer and second copper foil are to obtain one first conductor wire
Road floor and one second conductive circuit layer；Be placed in an electronic component in the cavity, and first conductive circuit layer and this second
One first dielectric layer and one second dielectric layer are pressed in conductive circuit layer respectively；In first dielectric layer and the second dielectric layer
On be respectively formed a third conductive circuit layer and one the 4th conductive circuit layer, the third conductive circuit layer and first conducting wire
Layer and the electronic component are electrically connected, and the 4th conductive circuit layer and second conductive circuit layer are electrically connected；In the third
One first soldermask layer and one second soldermask layer are respectively formed in conductive circuit layer and the 4th conductive circuit layer；And at least certainly
One in first soldermask layer and second soldermask layer opens up a thermal hole, the thermal hole through first soldermask layer and this
One dielectric layer or second soldermask layer and second dielectric layer, thus the exposure heat conducting base material, then in each thermal hole
Heat Conduction Material is filled, so that at least heat-conducting part connecting with the heat conducting base material thermal conductivity is formed, to obtain the circuit board.
The present invention also provides a kind of circuit boards, including successively folding the first substrate set, a heat conducting base material and one second
Substrate, the cavity being formed through on the first substrate are equipped with an electronic component in the cavity, the first substrate and this second
One first conductive circuit layer and one second conductive circuit layer are respectively formed on substrate, first conductive circuit layer and this second lead
One first dielectric layer and one second dielectric layer are covered each by electric line layer, on first dielectric layer and the second dielectric layer
It is respectively formed with a third conductive circuit layer and one the 4th conductive circuit layer, the third conductive circuit layer and first conducting wire
Layer and the electronic component are electrically connected, and the 4th conductive circuit layer and second conductive circuit layer are electrically connected, which leads
Be respectively formed with one first soldermask layer and one second soldermask layer in electric line layer and the 4th conductive circuit layer, at least from this
One in one soldermask layer and second soldermask layer offers a thermal hole, the thermal hole through first soldermask layer and this first
Dielectric layer, or through second soldermask layer and second dielectric layer, to expose the heat conducting base material, be filled in the thermal hole
Heat Conduction Material, to form an at least heat-conducting part.
In the above circuit board, the heat which generates can be distributed by the heat conducting base material and the heat-conducting part to outer
It in portion's environment, can be buffered when reaching the heat conducting base material due to the heat, so that core layer be avoided to thermally expand.
Detailed description of the invention
Fig. 1 is a preferred embodiment of the present invention the first single sided board, the second single side used in the preparation method of circuit board
The structural schematic diagram of plate and heat conducting base material.
Fig. 2 is the circuit substrate obtained after pressing the first single sided board shown in FIG. 1, the second single sided board and heat conducting base material
Structural schematic diagram.
Fig. 3 is to open up aperture in circuit substrate shown in Fig. 2 and form the structural schematic diagram after the first conductive seed.
Fig. 4 is the structural schematic diagram after circuit substrate two sides cover graphics photoresist layer shown in Fig. 3.
Fig. 5 is that electro-coppering is shown in the opening of figure photoresist layer shown in Fig. 4 with forming the structure after the first copper electroplating layer
It is intended to.
Fig. 6 is after etching the first copper electroplating layer shown in fig. 5 to obtain the first conductive circuit layer and the second conductive circuit layer
Structural schematic diagram.
Fig. 7 is to be placed in electronic component in the cavity of the first single sided board shown in Fig. 6 and press the first dielectric layer and second
Structural schematic diagram after dielectric layer.
Fig. 8 is to open up the structural schematic diagram after through-hole in the first dielectric layer and the second dielectric layer shown in Fig. 7.
Fig. 9 is to form the second conductive seed in through-hole shown in Fig. 8 and on the first dielectric layer and the second dielectric layer
Electro-coppering is to form the structural schematic diagram after the second copper electroplating layer.
Figure 10 is after etching the second copper electroplating layer shown in Fig. 9 to obtain third conductive circuit layer and the 4th conductive circuit layer
Structural schematic diagram.
Figure 11 be formed in third conductive circuit layer shown in Fig. 10 and the 4th conductive circuit layer the first soldermask layer and
Structural schematic diagram after second soldermask layer.
Figure 12 is after the first soldermask layer shown in Figure 11 opens up thermal hole and fills Heat Conduction Material to form heat-conducting part
Structural schematic diagram.
Figure 13 is to open up thermal hole the first soldermask layer and the second soldermask layer shown in Figure 11 respectively and fill thermally conductive
Material is to form the structural schematic diagram after heat-conducting part.
Figure 14 is that the end of the heat-conducting part shown in Figure 12 covers the structural schematic diagram of the circuit board obtained after cooling fin.
Figure 15, which is shown, to be opened up aperture and forms first in the circuit substrate shown in Fig. 2 in another better embodiment
Conductive seed, and the structural schematic diagram after photoresist is covered on the cavity of the first single sided board.
Figure 16 is the structural schematic diagram of another circuit board obtained on circuit substrate shown in figure 15.
Main element symbol description
The present invention that the following detailed description will be further explained with reference to the above drawings.
Specific embodiment
Fig. 1 to Figure 14 is please referred to, a first embodiment of the invention provides a kind of preparation method of circuit board 100, including
Following steps:
Step 1, referring to Fig. 1, providing one first single sided board 11, one second single sided board 12 and a heat conducting base material 13.It should
First single sided board 11 includes a first substrate 110 and one first copper foil 111 being incorporated on the first substrate 110, a cavity
112 run through the first substrate 110 and first copper foil 111.Second single sided board 12 includes a second substrate 120 and combines
In one second copper foil 121 in the second substrate 120.The thickness of first copper foil 111 and second copper foil 121 is d1.
In the present embodiment, the material of the heat conducting base material 13 is the heat-conductive resin composition with good electrical insulating property,
More specifically, the material of the heat conducting base material 13 can be selected from the heat-conductive resin composition of nano-carbon material filling, epoxy resin is led
At least one of hot resin composition, polycarbonate-based heat-conductive resin composition, acrylic acid series heat-conductive resin composition etc..Institute
The thermal coefficient for stating heat-conductive resin composition is K1.
Step 2, referring to Fig. 2, pressing first single sided board 11 respectively on two opposite surfaces of the heat conducting base material 13 and being somebody's turn to do
Second single sided board 12 makes first copper foil 111 and second copper foil 121 be respectively further from the heat conducting base material 13 setting, to be formed
One circuit substrate 20.
Step 3, referring to Fig. 3, opening up at least one through this in region of the circuit substrate 20 in addition to the cavity 112
The aperture 21 of first single sided board 11, second single sided board 12 and the heat conducting base material 13, and in the inner wall of each aperture 21
And the inner wall of the cavity 112 forms one first conductive seed 22.
In the present embodiment, the aperture 21 can be formed by way of laser drill.In the present embodiment, can lead to
The mode for crossing chemical plating or sputter forms first conductive seed 22.
Step 4, referring to Fig. 4, covering a figure photoresist on first copper foil 111 and second copper foil 121 respectively
Layer 30, the opening (figure is not marked) that the figure photoresist layer 30 is defined is for exposing first copper foil 111 and second copper foil
121 partial region, the aperture 21 for being formed with first conductive seed 22 and to be formed with described first conductive brilliant
The cavity 112 of kind layer 22.
In the present embodiment, the figure photoresist layer 30 is to use exposure development processing procedure to form required pattern.More
Body, the figure photoresist layer 30 is dry film.
Step 5, referring to Fig. 5, in the region electro-coppering that first copper foil 111 and second copper foil 121 are exposed,
One first copper electroplating layer 40 is respectively formed to power on to be plated in first copper foil 111 and second copper foil 121.Described in part
First copper electroplating layer 40 is filled in the aperture 21 for being formed with first conductive seed 22 to be formed for electrically connecting
First conductive hole 23 of two the first copper electroplating layers 40 is connect, part first copper electroplating layer 40 is also further formed in the cavity
In 112.
Wherein, first copper electroplating layer 40 with a thickness of d2, and d2 >=d1.
Step 6, referring to Fig. 6, the figure photoresist layer 30 is removed, using exposure development technology etching first electricity
Copper plate 40 and first copper foil 111 between first copper electroplating layer 40 and second copper foil 121 are to obtain
One first conductive circuit layer 51 and one second conductive circuit layer 52.
Wherein, the thickness of first conductive circuit layer 51 and second conductive circuit layer 52 is d2.Being located at after etching should
First copper electroplating layer 40 in cavity 112 with a thickness of d2-d1.
Step 7, referring to Fig. 7, being placed in an electronic component on first copper electroplating layer 40 being located in the cavity 112
63, which has two engagement pads 630 of first copper electroplating layer 40 being located away in the cavity 112.Then,
One first dielectric layer 61 and one second dielectric are pressed respectively in first conductive circuit layer 51 and second conductive circuit layer 52
Layer 62, and flow first dielectric layer 61 and fill the sky between first conductive circuit layer 51 and the electronic component 63
Gap, and flow second dielectric layer 62 and fill the gap between second conductive circuit layer 52.The electronic component 63 can
To be resistance or capacitor etc..
In the present embodiment, the material of first dielectric layer 61 and second dielectric layer 62 is resin, the resin
Can be selected from polypropylene, epoxy resin, polyurethane, phenolic resin, Lauxite, melamine formaldehyde resin, unsaturated-resin,
At least one of polyimides etc..
Step 8, referring to Fig. 8, opening up through-hole 610 in first dielectric layer 61 with exposure first conductive circuit layer
51 and the electronic component 63 engagement pad 630, and open up in second dielectric layer 62 through-hole 620 this second led with exposure
Electric line layer 52.
Step 9, referring to Fig. 9, the second conductive seed 64 is formed on the inner wall of each through-hole 610,620, then
The electro-coppering on first dielectric layer 61 and the second dielectric layer 62, thus in first dielectric layer 61 and the second dielectric
It is respectively formed one second copper electroplating layer 65 on layer 62, part second copper electroplating layer 65, which is filled in, is formed with second crystal seed
To form the second conductive hole 66 in each through-hole 610,620 of layer 64.
Step 10, referring to Fig. 10, etching required lead in second copper electroplating layer 65 using exposure development technology
Electric line, to be respectively formed a third conductive circuit layer 71 and one on first dielectric layer 61 and the second dielectric layer 62
4th conductive circuit layer 72.Wherein, which passes through second conductive hole 66 and first conducting wire
The engagement pad 630 of layer 51 and the electronic component 63 is electrically connected.4th conductive circuit layer 72 passes through second conductive hole
66 are electrically connected with second conductive circuit layer 52.
In the present embodiment, the through-hole 610,620 can be formed by way of laser drill.
Step 11 please refers to Figure 11, and shape is distinguished in the third conductive circuit layer 71 and the 4th conductive circuit layer 72
At one first soldermask layer 81 and one second soldermask layer 82.
In the present embodiment, first soldermask layer 81 and second soldermask layer 82 are ink layer or dry film.
Step 12 please refers to Figure 12 and Figure 13, at least from one in first soldermask layer 81 and second soldermask layer 82
A to open up a thermal hole 91, which runs through first soldermask layer 81, first dielectric layer 61 and the first substrate
110, or run through second soldermask layer 82, second dielectric layer 62 and the second substrate 120, thus the exposure heat conducting base material
13.Then, Heat Conduction Material is filled in each thermal hole 91, to form at least one connect with 13 thermal conductivity of heat conducting base material
Heat-conducting part 90.
In the present embodiment, from first soldermask layer 81 open up two thermal holes 91 (i.e. thermal hole 91 be located at it is ipsilateral, such as
Shown in Figure 10).Wherein, the Heat Conduction Material filled in the heat-conducting part 90 is similar with the material of the heat conducting base material, and thermal coefficient is
K2, and K2 >=K1.
In another embodiment, a thermal hole 91 is opened up from first soldermask layer 81 and second soldermask layer 82 respectively
(i.e. thermal hole 91 is located at not ipsilateral, as shown in figure 11), and the thermal hole 91 that is opened up from first soldermask layer 81 and from this
Two soldermask layers 82 act the thermal hole 91 opened up and are staggered.
Wherein, projected area of the electronic component 63 in the heat conducting base material 13 is A1, described two heat-conducting parts 90 with should
The contact area of heat conducting base material 13 is A2, A2 >=A1.
Step 13 please refers to Figure 14, covers a cooling fin far from the end of the heat conducting base material 13 in each heat-conducting part 90
92, it connect the cooling fin 92 by 90 thermal conductivity of heat-conducting part with the heat conducting base material 13, to obtain the circuit board
100.Wherein, when opening up thermal hole 91 from first soldermask layer 81, each thermal hole can be covered by single cooling fin 92
91 end.
In the present embodiment, the thermal coefficient of the cooling fin 92 is K3, and K3 >=K2.The material of the cooling fin 92 is gold
Belong to, more specifically, the material of the cooling fin 92 can be selected from least one of gold, silver, copper, lead, nickel and tin etc..
Figure 14 is please referred to, first embodiment of the invention also provides a kind of circuit board 100, which includes successively
A folded first substrate 110, a heat conducting base material 13 and the second substrate 120 set.It is formed through on the first substrate 110
One cavity 112.At least one first conductive hole 23 runs through the first substrate 110, the second substrate 120 and the heat conducting base material 13.
The inner wall of each conductive hole 23 and the inner wall of the cavity 112 include one first conductive seed 22.
One first conductive circuit layer 51 and one second is respectively formed on the first substrate 110 and the second substrate 120 to lead
Electric line layer 52.First conductive circuit layer 51 and second conductive circuit layer 52 are electrically connected by first conductive hole 23
It connects.First conductive circuit layer 51 include one first copper foil 111 that is formed on the first substrate 110 and be formed in this first
One first copper electroplating layer 40 on copper foil 111, which is further formed leads in described the first of the cavity 112
On electric seed layer 22.Second conductive circuit layer 52 includes one second copper foil 121 and the shape being formed in the second substrate 120
At in one first copper electroplating layer 40 on second copper foil 121.Wherein, first conductive circuit layer 51 and second conducting wire
The thickness of layer 52 is d2.First copper electroplating layer 40 in the cavity 112 with a thickness of d2-d1.
First copper electroplating layer 40 in the cavity 112 is equipped with an electronic component 63, which has
It is located away two engagement pads 630 of first copper electroplating layer 40 in the cavity 112.
One first dielectric layer 61 and one has been covered each by first conductive circuit layer 51 and second conductive circuit layer 52
Second dielectric layer 62, first dielectric layer 61 fill the gap between first conductive circuit layer 51 and the electronic component 63,
Second dielectric layer 62 fills the gap between second conductive circuit layer 52.
It is offered in first dielectric layer 61 for exposing connecing for first conductive circuit layer 51 and the electronic component 63
Second conductive hole 66 of touch pad 630.Second for exposing second conductive circuit layer 52 is offered in second dielectric layer 62
Conductive hole 66.The inner wall of each second conductive hole 66 includes one second conductive seed 630.
A third conductive circuit layer 71 and one is respectively formed on first dielectric layer 61 and the second dielectric layer 62
Four conductive circuit layers 72.The third conductive circuit layer 71 by second conductive hole 66 and first conductive circuit layer 51 and
The engagement pad 630 of the electronic component 63 is electrically connected.4th conductive circuit layer 72 by second conductive hole 66 with this
Two conductive circuit layers 52 are electrically connected.
Be respectively formed in the third conductive circuit layer 71 and the 4th conductive circuit layer 72 one first soldermask layer 81 and
One second soldermask layer 82.A thermal hole 91 at least is offered from one in first soldermask layer 81 and second soldermask layer 82,
The thermal hole 91 runs through first soldermask layer 81, first dielectric layer 61 and the first substrate 110, or second anti-through this
Layer 82, second dielectric layer 62 and the second substrate 120, thus the exposure heat conducting base material 13, the interior filling of the thermal hole 91
There is Heat Conduction Material, to form an at least heat-conducting part 90.
Each heat-conducting part 90 is covered with a cooling fin 92 far from the end of the heat conducting base material 13, and the cooling fin 92 is led with this
Hot substrate 13 is connected by 90 thermal conductivity of heat-conducting part.
A second embodiment of the invention provides a kind of preparation method of circuit board 100 ', in above-mentioned first embodiment
Circuit board 100 preparation method unlike, in the cavity 112 and the first conductive seed 22 and first electricity is not formed
Copper plate 40, specifically, in step 3: please referring to Figure 15, opened up in region of the circuit substrate 20 in addition to the cavity 112
At least one after the aperture 21 an of single sided board 11, second single sided board 12 and the heat conducting base material 13, on the cavity 112
A photoresist 113 is covered, and forms one first conductive seed 22 in the inner wall of each aperture 21.The photoresist 113 can be used for
Copper during electro-coppering is prevented to deposit in the inner wall of the cavity 112.
Figure 16 is please referred to, second embodiment of the invention also provides a kind of circuit board 100 ', different from foregoing circuit plate 100
, the cavity 112 is interior and the first conductive seed 22 and first copper electroplating layer 40 is not formed, i.e. the electronic component 63 is straight
Contact the bottom of the cavity 112.
Due to being embedded in the cavity 112 in the electronic component 63, the thickness of entire product can be reduced.The electronic component 63
The heat of generation can sequentially pass through the heat conducting base material 13, the heat-conducting part 90 and the cooling fin 92 and distribute into external environment.By
It can be buffered when the heat reaches the heat conducting base material 13, so that core layer be avoided to thermally expand.
It is understood that for those of ordinary skill in the art, can do in accordance with the technical idea of the present invention
Various other changes and modifications out, and all these changes and deformation all should belong to the protection model of the claims in the present invention
It encloses.
Claims (14)
1. a kind of preparation method of circuit board, comprising:
A circuit substrate is provided, which includes one first single sided board sequentially pressed, a heat conducting base material and one second
Single sided board, a cavity run through first single sided board, which includes one first copper foil far from conductive base setting,
Second single sided board includes one second copper foil far from conductive base setting；
Plating forms one first copper electroplating layer on first copper foil and second copper foil；
Etch first copper electroplating layer and first copper foil and second bronze medal between first copper electroplating layer
Foil is to obtain one first conductive circuit layer and one second conductive circuit layer；
It is placed in an electronic component in the cavity, and is pressed respectively in first conductive circuit layer and second conductive circuit layer
One first dielectric layer and one second dielectric layer；
A third conductive circuit layer and one the 4th conducting wire are respectively formed on first dielectric layer and the second dielectric layer
Layer, the third conductive circuit layer and first conductive circuit layer and the electronic component are electrically connected, the 4th conductive circuit layer
It is electrically connected with second conductive circuit layer；
One first soldermask layer and one second anti-welding is respectively formed in the third conductive circuit layer and the 4th conductive circuit layer
Layer；And
A thermal hole at least is opened up from one in first soldermask layer and second soldermask layer, the thermal hole is first anti-through this
Layer and first dielectric layer or second soldermask layer and second dielectric layer, thus the exposure heat conducting base material, then every
Heat Conduction Material is filled in one thermal hole, so that at least heat-conducting part connecting with the heat conducting base material thermal conductivity is formed, to obtain
The circuit board.
2. the preparation method of circuit board as described in claim 1, which is characterized in that further include:
A cooling fin is covered far from the end of the heat conducting base material in each heat-conducting part, passes through the cooling fin with the heat conducting base material
The heat-conducting part thermal conductivity connection.
3. the preparation method of circuit board as described in claim 1, which is characterized in that the Heat Conduction Material of the heat-conducting part is thermally conductive with this
The material of substrate is selected from the heat-conductive resin composition of nano-carbon material filling, epoxy resin heat-conductive resin composition, poly- carbon
At least one of acid esters system heat-conductive resin composition and acrylic acid series heat-conductive resin composition, the heat-conductive resin composition
Thermal coefficient be K1, the thermal coefficient of the Heat Conduction Material of the heat-conducting part is K2, K2 >=K1.
4. the preparation method of circuit board as described in claim 1, which is characterized in that step " first copper foil and this
Plating forms one first copper electroplating layer on two copper foils " before further include:
Region of the circuit substrate in addition to the cavity open up at least one through first single sided board, second single sided board and
The aperture of the heat conducting base material；And
One first conductive seed is formed in the inner wall of each aperture and the inner wall of the cavity.
5. the preparation method of circuit board as claimed in claim 4, which is characterized in that step " first copper foil and this
Plating forms one first copper electroplating layer on two copper foils " further comprise:
A figure photoresist layer is covered on first copper foil and second copper foil respectively, what the figure photoresist layer was defined opens
Mouth is opened for exposing the partial region of first copper foil and second copper foil, being formed with the described of first conductive seed
Hole and the cavity for being formed with first conductive seed；
In the region electro-coppering that first copper foil and second copper foil are exposed, thus in first copper foil and second bronze medal
First copper electroplating layer is respectively formed on foil, part first copper electroplating layer, which is filled in, is formed with the described first conductive crystal seed
The first conductive hole for being electrically connected two the first copper electroplating layers, part first plating are formed in the aperture of layer
Layers of copper is also further formed in the cavity.
Remove the figure photoresist layer.
6. the preparation method of circuit board as claimed in claim 4, which is characterized in that step " first copper foil and this
Plating forms one first copper electroplating layer on two copper foils " further comprise:
A photoresist is covered on the cavity；
A figure photoresist layer is covered on first copper foil and second copper foil respectively, what the figure photoresist layer was defined opens
Mouth is for exposing the partial region of first copper foil and second copper foil and being formed with the institute of first conductive seed
State aperture；
In the region electro-coppering that first copper foil and second copper foil are exposed, thus in first copper foil and second bronze medal
First copper electroplating layer is respectively formed on foil, part first copper electroplating layer, which is filled in, is formed with the described first conductive crystal seed
The first conductive hole for being electrically connected two the first copper electroplating layers is formed in the aperture of layer.
Remove the photoresist and the figure photoresist layer.
7. as circuit board described in claim 5 or 6 preparation method, which is characterized in that step " first dielectric layer with
And second be respectively formed a third conductive circuit layer and one the 4th conductive circuit layer on dielectric layer " further comprise:
Through-hole is opened up in first dielectric layer with the exposure first conductive circuit layer and electronic component, and this second
Through-hole is opened up in dielectric layer with exposure second conductive circuit layer；
The second conductive seed is formed on the inner wall of each through-hole, then in first dielectric layer and the second dielectric layer
Upper electro-coppering, so that one second copper electroplating layer is respectively formed on first dielectric layer and the second dielectric layer, described in part
Second copper electroplating layer is filled in each through-hole for be formed with second seed layer to form the second conductive hole；
Required conducting wire is etched in second copper electroplating layer using exposure development technology, thus in first dielectric
The third conductive circuit layer and the 4th conductive circuit layer are respectively formed on layer and the second dielectric layer, wherein the third is conductive
Line layer is electrically connected by second conductive hole and first conductive circuit layer and the electronic component, the 4th conductor wire
Road floor is electrically connected by second conductive hole and second conductive circuit layer.
8. the preparation method of circuit board as described in claim 1, which is characterized in that the electronic component is in the heat conducting base material
Projected area is that the contact area of any two heat-conducting part and the heat conducting base material is A2, A2 >=A1.
9. a kind of circuit board, including successively folding the first substrate, a heat conducting base material and the second substrate that set, the first substrate
On the cavity that is formed through, be equipped with an electronic component in the cavity, be respectively formed in the first substrate and the second substrate
There are one first conductive circuit layer and one second conductive circuit layer, in first conductive circuit layer and second conductive circuit layer respectively
It is covered with one first dielectric layer and one second dielectric layer, one is respectively formed on first dielectric layer and the second dielectric layer
Three conductive circuit layers and one the 4th conductive circuit layer, the third conductive circuit layer and first conductive circuit layer and electronics member
Part is electrically connected, and the 4th conductive circuit layer and second conductive circuit layer are electrically connected, the third conductive circuit layer and this
One first soldermask layer and one second soldermask layer are respectively formed in four conductive circuit layers, at least from first soldermask layer and this
One in two soldermask layers offers a thermal hole, and the thermal hole is through first soldermask layer and first dielectric layer, or passes through
Second soldermask layer and second dielectric layer are worn, to expose the heat conducting base material, Heat Conduction Material is filled in the thermal hole, thus
Form an at least heat-conducting part.
10. circuit board as claimed in claim 9, which is characterized in that each heat-conducting part is covered far from the end of the heat conducting base material
There is a cooling fin, the cooling fin is connect with the heat conducting base material by the heat-conducting part thermal conductivity.
11. circuit board as claimed in claim 9, which is characterized in that at least one first conductive hole through the first substrate, this
Two substrates and the heat conducting base material, the inner wall of each conductive hole include one first conductive seed, first conducting wire
Layer and second conductive circuit layer are electrically connected by first conductive hole.
12. circuit board as claimed in claim 11, which is characterized in that first conductive circuit layer includes being formed in first base
One first copper foil on plate and one first copper electroplating layer being formed on first copper foil, which includes shape
At in one second copper foil in the second substrate and one first copper electroplating layer being formed on second copper foil.
13. circuit board as claimed in claim 12, which is characterized in that the inner wall of the cavity is also formed with the first conductive crystal seed
Layer, which is further formed in first conductive seed of the cavity, so that the electronic component is located at
On first copper electroplating layer in the cavity.
14. circuit board as claimed in claim 11, which is characterized in that offered in first dielectric layer for expose this first
Second conductive hole of conductive circuit layer and the electronic component is offered for exposing second conductor wire in second dielectric layer
Second conductive hole of road floor, the inner wall of each second conductive hole include one second conductive seed, the third conducting wire
Layer is electrically connected by second conductive hole and first conductive circuit layer and the electronic component, the 4th conductive circuit layer
It is electrically connected by second conductive hole and second conductive circuit layer.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710696697.4A CN109413836B (en) | 2017-08-15 | 2017-08-15 | Circuit board and preparation method thereof |
| TW106128451A TWI658761B (en) | 2017-08-15 | 2017-08-22 | Circuit board and method for making the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710696697.4A CN109413836B (en) | 2017-08-15 | 2017-08-15 | Circuit board and preparation method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112543546A (en) * | 2019-09-20 | 2021-03-23 | 宏启胜精密电子(秦皇岛)有限公司 | Circuit board with heat dissipation structure and manufacturing method thereof |
| CN114258183A (en) * | 2020-09-21 | 2022-03-29 | 鹏鼎控股(深圳)股份有限公司 | Circuit board with heat dissipation structure and manufacturing method thereof |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11545412B2 (en) | 2018-03-20 | 2023-01-03 | Unimicron Technology Corp. | Package structure and manufacturing method thereof |
| CN113973433B (en) * | 2020-07-24 | 2023-08-18 | 宏启胜精密电子(秦皇岛)有限公司 | Built-in circuit board and manufacturing method thereof |
| TWI795723B (en) * | 2020-09-18 | 2023-03-11 | 欣興電子股份有限公司 | Circuit board and manufacturing method thereof |
| US11641720B2 (en) | 2020-09-18 | 2023-05-02 | Unimicron Technology Corp. | Circuit board and manufacturing method thereof |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6787895B1 (en) * | 2001-12-07 | 2004-09-07 | Skyworks Solutions, Inc. | Leadless chip carrier for reduced thermal resistance |
| CN1731915A (en) * | 2004-08-04 | 2006-02-08 | 冲电气工业株式会社 | Multi-layer circuit board device |
| CN1791305A (en) * | 2004-12-06 | 2006-06-21 | 阿尔卑斯电气株式会社 | Circuit component module, electronic circuit device, and method for manufacturing the circuit component module |
| US20090230541A1 (en) * | 2008-03-13 | 2009-09-17 | Renesas Technology Corp. | Semiconductor device and manufacturing method of the same |
| CN101574024A (en) * | 2006-12-18 | 2009-11-04 | 大日本印刷株式会社 | Electronic parts built-in distributing board, and radiating method for the electronic parts built-in distributing board |
| CN101583239A (en) * | 2008-05-13 | 2009-11-18 | 株式会社东芝 | Component-embedded printed circuit board, manufacture method thereof and electronic apparatus containing the same |
| CN101686611A (en) * | 2008-09-28 | 2010-03-31 | 华为技术有限公司 | Multilayer circuit board, manufacture method thereof and communication equipment |
| US20110164391A1 (en) * | 2010-01-06 | 2011-07-07 | Yee Na Shin | Electronic component-embedded printed circuit board and method of manufacturing the same |
| US20150201484A1 (en) * | 2014-01-10 | 2015-07-16 | Shinko Electric Industries Co., Ltd. | Wiring Substrate |
| US20160143134A1 (en) * | 2014-11-17 | 2016-05-19 | Ibiden Co., Ltd. | Wiring board with built-in metal block and method for manufacturing the same |
| JP2016171118A (en) * | 2015-03-11 | 2016-09-23 | イビデン株式会社 | Circuit board and method of manufacturing the same |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI415528B (en) * | 2008-04-24 | 2013-11-11 | Kinik Co | Electrical circuit board with high thermal conductivity and manufacturing method thereof |
| TW201003870A (en) * | 2008-07-11 | 2010-01-16 | Phoenix Prec Technology Corp | Printed circuit board having semiconductor component embeded therein and method of fabricating the same |
| TWI400998B (en) * | 2010-08-20 | 2013-07-01 | Nan Ya Printed Circuit Board | Printed circuit board and method for fabricating the same |
| KR102005426B1 (en) * | 2013-05-09 | 2019-07-31 | 삼성디스플레이 주식회사 | Method for connecting flexible printed circuit board, panel-FPCB assembly and display device comprising the same |
| TWI601467B (en) * | 2015-05-14 | 2017-10-01 | 欣興電子股份有限公司 | Circuit board structure and manufacturing method thereof |
| CN105472877B (en) * | 2015-09-22 | 2018-10-16 | 乐健科技（珠海）有限公司 | Printed circuit board and preparation method thereof with thermally conductive and electrically insulating micro- radiator |
| CN106817836A (en) * | 2015-12-02 | 2017-06-09 | 富葵精密组件(深圳)有限公司 | Circuit board and preparation method thereof |
-
2017
- 2017-08-15 CN CN201710696697.4A patent/CN109413836B/en active Active
- 2017-08-22 TW TW106128451A patent/TWI658761B/en active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6787895B1 (en) * | 2001-12-07 | 2004-09-07 | Skyworks Solutions, Inc. | Leadless chip carrier for reduced thermal resistance |
| CN1731915A (en) * | 2004-08-04 | 2006-02-08 | 冲电气工业株式会社 | Multi-layer circuit board device |
| CN1791305A (en) * | 2004-12-06 | 2006-06-21 | 阿尔卑斯电气株式会社 | Circuit component module, electronic circuit device, and method for manufacturing the circuit component module |
| CN101574024A (en) * | 2006-12-18 | 2009-11-04 | 大日本印刷株式会社 | Electronic parts built-in distributing board, and radiating method for the electronic parts built-in distributing board |
| US20090230541A1 (en) * | 2008-03-13 | 2009-09-17 | Renesas Technology Corp. | Semiconductor device and manufacturing method of the same |
| CN101583239A (en) * | 2008-05-13 | 2009-11-18 | 株式会社东芝 | Component-embedded printed circuit board, manufacture method thereof and electronic apparatus containing the same |
| CN101686611A (en) * | 2008-09-28 | 2010-03-31 | 华为技术有限公司 | Multilayer circuit board, manufacture method thereof and communication equipment |
| CN104284533A (en) * | 2008-09-28 | 2015-01-14 | 华为技术有限公司 | Multilayer circuit board, manufacturing method of multilayer circuit board and communication device |
| US20110164391A1 (en) * | 2010-01-06 | 2011-07-07 | Yee Na Shin | Electronic component-embedded printed circuit board and method of manufacturing the same |
| US20150201484A1 (en) * | 2014-01-10 | 2015-07-16 | Shinko Electric Industries Co., Ltd. | Wiring Substrate |
| US20160143134A1 (en) * | 2014-11-17 | 2016-05-19 | Ibiden Co., Ltd. | Wiring board with built-in metal block and method for manufacturing the same |
| JP2016171118A (en) * | 2015-03-11 | 2016-09-23 | イビデン株式会社 | Circuit board and method of manufacturing the same |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112543546A (en) * | 2019-09-20 | 2021-03-23 | 宏启胜精密电子(秦皇岛)有限公司 | Circuit board with heat dissipation structure and manufacturing method thereof |
| CN114258183A (en) * | 2020-09-21 | 2022-03-29 | 鹏鼎控股(深圳)股份有限公司 | Circuit board with heat dissipation structure and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109413836B (en) | 2021-04-20 |
| TW201911984A (en) | 2019-03-16 |
| TWI658761B (en) | 2019-05-01 |
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